CN102508711A - Service-oriented multi-core computing platform on reconfigurable chip and reconfiguration method thereof - Google Patents
Service-oriented multi-core computing platform on reconfigurable chip and reconfiguration method thereof Download PDFInfo
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- CN102508711A CN102508711A CN2011102996206A CN201110299620A CN102508711A CN 102508711 A CN102508711 A CN 102508711A CN 2011102996206 A CN2011102996206 A CN 2011102996206A CN 201110299620 A CN201110299620 A CN 201110299620A CN 102508711 A CN102508711 A CN 102508711A
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Abstract
The invention discloses a service-oriented multi-core computing platform on a reconfigurable chip and a reconfiguration method thereof. The service-oriented multi-core computing platform is characterized by comprising a scheduling servant, a reconfigurable servant, an interconnection module based on first-in first-out buffer and a servant library containing a plurality of servants, wherein the scheduling servant is interconnected with the reconfigurable servant by virtue of the interconnection module; and the reconfigurable servant is connected with the servant library through an integrated port. According to the platform system provided by the invention, a plurality of types of computing services can be rapidly provided and the reconfiguration time of the reconfigurable servant is greatly reduced.
Description
Technical field
The invention belongs to service-oriented and the restructural computing field, be specifically related to a kind of service-oriented restructural platform and dynamic part reconstructing method thereof.
Background technology
Restructural calculates as a kind of new form of calculation; The programmability of traditional common microprocessor is combined with the account form based on spatial parallelism in the hardware designs; Broken the division boundary line between traditional hardware and the software, for embedded system provides a hardware platform that has higher computing power.Computing platform based on reconfigurable hardware; Get final product the reconstruction calculations system; Its essence is to utilize the repeatedly characteristic of repeated configuration logic state of programming device; The time dynamically change the circuit structure of system as required in operation, thereby make system have flexible, simple and direct, hardware resource reusable concurrently, be easy to multiple premium properties such as upgrading.It can provide the execution that is similar to special IC efficient, can change its inside function and interconnection structure through programming again, carries out different optimization to different computing tasks, has the dirigibility that is similar to general purpose microprocessor.Reconfigurable system (Reconfigurable System) has a wide range of applications at aspects such as high-speed digital filter, compression of images, hardware EVOLUTIONARY COMPUTATION, custom calculation (Custom Computing), embedded systems.Along with microelectric technique, development of computer, the improvement on appearance, design of hardware and software method and the design tool of especially extensive high performance programmable device, the restructural computing technique becomes a new focus in the computing system research in the world gradually.
Along with the reconfigurable device integrated level is increasingly high; Difficulty based on the system level design of the reconfigurable device of FPGA etc. is also increasing; And the pressure of shorter and shorter TTM (Time-to-Market), the method for designing of restructurable computing system obtains the common concern of academia and industry member day by day.In order to improve the efficient of system design and exploitation effectively, increasing deviser begins to take the design based on platform.Be that the deviser directly adopts the software and hardware resources storehouse that is provided by platform to come the design customization system.
Yet; Because the present general more complicated of restructural model; The Heterogeneous Computing Module Design is widely different, has brought very big difficulty for deviser and developer, from being designed into encapsulation; And task run all needs the programmer to carry out manual intervention and configuration, thereby limited the performance optimization effect that platform can obtain.The present invention therefore.
Summary of the invention
In order to overcome the deficiency that exists in the background technology; One object of the present invention is to provide a kind of service-oriented restructural chip multi-core computing platform and dynamic part reconstructing method thereof, improves the program implementation performance through when moving, IP kernel being carried out dynamic-configuration.Related reconstruct method for designing can obtain consistent IP kernel and realize and package interface, shortens the construction cycle.
In order to solve these problems of the prior art, technical scheme provided by the invention is:
A kind of service-oriented restructural chip multi-core computing platform; It is characterized in that said platform comprise dispatch service body, restructural service body, based on the interconnect module of first in first out buffering and the service body storehouse that comprises a plurality of service bodies, said dispatch service body is served with restructural and is all carried out interconnected through said interconnect module between the body; Said restructural service body is through service integrated interface Connection Service body storehouse.
Preferably, said dispatch service body provides one or more service access point to the user, is fed to task to carry out services request.
Preferably, said restructural service body is made up of the isomerization hardware accelerating module, and can from service body storehouse, serve the dynamic-configuration of body through the service integrated interface.
Another object of the present invention is to provide a kind of reconstructing method of service-oriented restructural chip multi-core computing platform, it is characterized in that said method comprising the steps of:
(1) user sends a new services request to the task dispatching system; When the dispatch service body is received task requests, judge at first whether the restructural service body of current loading is complementary with intended application; If coupling then is forwarded to restructural service body with task;
(2), then control restructural service body and from service body storehouse, choose the service body of a coupling and carry out reconstruct, and after reconstruct finishes, begin automatically to execute the task if do not match;
(3) after task is carried out end, restructural service body returns execution result to the dispatch service body.
Service-oriented restructural platform of the present invention; By a dispatch service body, a restructural service body; Interconnect module based on the first in first out buffering; And a service body storehouse formation that comprises a plurality of service bodies, all carry out interconnected between said dispatch service body and the restructural service body through said interconnect module.
The concrete steps of the dynamic part reconstruct of the restructural platform that the present invention is service-oriented can may further comprise the steps:
(1) analysis application and functional module are divided.This module should be divided into two types: static module or reconfigurable module.Carrying out functional module when dividing, the logic element that needs to guarantee some types must reside in static module, comprises logical block such as global clock etc.Volume of transmitted data between the subregion solution should guarantee before static module and the reconfigurable module is less.
(2) hardware language is described and function test.According to the subregion solution in a last step, realized the hardware description of each module.Each module has more than one instance, and the port definition of the different instances of identical reconfigurable module must be identical.
(3) comprehensive, to each static state and reconfigurable module, generate independent hardware net table respectively.
(4) design constraint is set.Before implementing hardware platform design, need definition user constraint.Typical user's constraint has several types, as: the constraint of zone group, restructural schema constrains, temporal constraint and Pin locations constraint etc.
(5) realize static module and reconfigurable module.The realization of module and common hardware designs are similar, are divided into following steps: translation, mapping, placement-and-routing.Each reconfigurable module has the instance of a plurality of different configurations, and the configuration of each instance is all different.By contrast, the instance of all static modules keeps all identical configurations.
(6) merge.Static module and reconfigurable module merge, bit stream and a plurality of part hardware bit stream that generation can an initial full, and all these bit stream files all can be loaded into equipment.
(7) after hardware designs finishes, carry out software design, at first need set up plate level support package according to the parameter of hardware platform.Comprised boot in the plate level support package, storehouse driver etc.It provides application programming interfaces (API) for software application.
(8) exploitation of application software must be on the API that plate level support package provides.Application development is similar with normal software design, and only it need add steering order whole restructural flow process is configured
(9) hardware platform and the software application to design carries out combined debugging, with the correctness of checking global design.When whole design cycle will finish, obtain the executable file that moves on the correct reconfigurable hardware platform.
The present invention relates to a kind of service-oriented restructural platform, be specifically related to a kind of service-oriented restructural platform and dynamic part reconstruct method for designing thereof.Therefore the present invention provides a kind of service-oriented reconfigurable system; Each reconfigurable I P nuclear is abstract in serving body; Can be automatically carry out the replacement and the dynamic-configuration of IP kernel to the characteristic of the attribute of task and application program; Shorten the overhead of program run greatly, expanded the concurrency of task run.
Compared with prior art, the present invention has following significant advantage:
1, there is the dispatch service body in the service-oriented restructural platform that the present invention proposes, can when operation, decides the dynamic load of restructural service body, thereby improve the runnability of task to the attribute of task and the characteristic of application program.Its characteristics are to adopt partial bit to flow down and carry, and shorten the overhead that device programming brings
2, the dynamic part reconstruct method for designing that provides of the present invention's proposition improves the program implementation performance through when moving, IP kernel being carried out dynamic-configuration.Related reconstruct method for designing makes each IP kernel in the process of design, can obtain consistent IP kernel with design cycle and realizes and package interface, shorten the construction cycle.
In sum; The invention provides a kind of service-oriented restructural platform and dynamic part reconstruct method for designing thereof; It comprises a dispatch service body, a restructural service body; Interconnect module based on the first in first out buffering, and a service body storehouse formation that comprises a plurality of service bodies all carry out interconnected through said interconnect module between said dispatch service body and the restructural service body.Said dispatch service body provides one or more service access point to the user, is fed to task to carry out services request; Said restructural service body is made up of the isomerization hardware accelerating module, and can from service body storehouse, serve the dynamic-configuration of body through the service integrated interface.Said dynamic part reconstruct method for designing provides platform when operation, to serve the uniform interface and the flow process of body weight structure, makes system of the present invention that quick polytype calculation services can be provided, and greatly reduces the setup time of restructural service body.
Description of drawings
Below in conjunction with accompanying drawing and embodiment the present invention is further described:
Fig. 1 is the system assumption diagram of service-oriented restructural platform of the present invention;
Process flow diagram when Fig. 2 is service-oriented restructural platform operation of the present invention;
Fig. 3 is the idiographic flow block diagram of dynamic part reconstruct method for designing of the present invention.
Embodiment
Above-mentioned explanation only is the general introduction of technical scheme of the present invention, understands technological means of the present invention in order can more to know, and can implement according to the content of instructions, below with preferred embodiment of the present invention and conjunction with figs. specify as after.Below in conjunction with specific embodiment such scheme is further specified.Should be understood that these embodiment are used to the present invention is described and are not limited to limit scope of the present invention.
Embodiment
As shown in Figure 1; System assumption diagram for service-oriented restructural platform; Comprise a dispatch service body, a restructural service body; Interconnect module based on the first in first out buffering, and a service body storehouse formation that comprises a plurality of service bodies all carry out interconnected through said interconnect module between said dispatch service body and the restructural service body.Said dispatch service body provides one or more service access point to the user, is fed to task to carry out services request; Said restructural service body is made up of the isomerization hardware accelerating module, and can from service body storehouse, serve the dynamic-configuration of body through the service integrated interface;
Fig. 2 has shown the process flow diagram when service-oriented restructural platform of the present invention moves.The reconstruct flow example of IP kernel is following during a concrete operation:
(1) user sends a new services request to the task dispatching system.When the dispatch service body is received task requests, judge at first whether the restructural service body of current loading is complementary with intended application.If coupling then is forwarded to restructural service body with task;
(2), then control restructural service body and from service body storehouse, choose the service body of a coupling and carry out reconstruct, and after reconstruct finishes, begin automatically to execute the task if do not match;
(3) after task is carried out end, restructural service body returns execution result to the dispatch service body.
In order to realize the operational scheme among Fig. 2, Fig. 3 is the design frame chart of the dynamic part reconstruct method for designing that proposes of the present invention, and concrete design cycle is following:
(1) analysis application and functional module are divided.This module should be divided into two types: static module or reconfigurable module.Carrying out functional module when dividing, the logic element that needs to guarantee some types must reside in static module, comprises logical block such as global clock etc.Volume of transmitted data between the subregion solution should guarantee before static module and the reconfigurable module is less.
(2) hardware language is described and function test.According to the subregion solution in a last step, realized the hardware description of each module.Each module has more than one instance, and the port definition of the different instances of identical reconfigurable module must be identical.
(3) comprehensive, to each static state and reconfigurable module, generate independent hardware net table respectively.
(4) design constraint is set.Before implementing hardware platform design, need definition user constraint.Typical user's constraint has several types, as: the constraint of zone group, restructural schema constrains, temporal constraint and Pin locations constraint etc.
(5) realize static module and reconfigurable module.The realization of module and common hardware designs are similar, are divided into following steps: translation, mapping, placement-and-routing.Each reconfigurable module has the instance of a plurality of different configurations, and the configuration of each instance is all different.By contrast, the instance of all static modules keeps all identical configurations.
(6) merge.Static module and reconfigurable module merge, bit stream and a plurality of part hardware bit stream that generation can an initial full, and all these bit stream files all can be loaded into equipment.
(7) after hardware designs finishes, carry out software design, at first need set up plate level support package according to the parameter of hardware platform.Comprised boot in the plate level support package, storehouse driver etc.It provides application programming interfaces (API) for software application.
(8) exploitation of application software must be on the API that plate level support package provides.Application development is similar with normal software design, and only it need add steering order whole restructural flow process is configured.
(9) hardware platform and the software application to design carries out combined debugging, with the correctness of checking global design.When whole design cycle will finish, obtain the executable file that moves on the correct reconfigurable hardware platform.
Above-mentioned instance only is explanation technical conceive of the present invention and characteristics, and its purpose is to let the people who is familiar with this technology can understand content of the present invention and enforcement according to this, can not limit protection scope of the present invention with this.All equivalent transformations that spirit is done according to the present invention or modification all should be encompassed within protection scope of the present invention.
Claims (4)
1. service-oriented restructural chip multi-core computing platform; It is characterized in that said platform comprise dispatch service body, restructural service body, based on the interconnect module of first in first out buffering and the service body storehouse that comprises a plurality of service bodies, said dispatch service body is served with restructural and is all carried out interconnected through said interconnect module between the body; Said restructural service body is through service integrated interface Connection Service body storehouse.
2. service-oriented restructural chip multi-core computing platform according to claim 1 is characterized in that said dispatch service body provides one or more service access point to the user, is fed to task to carry out services request.
3. service-oriented restructural chip multi-core computing platform according to claim 1; It is characterized in that said restructural service body is made up of the isomerization hardware accelerating module, and can from serve the body storehouse, serve the dynamic-configuration of body through the service integrated interface.
4. the reconstructing method of the described service-oriented restructural chip multi-core computing platform of a claim 1 is characterized in that said method comprising the steps of:
(1) user sends a new services request to the task dispatching system; When the dispatch service body is received task requests, judge at first whether the restructural service body of current loading is complementary with intended application; If coupling then is forwarded to restructural service body with task;
(2), then control restructural service body and from service body storehouse, choose the service body of a coupling and carry out reconstruct, and after reconstruct finishes, begin automatically to execute the task if do not match;
(3) after task is carried out end, restructural service body returns execution result to the dispatch service body.
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107465717A (en) * | 2017-06-16 | 2017-12-12 | 广州天宁信息技术有限公司 | A kind of method, apparatus and equipment of password on-demand service |
CN108363615A (en) * | 2017-09-18 | 2018-08-03 | 清华大学无锡应用技术研究院 | Method for allocating tasks and system for reconfigurable processing system |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6766508B1 (en) * | 1999-04-15 | 2004-07-20 | Koninklijke Philips Electronics N.V. | Object-oriented system having anonymous scheduler design pattern |
CN101976204A (en) * | 2010-10-14 | 2011-02-16 | 中国科学技术大学苏州研究院 | Service-oriented heterogeneous multi-core computing platform and task scheduling method used by same |
CN102129390A (en) * | 2011-03-10 | 2011-07-20 | 中国科学技术大学苏州研究院 | Task scheduling system of on-chip multi-core computing platform and method for task parallelization |
-
2011
- 2011-09-29 CN CN2011102996206A patent/CN102508711A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6766508B1 (en) * | 1999-04-15 | 2004-07-20 | Koninklijke Philips Electronics N.V. | Object-oriented system having anonymous scheduler design pattern |
CN101976204A (en) * | 2010-10-14 | 2011-02-16 | 中国科学技术大学苏州研究院 | Service-oriented heterogeneous multi-core computing platform and task scheduling method used by same |
CN102129390A (en) * | 2011-03-10 | 2011-07-20 | 中国科学技术大学苏州研究院 | Task scheduling system of on-chip multi-core computing platform and method for task parallelization |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107465717A (en) * | 2017-06-16 | 2017-12-12 | 广州天宁信息技术有限公司 | A kind of method, apparatus and equipment of password on-demand service |
CN107465717B (en) * | 2017-06-16 | 2020-06-05 | 广州天宁信息技术有限公司 | Password on-demand service method, device and equipment |
CN108363615A (en) * | 2017-09-18 | 2018-08-03 | 清华大学无锡应用技术研究院 | Method for allocating tasks and system for reconfigurable processing system |
CN108363615B (en) * | 2017-09-18 | 2019-05-14 | 清华大学 | Method for allocating tasks and system for reconfigurable processing system |
US10705878B2 (en) | 2017-09-18 | 2020-07-07 | Wuxi Research Institute Of Applied Technologies Tsinghua University | Task allocating method and system capable of improving computational efficiency of a reconfigurable processing system |
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