CN102480445B - A kind of carrier polymerizing method and system - Google Patents
A kind of carrier polymerizing method and system Download PDFInfo
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- CN102480445B CN102480445B CN201010560582.0A CN201010560582A CN102480445B CN 102480445 B CN102480445 B CN 102480445B CN 201010560582 A CN201010560582 A CN 201010560582A CN 102480445 B CN102480445 B CN 102480445B
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Abstract
The invention discloses a kind of carrier polymerizing method, echo signal is distributed, form multiple signals, and the multiple signals after distribution are transferred to the multiple digital to analog converters in D/A converter module respectively; Described multiple digital to analog converter carries out digital-to-analogue conversion to described multiple signals, and by the analog signal output after conversion to being added summation module; Be added summation module and addition summation process is carried out to the analog signal from described multiple digital to analog converter, form final carrier aggregation signal.The present invention also correspondingly discloses a kind of carrier aggregation system.The present invention utilizes the digital to analog converter of the strictly controlled parallel low speed of operating frequency to work in coordination with digital-to-analogue conversion, generates large bandwidth analog signal, thus reaches the object completing challenging objectives, lifting communication quality with the low-cost technologies of existing maturation.
Description
Technical field
The present invention relates to moving communicating field, particularly relate to a kind of carrier polymerizing method and system.
Background technology
Wireless communication system obtains high speed development in the whole world, in the whole world, multiple countries and regions obtain commercialization to 3G (3G (Third Generation) Moblie) technology, be very ripe technology, meanwhile shown the growth that can not meet people's communication requirement gradually.Therefore in the world, the research of 4G (forth generation mobile communication) technology is just stepping up to launch.The High Data Rate of 4G technology needs the wireless frequency spectrum in large broadband, but current wireless frequency spectrum resource is disperseed to take by numerous system, can the frequency spectrum that utilizes of monoblock very rare, there is again considerable segment simultaneously and be dispersed in frequency spectrum resource in each frequency range.Angularly investigate from environmental protection, high-performance, easily realization, how these discrete little frequency spectrum resources of polymerization of economical and efficient just become must faced by key problem.In view of this, the segment frequency spectrum collecting these dispersions arises at the historic moment to the technology of the frequency resource being combined into large bandwidth.Wherein technology is called a carrier aggregation, and namely the LTE-Advanced system of 3GPP (third generation Partnership Project is an international organizations) tissue have employed this technology to reach larger radio frequency bandwidth object that is high and more High Data Rate.
In the various scenes of the frequency resource of different radio frequency section being carried out being polymerized, the frequency band having a kind of scene to be polymerized is adjacent, is referred to as continuous polymerization (contiguous aggregation).The frequency band be polymerized is the frequency band of LTE, has the bandwidth of the width such as 5Mhz, 10Mhz, 15Mhz, 20Mhz, in order to reach the bandwidth of maximum bandwidth 100Mhz, namely needs the LTE bandwidth of 5 20Mhz to connect together.The bandwidth of these 5 20Mhz can be condensed together before digital to analog converter (Digital Analogue Converter, DAC), like this, the process of polymerization is completely at digital processing stages, very flexible and reliable.Meanwhile, whole receiver will become very simple, and the follow-up dummy run phase only needs a local oscillator under the structure of zero intermediate frequency.But such scheme proposes very high requirement by DAC.Such as, to the subcarrier of 15Khz, so 100Mhz will have 6666 subcarriers, and corresponding integral point FFT will be 8192 points, and actual processing bandwidth is 8192 × 15khz=122.88Mhz, and namely sampling point rate is 123Msps (1,000,000 sampling points is per second).For 4 times of over-samplings, be then 492Msps.For subscriber equipment (UE), then maximum bandwidth is 50Mhz, and when 4 times of over-samplings, sampling point rate is just 246Msps, and the DAC of high sampling point rate like this, due to the restriction of power consumption and size, UE realizes extremely difficultly even can not to realize.
Summary of the invention
In view of this, main purpose of the present invention is to provide a kind of carrier polymerizing method and system, can use and realize digital field carrier aggregation compared with the digital to analog converter of low rate, thus improves the quality of communication system.
For achieving the above object, technical scheme of the present invention is achieved in that
A kind of carrier polymerizing method, comprising:
Echo signal is distributed, forms multiple signals, and the multiple signals after distribution are transferred to the multiple digital to analog converters in D/A converter module respectively;
Described multiple digital to analog converter carries out digital-to-analogue conversion to described multiple signals, and by the analog signal output after conversion to being added summation module;
Be added summation module and addition summation process is carried out to the analog signal from described multiple digital to analog converter, form final carrier aggregation signal.
The method also comprises: the work clock arranging described multiple digital to analog converter, and concrete, the cycle arranging each digital to analog converter clock is identical, and phase place differs successively
, in tool, N comprises digital to analog converter number in D/A converter module.
Describedly distribute echo signal, forming multiple signals is:
Number according to comprising digital to analog converter in the bandwidth of echo signal and D/A converter module is distributed echo signal, and after distributing, the way of echo signal equals the number comprising digital to analog converter in D/A converter module.
Described digital to analog converter is low rate digital to analog converter, and the high end cut-off frequencies of the low pass filter of described digital to analog converter is greater than the peak frequency of the baseband signal corresponding to echo signal.
A kind of carrier aggregation system, comprising: sampling point distribution module, D/A converter module and addition summation module, described D/A converter module comprises multiple digital to analog converter; Wherein,
Described sampling point distribution module, for distributing echo signal, forms multiple signals, and the multiple signals after distribution is transferred to the multiple digital to analog converters in D/A converter module respectively;
Described digital to analog converter, for carrying out digital-to-analogue conversion to the signal from sampling point distribution module, and by the analog signal output after conversion to being added summation module;
Described addition summation module, for carrying out addition summation process to the analog signal from described multiple digital to analog converter, forms final carrier aggregation signal.
This system also comprises clock distribution module, and for arranging the work clock of described multiple digital to analog converter, concrete, the cycle arranging each digital to analog converter clock is identical, and phase place differs successively
, in tool, N comprises digital to analog converter number in D/A converter module.
Described sampling point distribution module is distributed echo signal, forms multiple signals to be:
Sampling point distribution module is distributed echo signal according to the number comprising digital to analog converter in the bandwidth of echo signal and D/A converter module, and after distributing, the way of echo signal equals the number comprising digital to analog converter in D/A converter module.
Described digital to analog converter is low rate digital to analog converter, and the high end cut-off frequencies of the low pass filter of described digital to analog converter is greater than the peak frequency of the baseband signal corresponding to echo signal.
Carrier polymerizing method of the present invention and system, the digital to analog converter of the strictly controlled parallel low speed of operating frequency is utilized to work in coordination with digital-to-analogue conversion, generate large bandwidth analog signal, thus reach the object completing challenging objectives, lifting communication quality with the low-cost technologies of existing maturation.
Accompanying drawing explanation
Fig. 1 is carrier polymerizing method schematic flow sheet of the present invention;
Fig. 2 is carrier aggregation system structural representation of the present invention;
Fig. 3 is embodiment of the present invention carrier aggregation system structural representation;
Fig. 4 is the schematic flow sheet of embodiment of the present invention carrier polymerizing method.
Embodiment
Basic thought of the present invention is: utilize the digital to analog converter of the strictly controlled parallel low speed of operating frequency to work in coordination with digital-to-analogue conversion, generates large bandwidth analog signal.
Fig. 1 is carrier polymerizing method schematic flow sheet of the present invention, and as shown in Figure 1, the method comprises:
Step 101: distribute echo signal, forms multiple signals, and the multiple signals after distribution are transferred to the multiple digital to analog converters in D/A converter module respectively.
Concrete, number according to comprising digital to analog converter in the bandwidth of echo signal and D/A converter module is distributed echo signal, after distributing, the way of echo signal equals the number comprising digital to analog converter in D/A converter module, such as, the bandwidth of echo signal is M, comprise 3 digital to analog converters in D/A converter module, then echo signal is divided into 3 tunnels, the bandwidth of every road signal is M/3.
Echo signal described in the present invention refers to through baseband processor (base band processor, BBP) digital baseband signal that the echo signal after process is corresponding, the digital to analog converter comprised in D/A converter module of the present invention is generally comparatively that low rate digital to analog converter is (comparatively speaking, be generally less than the sampling point rate of the digital baseband signal that BBP exports), further, the high end cut-off frequencies of the low pass filter of digital to analog converter is greater than the peak frequency of the baseband signal corresponding to echo signal.
Step 102: the described multiple digital to analog converter in D/A converter module carries out digital-to-analogue conversion to described multiple signals, and by the analog signal output after conversion to being added summation module.
It should be noted that, the clock distribution circuit that multiple digital to analog converters in D/A converter module are corresponding with clock distribution module is respectively connected, when comprising N number of digital to analog converter in D/A converter module, the cycle of each digital to analog converter clock is identical, and phase place differs successively
, in other words, in clock sequence, to be the phase difference of the clock of 1 be for each clock and sequence number
, wherein, n is the sequence number of clock, and clock signal can be produced by phase-locked loop (PLL) clock generation circuit.
Step 103: be added summation module and addition summation process is carried out to the analog signal from described multiple digital to analog converter, form final carrier aggregation signal.
The function being added summation module directly can be connected by microstrip line and realize.The carrier aggregation signal be added after summation module process is the analog baseband signal without spectral aliasing, and this signal i.e. accessible follow-up simulation process module, and carry out up-conversion, the subsequent treatment such as amplification, transmitting are to complete communication.
Fig. 2 is carrier aggregation system structural representation of the present invention, and as shown in Figure 2, this system comprises: sampling point distribution module, D/A converter module and addition summation module, and described D/A converter module comprises multiple digital to analog converter; Wherein,
Described sampling point distribution module, for distributing echo signal, forms multiple signals, and the multiple signals after distribution is transferred to the multiple digital to analog converters in D/A converter module respectively;
Described digital to analog converter, for carrying out digital-to-analogue conversion to the signal from sampling point distribution module, and by the analog signal output after conversion to being added summation module;
Described addition summation module, for carrying out addition summation process to the analog signal from described multiple digital to analog converter, forms final carrier aggregation signal.
This system also comprises clock distribution module, and for arranging the work clock of described multiple digital to analog converter, concrete, the cycle arranging each digital to analog converter clock is identical, and phase place differs successively
, wherein, N comprises digital to analog converter number in D/A converter module.
Described sampling point distribution module is distributed echo signal, forms multiple signals to be:
Sampling point distribution module is distributed echo signal according to the number comprising digital to analog converter in the bandwidth of echo signal and D/A converter module, and after distributing, the way of echo signal equals the number comprising digital to analog converter in D/A converter module.
Described digital to analog converter is low rate digital to analog converter, and the high end cut-off frequencies of the low pass filter of described digital to analog converter is greater than the peak frequency of the baseband signal corresponding to echo signal.
Be described in further detail below in conjunction with the enforcement of specific embodiment to technical solution of the present invention.
Embodiment
The present embodiment is for the up analog signal bandwidth of 50Mhz UE, and FFT is 4092 points, and subcarrier bandwidth is 15khz, 4 times of over-samplings, then echo signal is expressed as the digital baseband signal that sampling point rate is 246Msps.The present embodiment realizes digital-to-analogue conversion with three identical digital to analog converters (DAC1, DAC2, DAC3), and the sampling point rate of average each digital to analog converter requires as 246Msps/3=82Msps.
Fig. 3 is embodiment of the present invention carrier aggregation system structural representation, as shown in Figure 3,3 DAC1, DAC2, DAC3 are connected with BBP, and be connected with the clock distribution circuit of correspondence respectively, in the present embodiment, arrange clk1, clk2, clk3 work clock as DAC1, DAC2, DAC3 respectively, clk1, clk2, clk3 demand fulfillment requires as follows:
The first, the cycle of clk1, clk2, clk3 tri-clocks is identical;
The second, the phase place of clk1, clk2, clk3 tri-clocks differs 120 ° successively.
Fig. 4 is the schematic flow sheet of embodiment of the present invention carrier polymerizing method, and as shown in Figure 4, the method comprises following some steps:
Step 401: after the complete signal of baseband processor, the digital baseband obtaining echo signal represents Sum (n), and sampling point distribution module is divided into three parallel tunnels: sap1 (n)=Sum (3n-2), sap2 (n)=Sum (3n-1), sap3 (n)=Sum (3n).
Digital baseband signal sap1 (n), sap2 (n), sap3 (n) that step 402:DAC1, DAC2, DAC3 send respectively by digital interface reception BBP.
Here, have basic requirement to DAC, namely the high end cut-off frequencies of the low pass filter of DAC is greater than the peak frequency of the baseband signal corresponding to Sum (n).
Step 403:DAC1, DAC2, DAC3 start to carry out the work that digital-to-analogue is changed, and export analog signal s1 (t), s2 (t), the s3 (t) corresponding to sap1 (n), sap2 (n), sap3 (n).
Step 404: s1 (t), s2 (t), s3 (t) are added together (being directly connected as by microstrip line) at addition summation module, namely form synthetic carrier aggregation signal S, this signal is the analog baseband signal without spectral aliasing.This signal i.e. accessible follow-up simulation process module, and carry out up-conversion, the subsequent treatment such as amplification, transmitting are to complete communication.
The above, be only preferred embodiment of the present invention, be not intended to limit protection scope of the present invention.
Claims (6)
1. a carrier polymerizing method, is characterized in that, the method comprises:
Echo signal is distributed, forms multiple signals, and the multiple signals after distribution are transferred to the multiple digital to analog converters in D/A converter module respectively;
Described multiple digital to analog converter carries out digital-to-analogue conversion to described multiple signals, and by the analog signal output after conversion to being added summation module;
Be added summation module and addition summation process is carried out to the analog signal from described multiple digital to analog converter, form final carrier aggregation signal;
The method also comprises: the work clock arranging described multiple digital to analog converter, and concrete, the cycle arranging each digital to analog converter clock is identical, and phase place differs successively
wherein, N comprises digital to analog converter number in D/A converter module; And clock signal is produced by phase-locked loop pll clock generation circuit.
2. method according to claim 1, is characterized in that, describedly distributes echo signal, forms multiple signals to be:
Number according to comprising digital to analog converter in the bandwidth of echo signal and D/A converter module is distributed echo signal, and after distributing, the way of echo signal equals the number comprising digital to analog converter in D/A converter module.
3. the method according to any one of claim 1 to 2, it is characterized in that, described digital to analog converter is low rate digital to analog converter, and the high end cut-off frequencies of the low pass filter of described digital to analog converter is greater than the peak frequency of the baseband signal corresponding to echo signal.
4. a carrier aggregation system, is characterized in that, this system comprises: sampling point distribution module, D/A converter module and addition summation module, and described D/A converter module comprises multiple digital to analog converter; Wherein,
Described sampling point distribution module, for distributing echo signal, forms multiple signals, and the multiple signals after distribution is transferred to the multiple digital to analog converters in D/A converter module respectively;
Described digital to analog converter, for carrying out digital-to-analogue conversion to the signal from sampling point distribution module, and by the analog signal output after conversion to being added summation module;
Described addition summation module, for carrying out addition summation process to the analog signal from described multiple digital to analog converter, forms final carrier aggregation signal;
This system also comprises clock distribution module, and for arranging the work clock of described multiple digital to analog converter, concrete, the cycle arranging each digital to analog converter clock is identical, and phase place differs successively
wherein, N comprises digital to analog converter number in D/A converter module; And clock signal produces circuit generation by pll clock.
5. system according to claim 4, is characterized in that, described sampling point distribution module is distributed echo signal, forms multiple signals to be:
Sampling point distribution module is distributed echo signal according to the number comprising digital to analog converter in the bandwidth of echo signal and D/A converter module, and after distributing, the way of echo signal equals the number comprising digital to analog converter in D/A converter module.
6. the system according to any one of claim 4 to 5, it is characterized in that, described digital to analog converter is low rate digital to analog converter, and the high end cut-off frequencies of the low pass filter of described digital to analog converter is greater than the peak frequency of the baseband signal corresponding to echo signal.
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| GB2526197B (en) * | 2014-04-11 | 2020-11-18 | Skyworks Solutions Inc | Circuits and methods related to radio-frequency receivers having carrier aggregation |
| CN108931955B (en) * | 2018-08-28 | 2023-12-26 | 康泰医学系统（秦皇岛）股份有限公司 | Analog output device for physiological signal |
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| CN101790256A (en) * | 2009-01-22 | 2010-07-28 | 中兴通讯股份有限公司 | Signal receiving machine, signal sending machine and signal processing method |
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| US20060067293A1 (en) * | 2004-09-24 | 2006-03-30 | John Santhoff | Digital synthesis of communication signals |
| US20090052556A1 (en) * | 2007-08-23 | 2009-02-26 | Fernandez Andrew D | Frequency interleaving method for wideband signal generation |
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| Motorola."Text Proposal for LTE-A Spectrum Aggregation Scenarios and Their Impact on UE Architecture".《3GPP TSG RAN WG1 Meeting #54bis,R1-083828》.2008, * |
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