CN102479553A - 有多个需要校准的模拟电路的专用集成电路 - Google Patents
有多个需要校准的模拟电路的专用集成电路 Download PDFInfo
- Publication number
- CN102479553A CN102479553A CN2010105589531A CN201010558953A CN102479553A CN 102479553 A CN102479553 A CN 102479553A CN 2010105589531 A CN2010105589531 A CN 2010105589531A CN 201010558953 A CN201010558953 A CN 201010558953A CN 102479553 A CN102479553 A CN 102479553A
- Authority
- CN
- China
- Prior art keywords
- calibration
- memory module
- bus
- nonvolatile memory
- mimic channel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Landscapes
- Semiconductor Integrated Circuits (AREA)
Abstract
Description
Claims (3)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2010105589531A CN102479553A (zh) | 2010-11-25 | 2010-11-25 | 有多个需要校准的模拟电路的专用集成电路 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2010105589531A CN102479553A (zh) | 2010-11-25 | 2010-11-25 | 有多个需要校准的模拟电路的专用集成电路 |
Publications (1)
Publication Number | Publication Date |
---|---|
CN102479553A true CN102479553A (zh) | 2012-05-30 |
Family
ID=46092152
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2010105589531A Pending CN102479553A (zh) | 2010-11-25 | 2010-11-25 | 有多个需要校准的模拟电路的专用集成电路 |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN102479553A (zh) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103870616A (zh) * | 2012-12-10 | 2014-06-18 | 上海华虹宏力半导体制造有限公司 | 模拟模块的参数调整系统 |
CN115865089A (zh) * | 2023-02-08 | 2023-03-28 | 南京德克威尔自动化有限公司 | 一种模拟量输入的自动校准方法及系统 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001311765A (ja) * | 2000-04-12 | 2001-11-09 | Advantest Corp | 半導体テストシステム |
CN1580801A (zh) * | 2003-08-04 | 2005-02-16 | 华为技术有限公司 | 一种电路板的边界扫描测试方法 |
CN101114527A (zh) * | 2006-07-28 | 2008-01-30 | 日立超大规模集成电路系统株式会社 | 半导体器件 |
-
2010
- 2010-11-25 CN CN2010105589531A patent/CN102479553A/zh active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001311765A (ja) * | 2000-04-12 | 2001-11-09 | Advantest Corp | 半導体テストシステム |
CN1580801A (zh) * | 2003-08-04 | 2005-02-16 | 华为技术有限公司 | 一种电路板的边界扫描测试方法 |
CN101114527A (zh) * | 2006-07-28 | 2008-01-30 | 日立超大规模集成电路系统株式会社 | 半导体器件 |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103870616A (zh) * | 2012-12-10 | 2014-06-18 | 上海华虹宏力半导体制造有限公司 | 模拟模块的参数调整系统 |
CN103870616B (zh) * | 2012-12-10 | 2017-06-06 | 上海华虹宏力半导体制造有限公司 | 模拟模块的参数调整系统 |
CN115865089A (zh) * | 2023-02-08 | 2023-03-28 | 南京德克威尔自动化有限公司 | 一种模拟量输入的自动校准方法及系统 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US8269524B2 (en) | General purpose input/output pin mapping | |
EP2132877B1 (en) | Read and write interface communications protocol for digital-to-analog signal converter with non-volatile memory | |
JP4422617B2 (ja) | 集積回路チップのデバイスピンを再設定するためのテストモード制御回路 | |
US20060279327A1 (en) | Non-volatile memory configuration scheme for volatile-memory-based programmable circuits in an fpga | |
US8643519B1 (en) | On-chip calibration method | |
US9105317B2 (en) | Memory system capable of calibrating output voltage level of semiconductor memory device and method of calibrating output voltage level of semiconductor memory device | |
CA2791931A1 (en) | Composite semiconductor memory device with error correction | |
JP2018045743A (ja) | 半導体装置及びメモリシステム | |
CN112068469A (zh) | 基于dsp28379的通用型嵌入式主控板 | |
US8159261B2 (en) | Semiconductor circuit | |
CN113704157A (zh) | 一种基于总线控制多路不同电平复位信号的系统 | |
CN102479553A (zh) | 有多个需要校准的模拟电路的专用集成电路 | |
TWI787520B (zh) | 半導體記憶裝置及記憶系統 | |
US9236867B2 (en) | Apparatus for mixed signal interface circuitry and associated methods | |
KR20070088845A (ko) | 메모리 모듈 및 메모리 모듈에 포함되는 반도체디바이스들의 임피던스 교정방법 | |
EP3358438B1 (en) | Configurable clock interface device | |
KR20050026848A (ko) | Vdc 출력을 디지털량으로서 관측할 수 있고, vdc출력 전압을 조정할 수 있는 반도체 집적 회로 | |
CN105988078B (zh) | 一种实现单线可编程电路的方法和系统 | |
US7954017B2 (en) | Multiple embedded memories and testing components for the same | |
US20140002133A1 (en) | Apparatus for mixed signal interface acquisition circuitry and associated methods | |
US6385073B1 (en) | Integrated circuit device with expandable nonvolatile memory | |
US20070189100A1 (en) | Semiconductor memory | |
US20080198675A1 (en) | Semiconductor device including a plurality of memory units and method of testing the same | |
CN220087273U (zh) | 一种内置adc参考自动校准的ic芯片 | |
CN115458022B (zh) | 一种NANDFlash ZQ校准方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
ASS | Succession or assignment of patent right |
Owner name: SHANGHAI HUAHONG GRACE SEMICONDUCTOR MANUFACTURING Free format text: FORMER OWNER: HUAHONG NEC ELECTRONICS CO LTD, SHANGHAI Effective date: 20140103 |
|
C41 | Transfer of patent application or patent right or utility model | ||
COR | Change of bibliographic data |
Free format text: CORRECT: ADDRESS; FROM: 201206 PUDONG NEW AREA, SHANGHAI TO: 201203 PUDONG NEW AREA, SHANGHAI |
|
TA01 | Transfer of patent application right |
Effective date of registration: 20140103 Address after: 201203 Shanghai city Zuchongzhi road Pudong New Area Zhangjiang hi tech Park No. 1399 Applicant after: Shanghai Huahong Grace Semiconductor Manufacturing Corporation Address before: 201206, Shanghai, Pudong New Area, Sichuan Road, No. 1188 Bridge Applicant before: Shanghai Huahong NEC Electronics Co., Ltd. |
|
RJ01 | Rejection of invention patent application after publication |
Application publication date: 20120530 |