CN102439947B - Method and device for processing address request - Google Patents
Method and device for processing address request Download PDFInfo
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- CN102439947B CN102439947B CN201180001787.8A CN201180001787A CN102439947B CN 102439947 B CN102439947 B CN 102439947B CN 201180001787 A CN201180001787 A CN 201180001787A CN 102439947 B CN102439947 B CN 102439947B
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
Abstract
The embodiment of the invention provides a method and a device for processing an address request, for improving resource utilization ratio. The method comprises the steps of obtaining the request of any node Nodel to an address Addra in a system; wherein, the request at least comprises the identification Nid of the node Nodel and the identification Tid of the request; storing the request of the address Addra at the position corresponding to the identification Nid and the identification Tid or storing the request of the address Addra at the position corresponding to the identification Nid and the identification Tid after replacing the request of the address Addra stored previously. By using the method provided by the embodiment of the invention, enough storage space can be guaranteed when all nodes send all requests to all addresses, and the most utilization of hardware storage resource also can be guaranteed, thereby improving the utilization ratio of the hardware resource.
Description
Technical field
The present invention relates to the communications field, relate in particular to a kind of method and apparatus that Address requests is processed.
Background technology
Along with the development of cloud computing technology, industry is further strengthened the demand of high-end fault-tolerant calculation.In the fault-tolerant computer framework forming at multiprocessor, buffer consistency (Cache Coherence, the CC) layer in Node Controller (Node Controller, NC) (being also a kind of interconnected chip) is most crucial technology.So-called CC layer, be to multiprocessor fault-tolerant computer framework when the shared drive, for solving the general designation of the hardware cell of internal memory shared procedure address conflict problem.The request that internal memory agency (Home Agent, HA) in CC layer need to initiate each caching agent (Cache Agent, CA) is processed.In the NC design of fault-tolerant computer CC layer hardware designs, especially 32 cores (32P) and above system, HA need to carry out the sequence of serializing for what initiate from a plurality of nodes (being CA) to the request of same address.
Due to first in first out (First-In-First-Out, FIFO) queue is a kind of technology comparative maturity and conventional queue, in this field of high-end fault-tolerant calculation, to the request to same address of initiating from a plurality of nodes, prior art adopts fifo queue to carry out serializing operation to it conventionally.As shown in accompanying drawing 1a, system enters same fifo queue to the request of same address, and each request takies the container (Entry) in queue.For example, all requests to address 0 enter FIFO
(00)queue, all requests to address 1 enter FIFO
(01)queue, all requests to address 2 enter FIFO
(02)queue ..., all requests to address n-1 enter FIFO
(n-1)queue; The 0th enters FIFO to the request of address 0
(00)the container 0(Entry of queue
0) (in figure, use " Entry
0for Addr
0" represent, the rest may be inferred by analogy), the 1st enters FIFO to the request of address 0
(00)the container 1(Entry of queue
1), the 2nd enters FIFO to the request of address 0
(00)the container 2(Entry of queue
2) ...., m enters FIFO to the request of address 0
(00)container m-1 (the Entry of queue
m-1); The situation that the request of other addresses is entered to fifo queue is similar.When this specific character of fifo queue has determined that follow-up resource obtains the request of these addresses, can only operate in strict accordance with the order of falling in lines of these Address requests, for example, three orders that the request of address 0 is fallen in lines are: the 0th enters FIFO to the request of address 0
(00)the container Entry of queue
0, be secondly the 1st the request of address 0 entered to FIFO
(00)the container Entry of queue
1, be finally the 2nd the request of address 0 entered to FIFO
(00)the container Entry of queue
2, so, if follow-up certain resource need to obtain the 2nd request to address 0, must wait until that the 0th has been left FIFO to the request of address 0 and the 1st in turn to the request of address 0
(00)queue afterwards.
By analyzing the serializing management method of the fifo queue that above-mentioned prior art provides, can find, if can be P for the different number of addresses of request, so, the fifo queue needing should be also P, and the degree of depth of each fifo queue (being also the number of container in each fifo queue (Entry)) numerically must equate with the quantity of request that the maximum of same address is walked abreast.For example, have 10 nodes (CA) in supposing the system, each node is 60 to the maximum number of the request of address, if this maximum number is all the request for same address, so, the fifo queue needing adds up to 1, because the request of same address is entered to same fifo queue; If this maximum number is all the request for different addresses, so, the fifo queue needing adds up to 600(=10 * 60) individual, because the request of different addresses is entered to different fifo queues; Owing to having 10 nodes in system, may ask same address, each node is 60 to the maximum number of the request of same address, the degree of depth of each fifo queue is 600=10 * 60, because ask 60 pairs of same addresses of largest request number that in 10 nodes, each node may can carry out with it, as shown in accompanying drawing 1b.
From accompanying drawing 1a and accompanying drawing 1b, can learn, at least there is the defect that hardware spending is large, resource utilization is low in the serializing management method of the fifo queue that prior art provides.Take accompanying drawing 1b as example, what suppose each node request in 10 nodes is different addresses, for example, without loss of generality, suppose node 0 request address 0 to address 59 node 1 request address 60 to address 119, node 2 request address 120 are to address 179,, node 9 request address 540 are to address 599, so, each fifo queue has only been used a container (Entry) to hold the request of these 10 nodes, and other containers (Entry) of each fifo queue are all in idle condition; Another kind of egregious cases is to suppose in 10 nodes that each node for example, with the identical address of its largest request number request,, suppose node 0, node 1, node 2,, node 9 is respectively separately to address 0 request 60 times, and all 10 nodes all enter queue FIFO to the request of address 0
(00), now, queue FIFO
(01)to queue FIFO
(599)all idle.Therefore, that a kind of situation all can not make the utilance of hardware reach 100%.
Summary of the invention
The embodiment of the present invention provides a kind of method and apparatus that Address requests is processed, to improve resource utilization.
The embodiment of the present invention provides a kind of method that Address requests is processed, and described method comprises: the request of arbitrary node Node1 to address Addra in receiving system, and described request at least comprises the sign Nid of described node Node1 and the sign Tid of described request; The described request to address Addra is stored in to the position corresponding with described sign Nid and described sign Tid, or before change storage to the described request to address Addra being stored in after the request of address Addra to the position corresponding with described sign Nid and described sign Tid.
The embodiment of the present invention provides a kind of device that Address requests is processed, described device comprises: receiver module, for the request of receiving system arbitrary node Node1 to address Addra, described request at least comprises the sign Nid of described node Node1 and the sign Tid of described request; Memory module, for the request to address Addra that described receiver module is received, be stored in the position corresponding with described sign Nid and described sign Tid, or before change storage to the described request to address Addra being stored in after the request of address Addra to the position corresponding with described sign Nid and described sign Tid.
From the invention described above embodiment, because to the request of address Addra being is stored in the position corresponding with described node identification Nid and described request sign Tid in strict accordance with the node identification Nid carrying in request and described request sign Tid.Therefore, the method that the embodiment of the present invention provides had both guaranteed when all nodes send all requests to all addresses have enough memory spaces, had guaranteed again the maximum utilization to hardware store resource, had improved the utilance of hardware resource.
Accompanying drawing explanation
In order to be illustrated more clearly in the technical scheme of the embodiment of the present invention, to the accompanying drawing of required use in prior art or embodiment description be briefly described below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those skilled in the art, can also obtain as these accompanying drawings other accompanying drawing.
Fig. 1 a is that the employing fifo queue that prior art provides is managed schematic diagram to a kind of serializing to Address requests of initiating from a plurality of nodes;
Fig. 1 b is that the employing fifo queue that prior art provides is managed schematic diagram to the another kind of serializing to Address requests of initiating from a plurality of nodes;
Fig. 2 is a kind of process flow schematic diagram to Address requests that the embodiment of the present invention provides;
Fig. 3 is the content-based reference to storage storage schematic diagram to the request of address that the embodiment of the present invention provides;
Fig. 4 a be the embodiment of the present invention provide to the schematic diagram that identifies of field in record;
Fig. 4 b be another embodiment of the present invention provide to the schematic diagram that identifies of field in record;
Fig. 4 c be another embodiment of the present invention provide to the schematic diagram that identifies of field in record;
Fig. 4 d be another embodiment of the present invention provide to the schematic diagram that identifies of field in record;
Fig. 5 a is the schematic diagram that storage resources is reclaimed that the embodiment of the present invention provides;
Fig. 5 b is the schematic diagram that storage resources is reclaimed that another embodiment of the present invention provides;
Fig. 5 c is the schematic diagram that storage resources is reclaimed that another embodiment of the present invention provides;
Fig. 5 d is the schematic diagram that storage resources is reclaimed that another embodiment of the present invention provides;
Fig. 6 is the processing method application scenarios schematic diagram to Address requests that the embodiment of the present invention provides;
Fig. 7 is the processing method application scenarios schematic diagram to Address requests that another embodiment of the present invention provides;
Fig. 8 is the processing unit structural representation to Address requests that the embodiment of the present invention provides;
Fig. 9 is the processing unit structural representation to Address requests that another embodiment of the present invention provides;
Figure 10 is the processing unit structural representation to Address requests that another embodiment of the present invention provides;
Figure 11 is the processing unit structural representation to Address requests that another embodiment of the present invention provides;
Figure 12 is the processing unit structural representation to Address requests that another embodiment of the present invention provides;
Figure 13 is the processing unit structural representation to Address requests that another embodiment of the present invention provides;
Figure 14 is the processing unit structural representation to Address requests that another embodiment of the present invention provides.
Embodiment
It is a kind of to the processing method of Address requests and device that the embodiment of the present invention provides, to improve resource utilization.
Referring to accompanying drawing 2, is a kind of process flow schematic diagram to Address requests that the embodiment of the present invention provides, and mainly comprises step
S201, the request of arbitrary node Node1 to address Addra in receiving system, described request at least comprises the sign Nid of described node Node1 and the sign Tid of described request.
In embodiments of the present invention, described system can be the fault-tolerant computer system of the multiprocessor in cloud computing field, node Node1 can be any caching agent (Cache Agent, CA) in fault-tolerant computer system, and sign Nid is for identifying node Node1.Because node Node1 can send a more than request to address Addra or other addresses, therefore, in embodiments of the present invention, the request to address Addra or other addresses that can use sign Tid to send node Node1 identifies, and is beneficial to distinguish each request that node Node1 sends.
S202, the described request to address Addra is stored in to described sign Nid and position corresponding to described sign Tid, or change before storage to the described request to address Addra being stored in after the request of address Addra to described sign Nid and position corresponding to described sign Tid.
In embodiments of the present invention, can be in advance for what all nodes in system sent all addresses, likely ask reserved storage space, a request takies a unit of memory space, the call number sign that the request mark of the request that the node identification in the unit use system of each memory space and described node send is converted into." likely asking " meaning is herein, because a node can not only send a request, in order to store these requests, must consider the possibility of all requests that all nodes in system send all addresses, for example, in supposing the system, there are 10 nodes, the Address requests that node can send mostly is 60 most, so, needing and need to be only reserved 600(=10 * 60 of these 10 nodes) unit of individual memory space stores these Address requests, so, both having guaranteed when all nodes send all requests to all addresses to have enough memory spaces, guaranteed again not waste hardware store resource.
In embodiments of the present invention, when receive first address Addra request time, the described request to address Addra is stored in to described sign Nid and position corresponding to described sign Tid; When not being the request of receiving first address Addra, before change storage to the described request to address Addra being stored in after the request of address Addra to described sign Nid and position corresponding to described sign Tid.
From the invention described above embodiment, because to the request of address Addra being is stored in the position corresponding with described node identification Nid and described request sign Tid in strict accordance with the node identification Nid carrying in request and described request sign Tid.Therefore, the method that the embodiment of the present invention provides had both guaranteed when all nodes send all requests to all addresses have enough memory spaces, had guaranteed again the maximum utilization to hardware store resource, had improved the utilance of hardware resource.
In embodiments of the present invention, receiving the also module of memory address request can be a buffer unit, for the request of temporary transient storage system node to address, therefore, in a way, this buffer unit is to sending a kind of coupling of the follow-up resource processing module of the node of Address requests and described buffer unit in access speed.
The serializing management method of the fifo queue providing according to prior art, when follow-up resource processing module need to obtain request while doing parallel processing from fifo queue, such fifo queue has no idea to accomplish effective differentiation, and in follow-up resource processing module, the request of each address is but of equal value.Take accompanying drawing 1b as example, suppose 4 of address A requests to enter FIFO(00) queue, 1 of address B request has been entered to FIFO(01) queue, and 2 of address C requests have been entered to FIFO(02) queue; What follow-up resource processing module 0 was processed is to 4 of address A requests, and what resource processing module 1 was processed is to 1 of address B request with to 2 of address C requests.If sometime 5 of address B requests have been entered again to FIFO(01) queue, this structure of fifo queue is difficult to statically to process (if when especially resource processing module 1 is in 2 of address C requests one) by 2 of address C requests being switched to resource processing module 0.Therefore, when this fifo queue changes in the face of dynamic request, be difficult to do efficient switching, parallel processing capability is poor, does not support QoS characteristic.And in embodiments of the present invention, receive and the module of memory address request when receiving that the request to address is read in the request of resource processing module, be parallel send described to the request of address Addra and to the request that is different from address Addra to described resource processing module, so that the request of reading described in described resource processing module basis is carried out corresponding operation for address, for example, from the corresponding memory cell in address reading out data or to address corresponding memory cell data writing etc.
The processing mode of this parallel transmission Address requests of the embodiment of the present invention need to be different in strict accordance with the principle of " first the elder generation of request is processed " from fifo queue in prior art,, in the method that the embodiment of the present invention provides, when receiving that the request to address is read in the request of resource processing module, can send simultaneously to the request of address Addra and to the request that is different from address Addra to described resource processing module, and needn't arrive according to Address requests the sequencing of buffer unit, send one by one Address requests.Particularly, can adopt the data structure of a chained list to realize to the request of address Addra, to being different from the request of address Addra, adopt the data structure of another chained list to realize, then, two chained lists are coupled together to (for example, the tail of a chained list being connected with the head of another chained list) transmission that can walk abreast to the request of address Addra with to being different from the request of address Addra.Obviously, this processing method has met the requirement of the parallel processing of follow-up resource processing module.
Can CAM (Content Addressable Memory, CAM) be below example, the processing method to Address requests provided by the invention is described.
Based on CAM to the processing method of Address requests in, step " is stored in the position corresponding with described sign Nid and described sign Tid by the described request to address Addra ": by described, the request of address Addra is stored in and described sign Nid and position corresponding to described sign Tid with the form of record, record wherein comprises following field:
Valid: represent that whether this record is effective;
Header: represent whether this record is first request to certain address;
Tail: represent whether this record is last request to certain address;
Addr: the address that identifies this request;
Entry0: identifying the particular content of this request, is mainly the data structure of this request;
Next: sign is for the next number of same Address requests, if the Tail field of this record has been set to effectively, ignore so Next field, if Tail field is invalid and Valid field is effective, when handling current record, need to operate next record according to the value of Next field so.Above-mentioned field can, by the characteristic of CAM, be located and search efficiently.
For field Valid, Header and Tail, can use " 1 " of two-valued function to represent that respectively this record is effective, this record is to be last request to certain address to first request of certain address and this record, use " 0 " of two-valued function to represent that respectively this protocol failure, this record are not or not last request to certain address to first request of certain address and this record; Also can use " 0 " of two-valued function to represent that respectively this record is effective, this record is to be last request to certain address to first request of certain address and this record, use " 1 " of two-valued function to represent that respectively this protocol failure, this record are not or not last request to certain address to first request of certain address and this record, certainly, the method for expressing that also has other, the present invention does not limit this.
CAM often receives a request, for example, the Address requests sending from CA in the fault-tolerant computer system of the multiprocessor in cloud computing field, CAM will will be stored in corresponding position with the form recording to the request of this address, or change before storage to after the record of the request of this address will to the request of this address with record form be stored in corresponding position, in other words, to an address request record once, each record takies a memory cell of CAM to CAM.Therefore, the present invention relates to " degree of depth " problem of CAM.The degree of depth of so-called CAM, in brief, refer to size or the number of memory cell wherein of the memory space of CAM, can be used for characterizing the storage capacity of CAM, the number of likely asking that it numerically must send all addresses with all nodes in system equates, for example, in the fault-tolerant computer system of the multiprocessor in cloud computing field, the number of node CA is 10, the maximum number to the request of address (not necessarily same address) that each CA can initiate is 60, so, the degree of depth of the CAM of receiver address request must be 600(=10 * 60).
The call number Index that the largest request number of the address that can send with number and each node of node is converted into identifies the position of each memory cell of CAM, for example, if the number of node is 4, each node is 64 to the largest request number of address, or, use 8 binary representation call number Index, can be by high 2 numbers that represent node, low 6 represent the largest request number of each node to address in 4 nodes.With 4 node CA0 in the fault-tolerant computer system of the multiprocessor in cloud computing field, CA1, CA2, with CA3 be example, (call number Index has all been converted into the decimal system) as shown in Figure 3, the value of call number Index is that the Address requests that sends of 0 to 63 sign storage CA0 node is (to record form, the position of memory cell down together) in CAM, the value of call number Index is the memory cell of the Address requests that sends of 64 to the 127 signs storages CA1 nodes position in CAM, the value of call number Index is the memory cell of the Address requests that sends of 128 to the 191 signs storages CA2 nodes position in CAM, the value of call number Index is the memory cell of the Address requests that sends of 192 to the 255 signs storages CA3 nodes position in CAM.Therefore, as long as the request mark (using Tid to represent in the embodiment of the present invention) of the request of carrying the node identification (using Nid to represent in the embodiment of the present invention) of the node sending request in request and sending, CAM just can find the position of corresponding memory cell in CAM, with the form recording, stores these requests.
Relation from call number Index and node identification and the request mark of accompanying drawing 3 examples, with node (for example, CA) number is 4, each node is that the fault-tolerant computer system of the multiprocessor in the cloud computing field of 64 is example to the largest request number of address, the method providing according to the embodiment of the present invention, only need the CAM that a degree of depth is 64 * 4 can meet all nodes with the parallel requirement that sends Address requests of its largest request number, and according to the FIFO sequencing method providing in background technology, need the fifo queue that 64 * 4 degree of depth are 64 * 4 could meet all nodes with the parallel requirement that sends Address requests of its largest request number, visible, the method that the embodiment of the present invention provides had both guaranteed that all nodes had enough memory spaces when all addresses are sent to all requests, guaranteed again the maximum utilization to hardware store resource, improved the utilance of hardware resource.
Take aforementioned embodiment illustrated in fig. 2 to the request of address Addra, be example.For the convenience describing the problem, in the method that the embodiment of the present invention provides, field Valid, Header and Tail are used " 1 " of two-valued function to represent that respectively this record is effective, this record is to be last request to certain address to first request of certain address and this record, use " 0 " of two-valued function to represent that respectively this protocol failure, this record are not or not last request to certain address to first request of certain address and this record.
Due to having carried in the request of address Addra the node identification Nid of the node of the request of address Addra and the described sign Tid to the request of address Addra, therefore, when the request of address Addra is stored in to described sign Nid and position corresponding to described sign Tid with the form of record, can be respectively to field Valid in described sign Nid and position corresponding to described sign Tid, field Header and field Tail identify and respectively to field Addr, to described field Entry0 with to described next number field Next, fill, wherein, the filling of next number field Next is needed to carry out according to the result that field Tail is identified, , if the result that field Tail is identified is described record, it not last request to address Addra, adopt to the memory location of next record of the request of address Addra corresponding sign fill the next number field Next to the request of address Addra.
For example, suppose that node CA0 initiates the 0th of address Addra the request (this request is cached in CAM, lower same) to HA, now, the Nid of node CA0 is designated 0, and request mark Tid is 0.CAM, after the request of receiving, by retrieval Addr field, finds and whether has the effectively record to address Addra.Owing to not existing, according to the conversion rule (rule is shown in the example of accompanying drawing 3) of call number Index and node identification and request mark, by CA0 to the 0th of address Addra the request take record form be stored in the memory cell that Index is 0, and field Valid, Header and Tail are designated respectively to " 1 ", note { Valid, Header, Tail}={1,1,1}, as shown in accompanying drawing 4a.
For another example, suppose that node CA1 initiates the 1st of address Addra the request to HA after node CA0 initiates the 0th of address Addra the request to HA, now, the Nid of node CA1 is designated 1, and request mark Tid is 1.CAM, after the request of receiving, by retrieval Addr field, finds and whether has the effectively record to address Addra.Owing to there being the effectively record to address Addra, the record to address Addra of storing before change, that is, in the memory cell that is 0 by Index, Tail field is set to 0, according to the conversion rule of the call number Index of accompanying drawing 3 examples and node identification and request mark, it is 65 memory cell that the request that the request mark Tid that node CA1 initiates is 1 should be stored in call number Index, therefore, in also should the memory cell that be 0 by Index, Next field be set to 65, represent next should to process call number Index and be 65 memory cell, , by CA1 to the 1st of address Addra the request take record form be stored in the memory cell that Index is 65, and field Valid and Tail are designated respectively to " 1 ", note { Valid, Tail}={1, 1}, as shown in accompanying drawing 4b.
Also as, suppose that, after node CA1 initiates the 1st of address Addra the request to HA, node CA2 is to HA initiation to the 2nd of address Addra the request, now, the Nid of node CA2 is designated 2, request mark Tid is 2.CAM, after the request of receiving, by retrieval Addr field, finds and whether has the effectively record to address Addra.Owing to there being the effectively record to address Addra, the record to address Addra of storing before change, that is, in the memory cell that is 65 by Index, Tail field is set to 0, according to the conversion rule of the call number Index of accompanying drawing 3 examples and node identification and request mark, it is 130 memory cell that the request that the request mark Tid that node CA2 initiates is 2 should be stored in call number Index, therefore, in also should the memory cell that be 65 by Index, Next field be set to 130, represent next should to process call number Index and be 130 memory cell, , by CA2 to the 2nd of address Addra the request take record form be stored in the memory cell that Index is 130, and field Valid and Tail are designated respectively to " 1 ", note { Valid, Tail}={1, 1}, as shown in accompanying drawing 4c.
Similarly, suppose that node CA0 initiates the 1st of address Addrb the request to HA, now, the Nid of node CA0 is designated 0, and request mark Tid is 1.CAM, after the request of receiving, by retrieval Addr field, finds and whether has the effectively record to address Addrb.Owing to not existing, according to the conversion rule (rule is shown in the example of accompanying drawing 3) of call number Index and node identification and request mark, by CA0 to the 1st of address Addrb the request take record form be stored in the memory cell that Index is 1, and field Valid, Header and Tail are designated respectively to " 1 ", note { Valid, Header, Tail}={1,1,1}, as shown in accompanying drawing 4d.
It should be noted that, filling for the next number field Next to the request of address Addra, if the result that field Tail is identified is corresponding record, be last request to address Addra, the next number field Next of the request of address Addra filled an invalid value or do not fill any value.For example, receive node CA0 to HA, initiate the 0th of address Addra the request after, before node CA1 initiates the 1st of address Addra the request to HA, what CAM thought current record is last request to address Addra, therefore, in the memory cell that CAM is temporarily 65 by Index, Next field is filled an invalid value or is not filled any value, as used X sign in accompanying drawing 4b; For another example, receive node CA1 to HA, initiate the 1st of address Addra the request after, before node CA2 initiates the 2nd of address Addra the request to HA, what CAM thought current record is last request to address Addra, therefore, in the memory cell that CAM is temporarily 130 by Index, Next field is filled an invalid value or is not filled any value, as used X sign in accompanying drawing 4c.
The record case to the request correspondence of address Addra for accompanying drawing 4d example, if follow-up resource module need to read the request of address Addra and the request to address Addrb from CAM simultaneously, can be by call number Index in 0,65 and 130 memory cell to sending in the lump follow-up resource module like this to the request of address Addrb in the request of address Addra and the memory cell that is 1 to call number Index, can improve the parallel processing capability of system.
When receiving that the request to address is read in the request of resource processing module, CAM is parallel to be sent to the request of address Addra with to the asking to resource processing module of address Addrb, can be to reclaiming to the request of address Addra with to the shared storage resources of the request of address Addrb of being read.The method that resource reclaims can be, by identifying with "No" respectively to the request of address Addra with to field Valid, field Header and field Tail in the record of the request correspondence of address Addrb of being read, according to the agreement of the embodiment of the present invention, it can be " 0 " sign by two-valued function, note { Valid, Header, Tail}={1,1,1}.It should be noted that, if the record to the request correspondence of address Addra being read described in the value of field Tail shows is not last request to described address Addra, that continue to reclaim that described field Next points to records shared storage resources to next of the request of address Addra, otherwise resource reclaims and leaves it at that.
For example, suppose that call number Index is read the request of address Addra in 0 memory cell, put call number Index and be record in 0 memory cell Valid, Header, Tail}={0,0,0}, as shown in accompanying drawing 5a, the result of recovery is as shown in accompanying drawing 5b.Due to before resource recovery (seeing shown in the memory cell that in accompanying drawing 4b, Index is 0), the value of field Tail shows that the record to the request correspondence of address Addra being read is not last request to address Addra, continue to reclaim that field Next points to next record of the request of address Addra (, Index is the record in 65 memory cell) shared storage resources, the field Header recording in the memory cell that is 65 by Index is set to { Header}={1}.
Put call number Index and be record in 65 memory cell Valid, Header, Tail}={0,0,0}, as shown in accompanying drawing 5b, the result of recovery is as shown in accompanying drawing 5c.Due to before resource recovery (seeing shown in the memory cell that in accompanying drawing 4c, Index is 65), the value of field Tail shows that the record to the request correspondence of address Addra being read is not last request to address Addra, continue to reclaim that field Next points to next record of the request of address Addra (, Index is the record in 130 memory cell) shared storage resources, the field Header recording in the memory cell that is 130 by Index is set to { Header}={1}.
Put call number Index and be record in 130 memory cell Valid, Header, Tail}={0,0,0}, as shown in accompanying drawing 5d.Due to before resource recovery (seeing shown in the memory cell that in accompanying drawing 4c, Index is 130), the value of field Tail shows that the record to the request correspondence of address Addra being read is last request to address Addra, finishes to reclaim the storage resources shared to the request of address Addra.
Similarly, suppose that call number Index is read the request of address Addrb in 1 memory cell, put call number Index and be record { Valid in 1 memory cell, Header, Tail}={0,0,0}, as shown in accompanying drawing 5c, the result of recovery is as shown in accompanying drawing 5d.Due to before resource recovery (seeing shown in the memory cell that in accompanying drawing 4d, Index is 1), the value of field Tail shows that the record to the request correspondence of address Addrb being read is last request to address Addrb, finishes to reclaim the storage resources shared to the request of address Addrb.
For the method that more specifically illustrates that the above embodiment of the present invention provides, below provide two application scenarioss of the method that the embodiment of the present invention provides.
Application scenarios one: in the fault-tolerant computer system of the multiprocessor in cloud computing field, the passage of hardware requests can walk abreast exist a plurality of, as shown in Figure 6, there is M (can think that a request channel is corresponding with a node) in request channel, that is, request channel 0(Req Ch0), request channel 1(Req Ch1) ..., request channel M-1(Req Ch M-1).The request channel of Fig. 6 example can be that CA is to the passage of the Address requests of HA transmission, resource processing module can be N,, resource processing module 0(Proc Engine0), resource processing module 1(Proc Engine1) ..., resource processing module N-1(Proc Engine N-1), resource processing module can require parallel processing to be stored in the request to address in CAM, M and N can equate, also can not wait, and so structure has increased the flexibility of Hardware Design.This processing method to the request of same address of while based on CAM, can expand at an easy rate, safeguard the configuration of different request channel numbers and resource processing number of modules, and this structure can guarantee that again the expense of hardware is minimum, the autgmentability of raising system, its principle can be with reference to foregoing embodiment.
Application scenarios two: because the conflict existence of request is uncertain, so the request collision of some address of CA request is large, the request collision of some address is little.The address little for a plurality of conflicts can connect with a single chained list,, adopt the mode that chained list connects that the request to the little address of a plurality of conflicts of using a plurality of chained lists to realize is connected into a chained list, so, a plurality of single request address of chained list management, as shown in Figure 7, the chained list 1 single request of management to address C and address B, the chained list 2 single requests of management to address G, address F, address E and address D.So, the stand-by period of resource processing module can be very short, and the efficiency of resource processing module can be very high.Address for medium conflict, also can adopt the same treatment method for the little address of a plurality of conflicts, with a single chained list, connect, use a chained list management several original " little chained lists ", so, the stand-by period of resource processing module can be relatively compromise, can realize the QoS of the request of processing, effectively promotes overall systematic function.
Refer to accompanying drawing 8, the processing unit structural representation to Address requests that the embodiment of the present invention provides.For convenience of explanation, only show the part relevant to the embodiment of the present invention.The processing unit to the request of same address of accompanying drawing 8 examples comprises receiver module 801 and memory module 802, wherein:
In the present invention, described system can be the fault-tolerant computer system of the multiprocessor in cloud computing field, node Node1 can be any caching agent (Cache Agent, CA) in fault-tolerant computer system, and sign Nid is for identifying node Node1.Because node Node1 can send a more than request to address Addra or other addresses, therefore, in the present embodiment, the request to address Addra or other addresses that can use sign Tid to send node Node1 identifies, and is beneficial to distinguish each request that node Node1 sends.
In the present embodiment, can be in advance for what all nodes in system sent all addresses, likely ask reserved storage space, a request takies a unit of memory space, the call number sign that the request mark of the request that the node identification in the unit use system of each memory space and described node send is converted into." likely asking " meaning is herein, because a node can not only send a request, in order to store these requests, must consider the possibility of all requests that all nodes in system send all addresses, for example, in supposing the system, there are 10 nodes, the Address requests that node can send mostly is 60 most, so, need and need to be only reserved 600(=10 * 60 of these 10 nodes) unit of individual memory space, memory module 802 these Address requests of storage, so, both having guaranteed when all nodes send all requests to all addresses to have enough memory spaces, guaranteed again not waste hardware store resource.
In the present embodiment, when receiver module 801 is received the request to address Addra first, memory module 802 is stored in the position corresponding with described sign Nid and described sign Tid by the described request to address Addra; When receiver module 801 is not the request of receiving first address Addra, before memory module 802 changes storage to the described request to address Addra being stored in after the request of address Addra to the position corresponding with described sign Nid and described sign Tid.
It should be noted that, above in the execution mode of the processing unit of Address requests, the division of each functional module only illustrates, can be as required in practical application, for example the facility of the configuration requirement of corresponding hardware or the realization of software is considered, and above-mentioned functions is distributed, by different functional modules, completed, be about to the described internal structure to the processing unit of the request of same address and be divided into different functional modules, to complete all or part of function described above.And, in practical application, corresponding functional module in the present embodiment can be to be realized by corresponding hardware, also can be completed by the corresponding software of corresponding hardware implement, for example, aforesaid receiver module, can be to have the hardware of arbitrary node Node1 to the request of address Addra in the aforementioned receiving system of execution, receiver for example, thus can be also to carry out general processor or other hardware devices that corresponding computer program completes aforementioned function, for another example aforesaid memory module, can be have carry out the aforementioned request to address Addra that described receiver module (or receiver) is received be stored in storage before described sign Nid and position corresponding to described sign Tid or change to the described request to address Addra being stored in after the request of address Addra to the hardware of the position functions that described sign Nid and described sign Tid are corresponding, memory for example, thereby can be also to carry out general processor or other hardware devices (each embodiment that this specification provides can apply foregoing description principle) that corresponding computer program completes aforementioned function.
With CAM (Content Addressable Memory, CAM) be example, memory module 802 is stored in described sign Nid and position corresponding to described sign Tid to the request of address Addra with the form of record specifically for what described receiver module 801 was received, or before change storage to the request of address Addra being stored in to described sign Nid and position corresponding to described sign Tid with the form recording by described after the request of address Addra.Record in performed " request of address Addra being stored in to the position corresponding with described sign Nid and described sign Tid with the form of record by the described " step of memory module 802 comprises following field:
Valid: represent that whether this record is effective;
Header: represent whether this record is first request to certain address;
Tail: represent whether this record is last request to certain address;
Addr: the address that identifies this request;
Entry0: identifying the particular content of this request, is mainly the data structure of this request;
Next: sign is for the next number of same Address requests, if the Tail field of this record has been set to effectively, ignore so Next field, if Tail field is invalid and Valid field is effective, when handling current record, need to operate next record according to the value of Next field so.
Above-mentioned field can, by the characteristic of CAM, be located and search efficiently.
For field Valid, Header and Tail, can use " 1 " of two-valued function to represent that respectively this record is effective, this record is to be last request to certain address to first request of certain address and this record, use " 0 " of two-valued function to represent that respectively this protocol failure, this record are not or not last request to certain address to first request of certain address and this record; Also can use " 0 " of two-valued function to represent that respectively this record is effective, this record is to be last request to certain address to first request of certain address and this record, use " 1 " of two-valued function to represent that respectively this protocol failure, this record are not or not last request to certain address to first request of certain address and this record, certainly, the method for expressing that also has other, the present invention does not limit this.
So, the memory module 802 of accompanying drawing 8 examples can comprise field processing submodule 901, for in described sign Nid and position corresponding to described sign Tid respectively to described field Valid, field Header and field Tail identifies and respectively to described field Addr, to described field Entry0 with to described next number field Next, fill the processing unit to Address requests that another embodiment of the present invention provides as shown in Figure 9.
Receiver module 801 is often received a request, for example, the Address requests sending from CA in the fault-tolerant computer system of the multiprocessor in cloud computing field, memory module 802 all will will be stored in corresponding position with the form recording to the request of this address, or change before storage to after the record of the request of this address will to the request of this address with record form be stored in corresponding position, in other words, once, each record takies a memory cell of CAM to a request record of 802 pairs of addresses of memory module.Therefore, the present invention relates to " degree of depth " problem of CAM.The degree of depth of so-called CAM, in brief, refer to size or the number of memory cell wherein of the memory space of CAM, can be used for characterizing the storage capacity of CAM, the number of likely asking that it numerically must send all addresses with all nodes in system equates, for example, in the fault-tolerant computer system of the multiprocessor in cloud computing field, the number of node CA is 10, the maximum number to the request of address (not necessarily same address) that each CA can initiate is 60, so, the degree of depth of the CAM of receiver address request must be 600(=10 * 60).
The call number Index that the largest request number of the address that can send with number and each node of node is converted into identifies the position of each memory cell of CAM, for example, if the number of node is 4, each node is 64 to the largest request number of address, or, use 8 binary representation call number Index, can be by high 2 numbers that represent node, low 6 represent the largest request number of each node to address in 4 nodes.With 4 node CA0 in the fault-tolerant computer system of the multiprocessor in cloud computing field, CA1, CA2, with CA3 be example, (call number Index has all been converted into the decimal system) as shown in Figure 3, the value of call number Index is that the Address requests that sends of 0 to 63 sign storage CA0 node is (to record form, the position of memory cell down together) in CAM, the value of call number Index is the memory cell of the Address requests that sends of 64 to the 127 signs storages CA1 nodes position in CAM, the value of call number Index is the memory cell of the Address requests that sends of 128 to the 191 signs storages CA2 nodes position in CAM, the value of call number Index is the memory cell of the Address requests that sends of 192 to the 255 signs storages CA3 nodes position in CAM.Therefore, as long as the request mark (using Tid to represent in the embodiment of the present invention) of the request of carrying the node identification (using Nid to represent in the embodiment of the present invention) of the node sending request in request and sending, memory module 802 just can find the position of corresponding memory cell in CAM, with the form recording, stores these requests.
Relation from call number Index and node identification and the request mark of accompanying drawing 3 examples, with node (for example, CA) number is 4, each node is that the fault-tolerant computer system of the multiprocessor in the cloud computing field of 64 is example to the largest request number of address, the method providing according to the embodiment of the present invention, only need the CAM that a degree of depth is 64 * 4 can meet all nodes with the parallel requirement that sends Address requests of its largest request number, and according to the FIFO sequencing method providing in background technology, need the fifo queue that 64 * 4 degree of depth are 64 * 4 could meet all nodes with the parallel requirement that sends Address requests of its largest request number, visible, the method that the embodiment of the present invention provides had both guaranteed that all nodes had enough memory spaces when all addresses are sent to all requests, guaranteed again the maximum utilization to hardware store resource, improved the utilance of hardware resource.
Take aforementioned embodiment illustrated in fig. 2 to the request of address Addra, be example.For the convenience describing the problem, in the method that the embodiment of the present invention provides, field Valid, Header and Tail are used " 1 " of two-valued function to represent that respectively this record is effective, this record is to be last request to certain address to first request of certain address and this record, use " 0 " of two-valued function to represent that respectively this protocol failure, this record are not or not last request to certain address to first request of certain address and this record.
To having carried in the request of address Addra the node identification Nid of the node of the request of address Addra and the described sign Tid to the request of address Addra, therefore, memory module 802 is when being stored in described sign Nid and position corresponding to described sign Tid to the request of address Addra with the form of record, can be field process submodule 901 in described sign Nid and position corresponding to described sign Tid respectively to field Valid, field Header and field Tail identify and respectively to field Addr, to described field Entry0 with to described next number field Next, fill, wherein, the filling of next number field Next is needed to carry out according to the result that field Tail is identified.
The filling of processing 901 couples of next number field Next of submodule due to field needs to carry out according to the result that field Tail is identified, therefore, field is processed submodule 901 and be may further include the first filler cells 1001, the processing unit to Address requests that another embodiment of the present invention provides as shown in Figure 10.If it is that described record is not last request to described address Addra that the first filler cells 1001 processes for field the result that 901 couples of field Tail of submodule identify, adopt the next number field Next to the request of the described address Addra of the corresponding sign filling of the memory location of next record of the request of address Addra institute.
For example, suppose that node CA0 initiates the 0th of address Addra the request (this request is cached in CAM, lower same) to HA, now, the Nid of node CA0 is designated 0, and request mark Tid is 0.Receiver module 801, after the request of receiving, by retrieval Addr field, is found and whether is had the effectively record to address Addra.Owing to not existing, according to the conversion rule (rule is shown in the example of accompanying drawing 3) of call number Index and node identification and request mark, memory module 802 by CA0 to the 0th of address Addra the request take record form be stored in the memory cell that Index is 0, and field is processed submodule 901 field Valid, Header and Tail is designated respectively to " 1 ", note { Valid, Header, Tail}={1,1,1}, as shown in accompanying drawing 4a.
For another example, suppose that node CA1 initiates the 1st of address Addra the request to HA after node CA0 initiates the 0th of address Addra the request to HA, now, the Nid of node CA1 is designated 1, and request mark Tid is 1.Receiver module 801, after the request of receiving, by retrieval Addr field, is found and whether is had the effectively record to address Addra.Owing to there is the effectively record to address Addra, the record to address Addra of storing before memory module 802 changes, that is, in the memory cell that is 0 by Index, Tail field is set to 0, according to the conversion rule of the call number Index of accompanying drawing 3 examples and node identification and request mark, it is 65 memory cell that the request that the request mark Tid that node CA1 initiates is 1 should be stored in call number Index, therefore, the first filler cells 1001 also should the memory cell that be 0 by Index in Next field be set to 65, represent next should to process call number Index and be 65 memory cell, , memory module 802 by CA1 to the 1st of address Addra the request take record form be stored in the memory cell that Index is 65, and field is processed submodule 901 field Valid and Tail is designated respectively to " 1 ", note { Valid, Tail}={1, 1}, as shown in accompanying drawing 4b (in figure).
Also as, suppose that, after node CA1 initiates the 1st of address Addra the request to HA, node CA2 is to HA initiation to the 2nd of address Addra the request, now, the Nid of node CA2 is designated 2, request mark Tid is 2.Receiver module 801, after the request of receiving, by retrieval Addr field, is found and whether is had the effectively record to address Addra.Owing to there is the effectively record to address Addra, the record to address Addra of storing before memory module 802 changes, that is, in the memory cell that is 65 by Index, Tail field is set to 0, according to the conversion rule of the call number Index of accompanying drawing 3 examples and node identification and request mark, it is 130 memory cell that the request that the request mark Tid that node CA2 initiates is 2 should be stored in call number Index, therefore, the first filler cells 1001 also should the memory cell that be 65 by Index in Next field be set to 130, represent next should to process call number Index and be 130 memory cell, , memory module 802 by CA2 to the 2nd of address Addra the request take record form be stored in the memory cell that Index is 130, and field is processed submodule 901 field Valid and Tail is designated respectively to " 1 ", note { Valid, Tail}={1, 1}, as shown in accompanying drawing 4c.
Similarly, suppose that node CA0 initiates the 1st of address Addrb the request to HA, now, the Nid of node CA0 is designated 0, and request mark Tid is 1.Receiver module 801, after the request of receiving, by retrieval Addr field, is found and whether is had the effectively record to address Addrb.Owing to not existing, according to the conversion rule (rule is shown in the example of accompanying drawing 3) of call number Index and node identification and request mark, memory module 802 by CA0 to the 1st of address Addrb the request take record form be stored in the memory cell that Index is 1, and field is processed submodule 901 field Valid, Header and Tail is designated respectively to " 1 ", note { Valid, Header, Tail}={1,1,1}, as shown in accompanying drawing 4d.
The filling of processing 901 couples of next number field Next of submodule due to field needs to carry out according to the result that field Tail is identified, therefore, field is processed submodule 901 and be may further include the second filler cells 1101, the processing unit to Address requests that another embodiment of the present invention provides as shown in Figure 11.If the result that the second filler cells 1101 identifies for 901 couples of field Tail of field processing submodule is described record is last request to described address Addra, the next number field Next of the request of described address Addra is filled an invalid value or do not fill any value.For example, at receiver module 801, receive after node CA0 initiates the 0th of address Addra the request to HA, before node CA1 initiates the 1st of address Addra the request to HA, what CAM thought current record is last request to address Addra, therefore, in the memory cell that the second filler cells 1101 is temporarily 65 by Index, Next field is filled an invalid value or is not filled any value, as used X sign in accompanying drawing 4b; For another example, at receiver module 801, receive after node CA1 initiates the 1st of address Addra the request to HA, before node CA2 initiates the 2nd of address Addra the request to HA, what CAM thought current record is last request to address Addra, therefore, in the memory cell that the second filler cells 1101 is temporarily 130 by Index, Next field is filled an invalid value or is not filled any value, as used X sign in accompanying drawing 4c.
Accompanying drawing 8 can also comprise resource sending module 1201 to accompanying drawing 11 arbitrary examples to the processing unit of the request of same address, the processing unit to Address requests that another embodiment of the present invention provides as shown in Figure 12.Sending module 1201 is for when receiving that the request to address is read in the request of resource processing module, parallel send described to the request of address Addra and to the request that is different from address Addra to described resource processing module, so that described resource processing module according to described in the request of reading for address carry out corresponding operation (for example, from the corresponding memory cell in address reading out data or to address corresponding memory cell data writing etc.).Particularly, can adopt the data structure of a chained list to realize to the request of address Addra, to being different from the request of address Addra, adopt the data structure of another chained list to realize, then, two chained lists are coupled together to (for example, the tail of a chained list being connected with the head of another chained list) transmission that can walk abreast to the request of address Addra with to being different from the request of address Addra.Obviously, this processing method has met the requirement of the parallel processing of follow-up resource processing module.
Accompanying drawing 8 can also comprise resource recycling module 1301 to accompanying drawing 12 arbitrary examples to the processing unit of Address requests, the processing unit to Address requests that another embodiment of the present invention provides as shown in Figure 13.
The resource recycling module 1301 of accompanying drawing 13 examples can also comprise identify unit 1401, the processing unit to Address requests that another embodiment of the present invention provides as shown in Figure 14.Identify unit 1401 is for identifying described record field Valid, field Header and the field Tail to the request correspondence of address Addra being read respectively with "No", according to the agreement of the embodiment of the present invention, it can be " 0 " sign by two-valued function, note { Valid, Header, Tail}={1,1,1}.It should be noted that, if the record to the request correspondence of address Addra being read described in the value of field Tail shows is not last request to described address Addra, also for continuing to reclaim, described field Next points to resource recycling module 1301 that next of the request of address Addra recorded to shared storage resources.
For example, suppose that call number Index is read the request of address Addra in 0 memory cell, to put call number Index be record { Valid in 0 memory cell to identify unit 1401, Header, Tail}={0,0,0}, as shown in accompanying drawing 5a, the result of recovery is as shown in accompanying drawing 5b.Due to before resource recovery (seeing shown in the memory cell that in accompanying drawing 4b, Index is 0), the value of field Tail shows that the record to the request correspondence of address Addra being read is not last request to address Addra, resource recycling module 1201 continue to reclaim field Next point to next record of the request of address Addra (, Index is the record in 65 memory cell) shared storage resources, the field Header recording in the memory cell that is 65 by Index is set to { Header}={1}.
Similarly, suppose that call number Index is read the request of address Addrb in 1 memory cell, to put call number Index be record { Valid in 1 memory cell to identify unit 1401, Header, Tail}={0,0,0}, as shown in accompanying drawing 5c, the result of recovery is as shown in accompanying drawing 5d.Due to before resource recovery (seeing shown in the memory cell that in accompanying drawing 4d, Index is 1), the value of field Tail shows that the record to the request correspondence of address Addrb being read is last request to address Addrb, and resource recycling module 1301 finishes to reclaim the storage resources shared to the request of address Addrb.
It should be noted that, accompanying drawing 13 and accompanying drawing 14 examples to the processing unit of Address requests in, in system, the number of node can equate with the number of described resource processing module, also can be unequal.What the embodiment of the present invention provided can be based on field programmable gate array (Field Programmable GateArray to the processing unit of Address requests, FPGA) or application-specific integrated circuit (ASIC) (Application Specific Integrated Circuit, ASIC) realize.
It should be noted that, the contents such as the information interaction between each module/unit of said apparatus, implementation, due to the inventive method embodiment based on same design, its technique effect bringing is identical with the inventive method embodiment, particular content can, referring to the narration in the inventive method embodiment, repeat no more herein.
One of ordinary skill in the art will appreciate that all or part of step in the whole bag of tricks of above-described embodiment is to come the hardware that instruction is relevant to complete by program, such as following the whole bag of tricks one or more or all:
The request of arbitrary node Node1 to address Addra in receiving system, described request at least comprises the sign Nid of described node Node1 and the sign Tid of described request;
The described request to address Addra is stored in to the position corresponding with described sign Nid and described sign Tid, or before change storage to the described request to address Addra being stored in after the request of address Addra to the position corresponding with described sign Nid and described sign Tid.
This program can be stored in a computer-readable recording medium, and storage medium can comprise: read-only memory (ROM, Read Only Memory), random access memory (RAM, Random Access Memory), disk or CD etc.
What above the embodiment of the present invention is provided is described in detail the processing method of Address requests and device, applied specific case herein principle of the present invention and execution mode are set forth, the explanation of above embodiment is just for helping to understand method of the present invention and core concept thereof; , for one of ordinary skill in the art, according to thought of the present invention, all will change in specific embodiments and applications, in sum, this description should not be construed as limitation of the present invention meanwhile.
Claims (17)
1. a method of Address requests being processed, is characterized in that, described method comprises:
The request of arbitrary node Node1 to address Addra in receiving system, described request at least comprises the sign Nid of described node Node1 and the sign Tid of described request;
The described request to address Addra is stored in to the position corresponding with described sign Nid and described sign Tid, or before change storage to the described request to address Addra being stored in after the request of address Addra to the position corresponding with described sign Nid and described sign Tid;
The memory cell that the call number that described and described sign Nid and position corresponding to described sign Tid refer to use described sign Nid and described sign Tid to convert and obtain identifies;
Described the described request to address Addra is stored in to the position corresponding with described sign Nid and described sign Tid, or being specially the described request to address Addra being stored in after the request of address Addra to the position corresponding with described sign Nid and described sign Tid of storage before change: by described, the request of address Addra is stored in and described sign Nid and position corresponding to described sign Tid with the form of record, or before change storage to the request of address Addra being stored in to the position corresponding with described sign Nid and described sign Tid with the form of record by described after the request of address Addra.
2. the method for claim 1, it is characterized in that, whether effectively described record comprises described record field Valid, whether described record is the field Header to first request of described address Addra, whether described record is the field Tail to last request of described address Addra, the value field Addr of described address Addra, to the particular content field Entry0 of the request of described address Addra and the next number field Next to the request of described address Addra, the described next number field Next to the request of address Addra points to next record to the request of address Addra,
Describedly by described, the request of address Addra be stored in to the position corresponding with described sign Nid and described sign Tid with the form of record comprise: with described sign Nid and position corresponding to described sign Tid respectively to described field Valid, field Header with field Tail identifies and respectively to described field Addr, fill to described field Entry0 with to described next number field Next.
3. method as claimed in claim 2, is characterized in that, the described next number field Next to the request of described address Addra fills and comprises:
If the result that described field Tail is identified is described record, be last request to described address Addra, the next number field Next of the request of described address Addra filled an invalid value or do not fill any value;
If the result that described field Tail is identified is described record, not last request to described address Addra, adopt the next number field Next that the corresponding sign in the memory location of next record of the request of address Addra is filled to the request of described address Addra.
4. the method for claim 1, it is characterized in that, described the described request to address Addra is stored in to the position corresponding with described sign Nid and described sign Tid, or further the comprising after the described request to address Addra being stored in after the request of address Addra to the position corresponding with described sign Nid and described sign Tid of storage before change:
When receiving that the request to address is read in the request of resource processing module, parallel send described to the request of address Addra and to the request of address that is different from address Addra to described resource processing module so that described resource processing module according to described in the request of reading for address, carry out corresponding operation.
5. method as claimed in claim 4, is characterized in that, described parallel transmission is described also to be comprised to described resource processing module to the request of address Addra with to being different from the request of the address of address Addra:
The described shared storage resources of the request to address being read is reclaimed.
6. method as claimed in claim 5, is characterized in that, described the described shared storage resources of the request to address being read is reclaimed and comprised:
By described be read field Valid, field Header and field Tail in the record of the request correspondence of address are identified with "No" respectively.
7. method as claimed in claim 6, it is characterized in that, if the record to the request correspondence of address being read described in the value of described field Tail shows is not last request to described address, that continue to reclaim that described field Next points to records shared storage resources to next of the request of described address.
8. the method as described in claim 1 to 7 any one, is characterized in that, in described system, the number of node equates with the number of described resource processing module or unequal.
9. a device of Address requests being processed, is characterized in that, described device comprises:
Receiver module, the request for receiving system arbitrary node Node1 to address Addra, described request at least comprises the sign Nid of described node Node1 and the sign Tid of described request;
Memory module, for the request to address Addra that described receiver module is received, be stored in the position corresponding with described sign Nid and described sign Tid, or before change storage to the described request to address Addra being stored in after the request of address Addra to the position corresponding with described sign Nid and described sign Tid;
The memory cell that the call number that described and described sign Nid and position corresponding to described sign Tid refer to use described sign Nid and described sign Tid to convert and obtain identifies;
Described memory module is stored in described sign Nid and described sign Tid corresponding position to the request of address Addra with the form of record specifically for what described receiver module was received, or before change storage to the request of address Addra being stored in to the position corresponding with described sign Nid and described sign Tid with the form of record by described after the request of address Addra;
10. device as claimed in claim 9, it is characterized in that, whether effectively described record comprises described record field Valid, whether described record is the field Header to first request of described address Addra, whether described record is the field Tail to last request of described address Addra, the value field Addr of described address Addra, to the particular content field Entry0 of the request of described address Addra and the next number field Next to the request of described address Addra, the described next number field Next to the request of address Addra points to next record to the request of address Addra,
Described memory module comprises:
Field is processed submodule, for the position corresponding with described sign Nid and described sign Tid respectively to described field Valid, field Header with field Tail identifies and respectively to described field Addr, fill to described field Entry0 with to described next number field Next.
11. devices as claimed in claim 10, is characterized in that, described field is processed submodule and comprised:
The first filler cells, if be that described record is not last request to described address Addra for the result that described field Tail is identified, adopt the next number field Next that the corresponding sign in the memory location of next record of the request of address Addra is filled to the request of described address Addra;
The second filler cells, if be that described record is last request to described address Addra for the result that described field Tail is identified, the next number field Next of the request of described address Addra filled an invalid value or do not fill any value.
12. devices as claimed in claim 10, is characterized in that, described device also comprises:
Sending module, for when receiving that the request to address is read in the request of resource processing module, parallel send described to the request of address Addra and to the request of address that is different from address Addra to described resource processing module so that described resource processing module according to described in the request of reading for address, carry out corresponding operation.
13. devices as claimed in claim 12, is characterized in that, described device also comprises:
Resource recycling module, for reclaiming the described shared storage resources of the request to address being read.
14. devices as claimed in claim 13, is characterized in that, described resource recycling module comprises:
Identify unit, for identifying described record field Valid, field Header and the field Tail to the request correspondence of address being read respectively with "No".
15. as the device of claim 14 as described in arbitrarily, it is characterized in that, if the record to the request correspondence of address being read described in described resource recycling module also shows for the value of described field Tail is not during to last request of described address, continue to reclaim that described field Next points to that next of the request of described address recorded to shared storage resources.
16. devices as described in claim 9 to 14 any one, is characterized in that, in described system, the number of node equates with the number of described resource processing module or unequal.
17. devices as described in claim 9 to 14 any one, is characterized in that, described device is realized based on on-site programmable gate array FPGA or application-specific integrated circuit ASIC.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/CN2011/077869 WO2012109869A1 (en) | 2011-08-01 | 2011-08-01 | Method and device for processing address request |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102439947A CN102439947A (en) | 2012-05-02 |
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