CN102426621A - Method for extracting parameters of equivalent circuit model of silicon-based on-chip transformer device - Google Patents

Method for extracting parameters of equivalent circuit model of silicon-based on-chip transformer device Download PDF

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CN102426621A
CN102426621A CN2011103578486A CN201110357848A CN102426621A CN 102426621 A CN102426621 A CN 102426621A CN 2011103578486 A CN2011103578486 A CN 2011103578486A CN 201110357848 A CN201110357848 A CN 201110357848A CN 102426621 A CN102426621 A CN 102426621A
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姜楠
黄风义
陈利轲
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SHANGHAI BIAOXIANG INFORMATION TECHNOLOGY Co Ltd
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Abstract

The invention relates to a novel analytical algorithm for extracting parameters of an equivalent circuit model of a silicon-based on-chip transformer device. According to the method provided by the invention, the values of parameters of all elements in the equivalent circuit model of the on-chip transformer are extracted by an analysis method of characteristic functions according to a measured S-parameter. By the adoption of the method, the problems such as multi valuedness, nonoptimal solution and the like which cannot be avoided fundamentally by the conventional iteration and fit methods can be solved. In the method, according to the linear rule abiding by a group of discovered characteristic functions in a whole frequency band, linear coefficients are directly used for solving the parameters of all the elements in the equivalent circuit model of the transformer. The method has the beneficial effect that the parameters are solved on the basis that the linear rule reflected by the characteristic functions reflects the attribute of a specific equivalent circuit model in a whole frequency interval to the greatest extent, therefore, high-accuracy simulation can be realized even not by virtue of curve-fitting.

Description

The method for distilling of silica-based equivalent circuit model parameter at the sheet transformer apparatus
Technical field
The present invention relates to a kind of method of extracting the equivalent circuit model parameter of transformer, particularly at the method for distilling of the equivalent circuit model parameter of sheet transformer apparatus.
Background technology
Because the explosive increase in wireless telecommunications market has driven RF IC (RFIC-radio frequency integratedcircuit) industry to higher levels of integrated.In CMOS (Complementary Metal Oxide Semiconductor) RF IC, transformer (Transformer) is a kind of passive important last element.Integrated on-chip transformer is one of critical technological point of passive device in the CMOS RF IC; Its main way of realization is snail transformer (Coplanar spiraltransformer); It utilizes interconnecting metal layer coiling transformer (O.E.Gharniti, et.al., " Characterization of Si-Based Monolithic Transformers with Patterned Ground Shield " on silicon chip of silicon technology; IEEERFIC Symp.Dig.; Pp.261-265, June, 2006).As unique a kind of widely used on-chip transformer, although the snail transformer can be realized the inductance value (approximately 1nH is to 10nH) of certain numerical value, to compare with the bonding line transformer, area is less, and precision is higher, and reliability is also better.Loss is big, quality factor (Quality factor but it still has; The Q value) low (maximal value of Q value is generally about in the of 10), shortcoming that noise is big; Its main cause has been the CMOS process using silicon substrate of a medium conduction (resistivity is ρ Si ≈ 0.01~10 Ω cm); Because the high frequency performance of heavy doping substrate is very bad,, therefore also just there are substrate loss and a large amount of ghost effects inevitably so the substrate that is adopted in the RF IC mixes relatively light (ρ Si ≈ 1~10 Ω cm); So this Q value is lower, need special technology to improve performance.In common resistance, electric capacity, inductance, these several kinds of passive devices of transformer; It is the most serious that the snail transformer is influenced by the substrate coupling effect beyond doubt; Because the snail transformer is a relatively more open structure; Electric field in the time of its work and magnetic field disperse (Pervasive) are penetrated among the entire substrate in a very big space.Recently, obtained the research of transformer optimization widely on integration and the loss silicon substrate.Yet the transformer of how describing with model has still constituted the main concerned issue of Radio Frequency Engineer.Set up a high-precision specific circuit model, effective method is to carry out measurement data or the accurate electromagnetical analogies circuit element parameter for the basis is extracted.Parameter extraction is almost completely appealed to the optimization of iterative fitting, and the convergence problem often suffers from many solutions of non-optimum.
Summary of the invention
Because the electric conductivity of CMOS silicon-based substrate; Transformer can receive the influence of serious substrate coupling effect when high frequency; Traditional equivalent-circuit model and parameter extracting method at the sheet transformer apparatus can not solve the iterative fitting problem, and each device parameter values and the actual value error of extraction are bigger.In order accurately to try to achieve each component parameters model, the present invention proposes a kind of new method, according to the S-parameter of measuring, utilizes the analytical method of fundamental function to be extracted in each device parameter values in the equivalent-circuit model of sheet transformer apparatus.The invention solves in the world at present in the iteration of the equivalent circuit model parameter that extracts the sheet transformer apparatus and approximating method problems such as the ambiguity that can't fundamentally avoid and non-optimum solution.One group of characteristic function that utilization of the present invention is found according to the linear rule that characteristic function is followed in whole frequency band, directly utilizes linear coefficient to find the solution each component parameters at sheet transformer apparatus equivalent-circuit model.This method is the linear rule that reflects according to fundamental function, has reflected the attribute of specific equivalent electrical circuit at whole frequency separation to the full extent.Thereby even the parameter of being tried to achieve not by means of curve fitting, also can realize the emulation of pinpoint accuracy.The present invention has high precision, well repeatable, and simple and feasible property etc.
Shown in Figure 1 is the silica-based equivalent electrical circuit at the sheet transformer apparatus of the present invention.Circuit model comprises following four parts: the Y of first sBy element C s, L s, L S1, R s, R S1Form second portion Y Sub1By element R 13, C 13, C Ox1s, C Ox1p, C Sub1s, R Sub1s, C Sub1p, R Sub1p, R 23, C 14Form third part Y Sub2By element R 24, C 24, C Ox2s, C Ox2p, C Sub2s, R Sub2s, C Sub2p, R Sub2p, R 14, C 23Form the 4th part Y pBy element C p, L p, L P1, R p, R P1Form; Said C s, C 13, C 14, C 23, C 24, C pBe electric capacity, L s, L S1, L p, L P1Be inductance, R s, R S1, R 13, R 14, R 23, R 24, R p, R P1Be resistance, C Ox1s, C Ox1p, C Ox2s, C Ox2pBe oxide layer electric capacity, C Sub1s, C Sub1p, C Sub2s, C Sub2pBe the stray capacitance of substrate, R Sub1s, R Sub1p, R Sub2s, R Sub2pDead resistance for silicon substrate; By element C Ox1s, C Sub1s, R Sub1sForm substrate part Y Sub1s, by element C Ox1p, C Sub1p, R Sub1pForm substrate part Y Sub1p, by element C Ox2s, C Sub2s, R Sub2sForm substrate part Y Sub2s, by element C Ox2p, C Sub2p, R Sub2pForm substrate part Y Sub2pY wherein Sub1, Y Sub2Two-part equivalent electrical circuit is symmetrical, and Y Sub1=Y Sub2
Said Y Sub1pThe part formula is:
Y sub 1 p = jω C ox 1 p - ω 2 R sub 1 p C ox 1 p C sub 1 p 1 + jω R sub 1 p ( C ox 1 p + C sub 1 p ) - - - ( 1 ) ;
The real part of formula (1) is write as:
f 1 ( ω ) = 1 real ( Y sub 1 p ) ω 2 = 1 R sub 1 p C ox 1 p 2 + R sub 1 p ( C ox 1 p + C sub 1 p ) 2 C ox 1 p 2 ω 2 , - - - ( 2 )
The imaginary part of formula (1) is write as:
f 2 ( ω ) = imag ( Y sub 1 p ) real ( Y sub 1 p ) ω = 1 R sub 1 p C ox 1 p + R sub 1 p C sub 1 p ( C ox 1 p + C sub 1 p ) 2 C ox 1 p ω 2 ; - - - ( 3 )
If following parameter a=R Sub1pC Ox1p 2, b=R Sub1p 2(C Ox1p+ C Sub1p) 2, c=C Ox1p, d=R Sub1p 2C Ox1pC Sub1p(C Ox1p+ C Sub1p), Y then Sub1pReal number and imaginary part formula write as:
f 1 ( ω ) = 1 real ( Y sub 1 p ) ω 2 = 1 a + b a ω 2 , - - - ( 4 )
f 2 ( ω ) = imag ( Y sub 1 p ) real ( Y sub 1 p ) ω = c a + d a ω 2 ; - - - ( 5 )
Obtain f through test value 1(ω) and f 2(ω), according to f 1(ω) and f 2The fundamental function of (ω) being explained is respectively to ω 2Mapping, the result is as shown in Figure 2, and it has shown good linear relationship, in linear interval, according to f 1(ω) and f 2(ω) and ω 2The rate of curve of linear graph is obtained b/a and d/a respectively, according to f 1(ω) and f 2(ω) and ω 2The curve intercept of linear graph is obtained 1/a and a/c.
According to the result that records of b/a, d/a, 1/a, a/c, obtain the value of a, b, c, d, bring the value of solving into equation a=R Sub1pC Ox1p 2, b=R Sub1p 2(C Ox1p+ C Sub1p) 2, c=C Ox1p, d=R Sub1p 2C Ox1pC Sub1p(C Ox1p+ C Sub1p), obtain Y Sub1pEach device parameter values.
Description of drawings
Below in conjunction with accompanying drawing and embodiment the present invention is further specified.
Fig. 1 is silica-based equivalent electrical circuit at the sheet transformer;
Fig. 2 is f 1(ω) and f 2(ω) and ω 2Graph of a relation;
Fig. 3 is the transformer model induction quality factor simulation value of two d81 and d90 and the comparison of measured value.
Among the figure
100-Y s, silica-based first in the equivalent electrical circuit of sheet transformer comprises R s, L s, C s, R S1, L S1
111-R s, resistance
112-L s, inductance
113-C s, electric capacity
114-R S1, resistance
115-L S1, inductance
120-Y Sub1, silica-based second portion in the equivalent electrical circuit of sheet transformer comprises R 13, C 13, C Ox1s, C Ox1p, R Sub1s, C Sub1s, R Sub1p, C Sub1p, R 23, C 14
121-R 13, resistance
122-C 13, electric capacity
123-C Ox1s, oxide layer electric capacity
124-C Ox1p, oxide layer electric capacity
125-R Sub1s, the dead resistance of silicon substrate
126-C Sub1s, the stray capacitance of silicon substrate
127-R Sub1p, the dead resistance of silicon substrate
128-C Sub1p, the stray capacitance of silicon substrate
161-R 23, resistance
152-C 14, electric capacity
130-Y Sub2, the third part of silica-based equivalent electrical circuit at the sheet transformer comprises R 24, C 24, C Ox2s, C Ox2p, R Sub2s, C Sub2s, R Sub2p, C Sub2p, R 14, C 23
131-R 24, resistance
132-C 24, electric capacity
133-C Ox2s, oxide layer electric capacity
134-C Ox2p, oxide layer electric capacity
135-R Sub2s, the dead resistance of silicon substrate
136-C Sub2s, the stray capacitance of silicon substrate
137-R Sub2p, the dead resistance of silicon substrate
138-C Sub2p, the stray capacitance of silicon substrate
151-R 14, resistance
162-C 23, electric capacity
140-Y p, silica-based the 4th part in the equivalent electrical circuit of sheet transformer comprises C p, L p, L P1, R p, R P1
141-R p, resistance
142-L p, inductance
143-C p, electric capacity
144-R P1, resistance
145-L P1, inductance
210-Y Sub1s, substrate partly comprises C Ox1s, C Sub1s, R Sub1s
220-Y Sub1p, substrate partly comprises C Ox1p, C Sub1p, R Sub1p
230-Y Sub2s, substrate partly comprises C Ox2s, C Sub2s, R Sub2s
240-Y Sub2p, substrate partly comprises C Ox2p, C Sub2p, R Sub2p
Embodiment
Shown in Figure 1 is the silica-based equivalent electrical circuit at the sheet transformer of the present invention.Its circuit model comprises following four parts: the Y of first s(100) by element C s(113), L s(112), L S1(115), R s(111), R S1(114) form; Second portion Y Sub1(120) by element R 13(121), C 13(122), C Ox1s(123), C Ox1p(124), C Sub1s(126), R Sub1s(125), C Sub1p(128), R Sub1p(127), R 23(161), C 14(152) form; Third part Y Sub2(130) by element R 24(131), C 24(132), C Ox2s(133), C Ox2p(134), C Sub2s(135), R Sub2s(136), C Sub2p(137), R Sub2p(138), R 14(151), C 23(162) form; The 4th part Y p(140) by element C p(143), L p(142), L P1(145), R p(141), R P1(144) form; By element C Ox1s(123), C Sub1s(126), R Sub1s(125) form Y Sub1s(210), by element C Ox1p(124), C Sub1p(128), R Sub1p(127) form Y Sub1p(220), by element C Ox2s(133), C Sub2s(135), R Sub2s(136) form Y Sub2s(230), by element C Ox2p(134), C Sub2p(137), R Sub2p(138) form Y Sub2p(240).
Y Sub1pThe solution procedure of each device parameter values (220):
The f that obtains through test value 1(ω) and f 2(ω), according to f 1(ω) and f 2The fundamental function of (ω) being explained is respectively to ω 2Mapping, the result is as shown in Figure 2, from figure, sees f 1(ω) and f 2(ω) and ω 2Between good linear relationship is arranged, in linear interval, according to f 1(ω) and f 2(ω) and ω 2The rate of curve of linear graph is obtained b/a and d/a respectively, according to f 1(ω) and f 2(ω) and ω 2The curve intercept of linear graph is obtained 1/a and a/c.
According to the result that records of b/a, d/a, 1/a, a/c, obtain the value of a, b, c, d, bring the value of solving into equation a=R Sub1pC Ox1p 2, b=R Sub1p 2(C Ox1p+ C Sub1p) 2, c=C Ox1p, d=R Sub1p 2C Ox1pC Sub1p(C Ox1p+ C Sub1p), obtain Y Sub1pEach device parameter values.
Fig. 3 is two d81 and the transformer model induction quality factor simulation value of d90 and the comparison of measured value, has verified that the method for distilling of the equivalent model circuit parameter at the sheet transformer of the present invention has been obtained useful effect, and obvious improvement is arranged.
Y Sub1sThe solution procedure of each device parameter values (210):
Said Y Sub1sThe part formula is:
Y sub 1 s = jω C ox 1 s - ω 2 R sub 1 s C ox 1 s C sub 1 s 1 + jω R sub 1 s ( C ox 1 s + C sub 1 s ) - - - ( 6 ) ;
The real part of formula (6) is write as:
f 3 ( ω ) = 1 real ( Y sub 1 s ) ω 2 = 1 R sub 1 s C ox 1 s 2 + R sub 1 s ( C ox 1 s + C sub 1 s ) 2 C ox 1 s 2 ω 2 , - - - ( 7 )
The imaginary part of formula (6) is write as:
f 4 ( ω ) = imag ( Y sub 1 s ) real ( Y sub 1 s ) ω = 1 R sub 1 s C ox 1 s + R sub 1 s C sub 1 s ( C ox 1 s + C sub 1 s ) 2 C ox 1 s ω 2 ; - - - ( 8 )
If following parameter a 1=R Sub1sC Ox1s 2, b 1=R Sub1s 2(C Ox1s+ C Sub1s) 2, c 1=C Ox1s, d 1=R Sub1s 2C Ox1sC Sub1s(C Ox1s+ C Sub1s), Y then Sub1sReal number and imaginary part write as:
f 3 ( ω ) = 1 real ( Y sub 1 s ) ω 2 = 1 a 1 + b 1 a 1 ω 2 , - - - ( 9 )
f 4 ( ω ) = imag ( Y sub 1 s ) real ( Y sub 1 s ) ω = c 1 a 1 + d 1 a 1 ω 2 ; - - - ( 10 )
The f that obtains through test value 3(ω) and f 4(ω), according to f 3(ω) and f 4The fundamental function of (ω) being explained is respectively to ω 2Mapping is in linear interval, according to f 3(ω) and f 4(ω) and ω 2The rate of curve of linear graph is obtained b respectively 1/ a 1And d 1/ a 1, according to f 3(ω) and f 4(ω) and ω 2The curve intercept of linear graph is obtained 1/a 1And a 1/ c 1
According to b 1/ a 1, d 1/ a 1, 1/a 1, a 1/ c 1Record the result, obtain a 1, b 1, c 1, d 1Value, bring the value of solving into equation a 1=R Sub1sC Ox1s 2, b 1=R Sub1s 2(C Ox1s+ C Sub1s) 2, c 1=C Ox1s, d 1=R Sub1s 2C Ox1sC Sub1s(C Ox1s+ C Sub1s), obtain Y Sub1sEach device parameter values.
Y Sub2sThe solution procedure of each device parameter values (230):
Said Y Sub2sThe part formula is:
Y sub 2 s = jω C ox 2 s - ω 2 R sub 2 s C ox 2 s C sub 2 s 1 + jω R sub 2 s ( C ox 2 s + C sub 2 s ) - - - ( 11 ) ;
The real part of formula (11) is write as:
f 5 ( ω ) = 1 real ( Y sub 2 s ) ω 2 = 1 R sub 2 s C ox 2 s 2 + R sub 2 s ( C ox 2 s + C sub 2 s ) 2 C ox 2 s 2 ω 2 , - - - ( 12 )
The imaginary part of formula (11) is write as:
f 6 ( ω ) = imag ( Y sub 2 s ) real ( Y sub 2 s ) ω = 1 R sub 2 s C ox 2 s + R sub 2 s C sub 2 s ( C ox 2 s + C sub 2 s ) 2 C ox 2 s ω 2 ; - - - ( 13 )
If following parameter a 2=R Sub2sC Ox2s 2, b 2=R Sub2s 2(C Ox2s+ C Sub2s) 2, c 2=C Ox2s, d 2=R Sub2s 2C Ox2sC Sub2s(C Ox2s+ C Sub2s), Y then Sub2sReal number and imaginary part write as:
f 5 ( ω ) = 1 real ( Y sub 2 s ) ω 2 = 1 a 2 + b 2 a 2 ω 2 , - - - ( 14 )
f 6 ( ω ) = imag ( Y sub 2 s ) real ( Y sub 2 s ) ω = c 2 a 2 + d 2 a 2 ω 2 ; - - - ( 15 )
The f that obtains through test value 5(ω) and f 6(ω), according to f 5(ω) and f 6The fundamental function of (ω) being explained is respectively to ω 2Mapping is in linear interval, according to f 5(ω) and f 6(ω) and ω 2The rate of curve of linear graph is obtained b respectively 2/ a 2And d 2/ a 2, according to f 5(ω) and f 6(ω) and ω 2The curve intercept of linear graph is obtained 1/a 2And a 2/ c 2
According to b 2/ a 2, d 2/ a 2, 1/a 2, a 2/ c 2Record the result, obtain a 2, b 2, c 2, d 2Value, bring the value of solving into equation a 2=R Sub2sC Ox2s 2, b 2=R Sub2s 2(C Ox2s+ C Sub2s) 2, c 2=C Ox2s, d 2=R Sub2s 2C Ox2sC Sub2s(C Ox2s+ C Sub2s), obtain Y Sub2sEach device parameter values.
Y Sub2pThe solution procedure of each device parameter values (240):
Said Y Sub2pThe part formula is:
Y sub 2 p = jω C ox 2 p - ω 2 R sub 2 p C ox 2 p C sub 2 p 1 + jω R sub 2 p ( C ox 2 p + C sub 2 p ) - - - ( 16 ) ;
The real part of formula (16) is write as:
f 7 ( ω ) = 1 real ( Y sub 2 p ) ω 2 = 1 R sub 2 p C ox 2 p 2 + R sub 2 p ( C ox 2 p + C sub 2 p ) 2 C ox 2 p 2 ω 2 , - - - ( 17 )
The imaginary part of formula (16) is write as:
f 8 ( ω ) = imag ( Y sub 2 p ) real ( Y sub 2 p ) ω = 1 R sub 2 p C ox 2 p + R sub 2 p C sub 2 p ( C ox 2 p + C sub 2 p ) 2 C ox 2 p ω 2 ; - - - ( 18 )
If following parameter a 3=R Sub2pC Ox2p 2, b 3=R Sub2p 2(C Ox2p+ C Sub2p) 2, c 3=C Ox2p, d 3=R Sub2p 2C Ox2pC Sub2p(C Ox2p+ C Sub2p), Y then Sub2pReal number and imaginary part write as:
f 7 ( ω ) = 1 real ( Y sub 2 p ) ω 2 = 1 a 3 + b 3 a 3 ω 2 , - - - ( 19 )
f 8 ( ω ) = imag ( Y sub 2 p ) real ( Y sub 2 p ) ω = c 3 a 3 + d 3 a \ 3 ω 2 ; - - - ( 20 )
The f that obtains through test value 5(ω) and f 6(ω), according to f 5(ω) and f 6The fundamental function of (ω) being explained is respectively to ω 2Mapping is in linear interval, according to f 5(ω) and f 6(ω) and ω 2The rate of curve of linear graph is obtained b respectively 3/ a 3And d 3/ a 3, according to f 5(ω) and f 6(ω) and ω 2The curve intercept of linear graph is obtained 1/a 3And a 3/ c 3
According to b 3/ a 3, d 3/ a 3, 1/a 3, a 3/ c 3Record the result, obtain a 3, b 3, c 3, d 3Value, bring the value of solving into equation a 3=R Sub2pC Ox2p 2, b 3=R Sub2p 2(C Ox2p+ C Sub2p) 2, c 3=C Ox2p, d 3=R Sub2p 2C Ox2pC Sub2p(C Ox2p+ C Sub2p), obtain Y Sub2pEach device parameter values.
Above-described embodiment only is technological thought and the characteristics for explanation patent of the present invention; And can not with qualification claim of the present invention; Every equalization of doing according to the thought that patent of the present invention disclosed changes or modifies, and must be encompassed in the protection domain of this patent claims.

Claims (3)

1. the method for distilling of a silica-based equivalent circuit model parameter at the sheet transformer apparatus is characterized in that the S-parameter of said method through measuring, and utilizes the analytical method of fundamental function to be extracted in each device parameter values in the equivalent-circuit model of sheet transformer apparatus; Said fundamental function comprises following four parts: the Y of first sBy element C s, L s, L S1, R s, R S1Form second portion Y Sub1By element R 13, C 13, C Ox1s, C Ox1p, C Sub1s, R Sub1s, C Sub1p, R Sub1p, R 23, C 14Form third part Y Sub2By element R 24, C 24, C Ox2s, C Ox2p, C Sub2s, R Sub2s, C Sub2p, R Sub2p, R 14, C 23Form the 4th part Y pBy element C p, L p, L P1, R p, R P1Form; The said C that states s, C 13, C 24, C p, C 23, C 14Be electric capacity, L s, L S1, L p, L P1Be inductance, R s, R S1, R 13, R 24, R 23, R 14, R p, R P1Be resistance, C Ox1s, C Ox1p, C Ox2s, C Ox2pBe oxide layer electric capacity, C Sub1s, C Sub1p, C Sub2s, C Sub2pBe the stray capacitance of silicon substrate, R Sub1s, R Sub1p, R Sub2s, R Sub2pDead resistance for silicon substrate; By element C Ox1s, C Sub1s, R Sub1sForm substrate part Y Sub1s, by element C Ox1p, C Sub1p, R Sub1pForm substrate part Y Sub1p, by element C Ox2s, C Sub2s, R Sub2sForm substrate part Y Sub2s, by element C Ox2p, C Sub2p, R Sub2pForm substrate part Y Sub2p
Y wherein Sub1pThe part formula is:
Y sub 1 p = jω C ox 1 p - ω 2 R sub 1 p C ox 1 p C sub 1 p 1 + jω R sub 1 p ( C ox 1 p + C sub 1 p ) ;
The real part of formula (1) is:
If a=R Sub1pC Ox1p 2, b=R Sub1p 2(C Ox1p+ C Sub1p) 2, c=C Ox1p, d=R Sub1p 2C Ox1pC Sub1p(C Ox1p+ C Sub1p), Y then Sub1pThe part formula is write as:
f 1 ( ω ) = 1 real ( Y sub 1 p ) ω 2 = 1 a + b a ω 2 ,
f 2 ( ω ) = imag ( Y sub 1 p ) real ( Y sub 1 p ) ω = c a + d a ω 2 ;
The f that obtains through test value 1(ω) and f 2(ω), according to f 1(ω) and f 2The fundamental function of (ω) being explained is respectively to ω 2Mapping; In linear interval, obtain b/a and d/a according to rate of curve, obtain 1/a and a/c according to the curve intercept; Result according to finding the solution a, b, c, d obtains Y Sub1pEach device parameter values.
2. method according to claim 1 is characterized in that, said Y Sub1s, Y Sub2s, Y Sub2pEach device parameter values solution procedure with obtain Y Sub1pEach device parameter values identical.
3. method according to claim 1 is characterized in that, said Y Sub1, Y Sub2Two-part equivalent electrical circuit is symmetrical, and Y Sub1=Y Sub2
CN201110357848.6A 2011-11-11 2011-11-11 The extracting method of parameters of equivalent circuit model of silicon-based on-chip transformer device Expired - Fee Related CN102426621B (en)

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JP2004119633A (en) * 2002-09-25 2004-04-15 Matsushita Electric Ind Co Ltd Method and apparatus for extracting model parameters
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CN106777483A (en) * 2016-11-18 2017-05-31 东南大学 For the on-chip inductor equivalent-circuit model and parameter extracting method of integrated circuit
CN106777483B (en) * 2016-11-18 2019-10-11 东南大学 On-chip inductor equivalent-circuit model and parameter extracting method for integrated circuit

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