CN102414659B - 用于在多线程微处理器中调度指令的发布的方法和设备 - Google Patents

用于在多线程微处理器中调度指令的发布的方法和设备 Download PDF

Info

Publication number
CN102414659B
CN102414659B CN201080018675.9A CN201080018675A CN102414659B CN 102414659 B CN102414659 B CN 102414659B CN 201080018675 A CN201080018675 A CN 201080018675A CN 102414659 B CN102414659 B CN 102414659B
Authority
CN
China
Prior art keywords
instruction
instructions
thread
limit priority
priority
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201080018675.9A
Other languages
English (en)
Chinese (zh)
Other versions
CN102414659A (zh
Inventor
A·D·韦伯
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Harrow Software Co ltd
Imagination Technologies Ltd
MIPS Tech LLC
Original Assignee
Imagination Technologies Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Imagination Technologies Ltd filed Critical Imagination Technologies Ltd
Publication of CN102414659A publication Critical patent/CN102414659A/zh
Application granted granted Critical
Publication of CN102414659B publication Critical patent/CN102414659B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3842—Speculative instruction execution
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked
    • G06F9/4818—Priority circuits therefor
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multimedia (AREA)
  • Advance Control (AREA)
CN201080018675.9A 2009-04-28 2010-04-27 用于在多线程微处理器中调度指令的发布的方法和设备 Active CN102414659B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
GB0907286.9 2009-04-28
GB0907286A GB2469822B (en) 2009-04-28 2009-04-28 Method and apparatus for scheduling the issue of instructions in a multithreaded microprocessor
PCT/GB2010/000832 WO2010125336A1 (en) 2009-04-28 2010-04-27 Method and apparatus for scheduling the issue of instructions in a multithreaded microprocessor

Publications (2)

Publication Number Publication Date
CN102414659A CN102414659A (zh) 2012-04-11
CN102414659B true CN102414659B (zh) 2014-10-29

Family

ID=40791924

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201080018675.9A Active CN102414659B (zh) 2009-04-28 2010-04-27 用于在多线程微处理器中调度指令的发布的方法和设备

Country Status (6)

Country Link
US (2) US9189241B2 (https=)
EP (1) EP2425329B8 (https=)
JP (1) JP5631976B2 (https=)
CN (1) CN102414659B (https=)
GB (1) GB2469822B (https=)
WO (1) WO2010125336A1 (https=)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102063291B (zh) * 2011-01-13 2013-08-28 上海大学 一种前瞻线程的多级并行执行方法
US20140007087A1 (en) * 2012-06-29 2014-01-02 Mark Scott-Nash Virtual trusted platform module
US9218185B2 (en) 2014-03-27 2015-12-22 International Business Machines Corporation Multithreading capability information retrieval
US9921848B2 (en) 2014-03-27 2018-03-20 International Business Machines Corporation Address expansion and contraction in a multithreading computer system
US9594660B2 (en) 2014-03-27 2017-03-14 International Business Machines Corporation Multithreading computer system and program product for executing a query instruction for idle time accumulation among cores
US9804846B2 (en) 2014-03-27 2017-10-31 International Business Machines Corporation Thread context preservation in a multithreading computer system
US9354883B2 (en) 2014-03-27 2016-05-31 International Business Machines Corporation Dynamic enablement of multithreading
US9417876B2 (en) 2014-03-27 2016-08-16 International Business Machines Corporation Thread context restoration in a multithreading computer system
US10102004B2 (en) 2014-03-27 2018-10-16 International Business Machines Corporation Hardware counters to track utilization in a multithreading computer system
CN108279927B (zh) * 2017-12-26 2020-07-31 芯原微电子(上海)股份有限公司 可调整指令优先级的多通道指令控制方法及系统、控制器
US11314516B2 (en) * 2018-01-19 2022-04-26 Marvell Asia Pte, Ltd. Issuing instructions based on resource conflict constraints in microprocessor
CN108710506B (zh) * 2018-05-31 2021-01-22 北京智行者科技有限公司 车辆的指令处理方法
CN111984387B (zh) * 2020-08-26 2024-06-25 上海兆芯集成电路股份有限公司 用于调度发布队列中指令的方法及处理器
US11656877B2 (en) * 2021-03-31 2023-05-23 Advanced Micro Devices, Inc. Wavefront selection and execution
JP7589712B2 (ja) 2022-05-17 2024-11-26 トヨタ自動車株式会社 リソース管理装置、リソース管理方法及びリソース管理用コンピュータプログラム

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0583089A2 (en) * 1992-08-12 1994-02-16 Advanced Micro Devices, Inc. Instruction decoder
CN101324851A (zh) * 2007-06-12 2008-12-17 华为技术有限公司 线程调度方法及其装置

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08179946A (ja) * 1994-12-26 1996-07-12 Toshiba Corp プロセッサ
GB2311882B (en) * 1996-04-04 2000-08-09 Videologic Ltd A data processing management system
US6658447B2 (en) * 1997-07-08 2003-12-02 Intel Corporation Priority based simultaneous multi-threading
JP2001092657A (ja) * 1999-09-22 2001-04-06 Toshiba Corp 中央演算装置、コンパイル方法、及びコンパイルプログラムを記録した記録媒体
US6658551B1 (en) * 2000-03-30 2003-12-02 Agere Systems Inc. Method and apparatus for identifying splittable packets in a multithreaded VLIW processor
GB2372847B (en) * 2001-02-19 2004-12-29 Imagination Tech Ltd Control of priority and instruction rates on a multithreaded processor
US7051195B2 (en) * 2001-10-26 2006-05-23 Hewlett-Packard Development Company, L.P. Method of optimization of CPU and chipset performance by support of optional reads by CPU and chipset
JP3816844B2 (ja) * 2002-07-05 2006-08-30 富士通株式会社 プロセッサ及び命令制御方法
US6950925B1 (en) * 2002-08-28 2005-09-27 Advanced Micro Devices, Inc. Scheduler for use in a microprocessor that supports data-speculative execution
US20040168045A1 (en) * 2003-02-21 2004-08-26 Dale Morris Out-of-order processor executing speculative-load instructions
US20040225870A1 (en) * 2003-05-07 2004-11-11 Srinivasan Srikanth T. Method and apparatus for reducing wrong path execution in a speculative multi-threaded processor
US7366877B2 (en) * 2003-09-17 2008-04-29 International Business Machines Corporation Speculative instruction issue in a simultaneously multithreaded processor
GB2415060B (en) 2004-04-16 2007-02-14 Imagination Tech Ltd Dynamic load balancing
US7237094B2 (en) * 2004-10-14 2007-06-26 International Business Machines Corporation Instruction group formation and mechanism for SMT dispatch
US8756605B2 (en) * 2004-12-17 2014-06-17 Oracle America, Inc. Method and apparatus for scheduling multiple threads for execution in a shared microprocessor pipeline
US7254697B2 (en) * 2005-02-11 2007-08-07 International Business Machines Corporation Method and apparatus for dynamic modification of microprocessor instruction group at dispatch
US7631308B2 (en) * 2005-02-11 2009-12-08 International Business Machines Corporation Thread priority method for ensuring processing fairness in simultaneous multi-threading microprocessors
JP2006343872A (ja) * 2005-06-07 2006-12-21 Keio Gijuku マルチスレッド中央演算装置および同時マルチスレッディング制御方法
US20070294693A1 (en) * 2006-06-16 2007-12-20 Microsoft Corporation Scheduling thread execution among a plurality of processors based on evaluation of memory access data

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0583089A2 (en) * 1992-08-12 1994-02-16 Advanced Micro Devices, Inc. Instruction decoder
CN101324851A (zh) * 2007-06-12 2008-12-17 华为技术有限公司 线程调度方法及其装置

Also Published As

Publication number Publication date
US20160055002A1 (en) 2016-02-25
GB2469822A (en) 2010-11-03
GB0907286D0 (en) 2009-06-10
JP5631976B2 (ja) 2014-11-26
EP2425329B8 (en) 2018-10-24
GB2469822B (en) 2011-04-20
EP2425329B1 (en) 2017-12-27
US9189241B2 (en) 2015-11-17
EP2425329A1 (en) 2012-03-07
JP2012525620A (ja) 2012-10-22
US10360038B2 (en) 2019-07-23
US20100275211A1 (en) 2010-10-28
WO2010125336A1 (en) 2010-11-04
CN102414659A (zh) 2012-04-11

Similar Documents

Publication Publication Date Title
CN102414659B (zh) 用于在多线程微处理器中调度指令的发布的方法和设备
CN109697111B (zh) 在多线程处理器中调度任务
JP5607545B2 (ja) マイクロプロセッサシステムにおける命令フェッチングの優先順位付け
CN101681261B (zh) 运算处理装置及其控制方法
US9182991B2 (en) Multi-threaded processor instruction balancing through instruction uncertainty
US9811340B2 (en) Method and apparatus for reconstructing real program order of instructions in multi-strand out-of-order processor
US20090113181A1 (en) Method and Apparatus for Executing Instructions
EP3779682B1 (en) Method for executing instructions in cpu
US20150074353A1 (en) System and Method for an Asynchronous Processor with Multiple Threading
US7734897B2 (en) Allocation of memory access operations to memory access capable pipelines in a superscalar data processing apparatus and method having a plurality of execution threads
GB2492457A (en) Predicting out of order instruction level parallelism of threads in a multi-threaded processor
JP2020119504A (ja) 分岐予測器
US9146745B2 (en) Method and apparatus for partitioned pipelined execution of multiple execution threads
US7747993B2 (en) Methods and systems for ordering instructions using future values
US20100031011A1 (en) Method and apparatus for optimized method of bht banking and multiple updates
US7454596B2 (en) Method and apparatus for partitioned pipelined fetching of multiple execution threads
US20180129500A1 (en) Single-thread processing of multiple code regions
US11847458B2 (en) Thread priorities using misprediction rate and speculative depth
US20100100709A1 (en) Instruction control apparatus and instruction control method
CN113918225A (zh) 指令预测方法、指令数据处理装置、处理器以及存储介质
EP3278212A1 (en) Parallelized execution of instruction sequences based on premonitoring
US12118355B2 (en) Cache coherence validation using delayed fulfillment of L2 requests
US20040128488A1 (en) Strand switching algorithm to avoid strand starvation
CN120762763A (zh) 一种指令处理装置、方法及相关设备
CN119919273A (zh) 用于处理指令的方法和装置

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CP01 Change in the name or title of a patent holder

Address after: Hertfordshire

Patentee after: MIPS TECHNOLOGIES, Inc.

Address before: Hertfordshire

Patentee before: Harrow Software Co.,Ltd.

CP01 Change in the name or title of a patent holder
TR01 Transfer of patent right

Effective date of registration: 20180906

Address after: Delaware

Patentee after: Imagination Technologies Ltd.

Address before: Hertfordshire

Patentee before: Mips Technologies, Inc.

Effective date of registration: 20180906

Address after: Hertfordshire

Patentee after: Harrow Software Co.,Ltd.

Address before: Hertfordshire

Patentee before: Imagination Technologies Ltd.

TR01 Transfer of patent right