CN102388365B - Processor start-up method and device - Google Patents
Processor start-up method and device Download PDFInfo
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- CN102388365B CN102388365B CN201180001800.XA CN201180001800A CN102388365B CN 102388365 B CN102388365 B CN 102388365B CN 201180001800 A CN201180001800 A CN 201180001800A CN 102388365 B CN102388365 B CN 102388365B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/14—Error detection or correction of the data by redundancy in operation
- G06F11/1402—Saving, restoring, recovering or retrying
- G06F11/1415—Saving, restoring, recovering or retrying at system level
- G06F11/1417—Boot up procedures
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/4401—Bootstrapping
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1666—Error detection or correction of the data by redundancy in hardware where the redundant component is memory or memory area
Abstract
Disclosed are a processor start-up method and a device. The method includes the steps of a receiving processor sending start-up address and mapping the start-up address of the process to a first flash BOOTROM, the processor executing Boot Strap program in the first BOOTROM to carry out internal initiation, copying the Boot Strap program to DDR SDRAM low-end memory to continuously executing the Boot Strap program; unpacking the packed first BOOTROM program to DDR SDRAM high-end memory and executing the unpacked program, and loasing formal mapping of Flash file system zone onto a formal mapping zone of the DDR SDRAM and executing the formal mapping. The flash has at least two BOOTROMs, and each BOOTROM has packed program and a Boot Strap program. The invention improves the reliability of processor start-up.
Description
Technical field
The present invention relates to field of processors, be specifically related to a kind of processor starting method and device.
Background technology
In field of processors, conventionally by flash memory (Flash) and Double Data Rate synchronous DRAM (Double Data Rate Synchronous Dynamic Random Access Memory, DDR SDRAM), coordinate executive routine to realize the startup of processor.It is example that the central processing unit (Central Processing Unit, CPU) of take starts, and its start-up course as shown in Figure 1, comprises the following steps:
(1), CPU starts from starting the initiation region Boot Strap of boot section BOOTROM, carries out Boot Strap program in Flash, carries out CPU internal initialization.
(2), CPU is by Boot Strap program copy to DDR SDRAM low memory, CPU pointer jumps to DDR SDRAM low memory to be continued to carry out Boot Strap program (step is as shown in Figure 1 a).
(3), CPU is decompressed to DDRSDRAM high memory by the condensing routine Zipped BootRom of BOOTROM, CPU pointer jumps to DDR SDRAM high memory and carries out gunzip UnZipped BootRom (step b as shown in Figure 1, c).
(4), CPU is loaded into the formal reflection Run Image of file system area in Flash in the Run Image district of DDRSDRAM, the Run Image district that CPU pointer jumps to DDR SDRAM carries out Run Image, completes CPU and starts (steps d as shown in Figure 1, e).
In practical application; the reliability starting in order to improve processor; conventionally can backup to BOOTROM; adopt two-stage BOOTROM; when primary BOOTROM damages (as wiped, upgrade failure, component failure etc. by mistake); processor starts from standby BOOTROM, thereby does not affect the normal startup of processor.For realizing BOOTROM backup, prior art adopts pure software mode as shown in Figure 2, under normal circumstances, primary BOOTROM program by Boot Strap program designation secondary BOOTROM (is condensing routine Zipped BootRom1, step b as shown in Figure 2, c), with the formal reflection Run Image (steps d as shown in Figure 2, e) of primary BOOTROM program designation file system area, under abnormal conditions, when secondary BOOTROM starts unsuccessfully, software can be saved in fail count in storer, when continuous fail count value exceeds restriction number of times, the standby BOOTROM program of Boot Strap program designation one-level BOOTROM (is condensing routine Zipped BootRom0, step b ' as shown in Figure 2, c '), after the RunImage that formally videos loads successfully, CPU is to the secondary BOOTROM of the fault reparation of upgrading, remove fail count value simultaneously, so that CPU can be is again carried out the primary BOOTROM program designation Run Image that formally videos from secondary BOOTROM, realizing CPU starts.
In practice, find, there is a very large restriction in such scheme, be that CPU must start from the Boot Strap program of one-level BOOTROM, if the Boot Strap program of one-level BOOTROM is damaged, cannot start from secondary BOOTROM, also cannot start from one-level BOOTROM, cause CPU normally to start, reduce startup reliability.
Summary of the invention
The invention provides a kind of processor starting method and device, can improve the reliability that processor starts.
One aspect of the present invention provides a kind of processor starting method, comprising:
The enabling address that map unit receiving processor sends, and the enabling address of described processor is mapped to the startup of first in flash memory Flash boot section BOOTROM;
The initiation region Boot Strap program that described processor is carried out in a described BOOTROM is carried out internal initialization, and by the Boot Strap program copy in a described BOOTROM to Double Data Rate synchronous DRAM DDR SDRAM low memory, and jump to described DDR SDRAM low memory and carry out the Boot Strap program in a described BOOTROM; And the condensing routine Zipped BootRom of a described BOOTROM is decompressed to described DDR SDRAM high memory, and jump to gunzip UnZipped BootRom corresponding to condensing routine Zipped BootRom that described DDR SDRAM high memory is carried out a described BOOTROM; And the formal reflection Run Image of file system area in described Flash is loaded into the Run Image district of described DDR SDRAM, and the Run Image district that jumps to described DDR SDRAM carries out described Run Image;
In described flash memory Flash, there are at least two BOOTROM, and in each BOOTROM, all preserve condensing routine Zipped BootRom and Boot Strap program.
On the other hand, provide a kind of processor starter gear, comprising:
Processor, map unit, flash memory Flash and DDR SDRAM;
Described processor, for sending enabling address to described map unit;
Described map unit comprises address mapping module, the enabling address sending for receiving described processor, and the enabling address of described processor is mapped to the startup of first in described Flash boot section BOOTROM;
Described processor, also for carrying out the initiation region Boot Strap program of a described BOOTROM, carry out internal initialization, and by the Boot Strap program copy in a described BOOTROM to described DDR SDRAM low memory, and jump to described DDR SDRAM low memory and carry out the Boot Strap program in a described BOOTROM; And the condensing routine Zipped BootRom of a described BOOTROM is decompressed to described DDR SDRAM high memory, and jump to gunzip UnZipped BootRom corresponding to condensing routine Zipped BootRom that described DDR SDRAM high memory is carried out a described BOOTROM; And the formal reflection Run Image of file system area in described Flash is loaded into the Run Image district of described DDR SDRAM, and the Run Image district that jumps to described DDR SDRAM carries out described Run Image;
Wherein, in described Flash, there are at least two BOOTROM, and in each BOOTROM, all preserve condensing routine Zipped BootRom and Boot Strap program.
In the embodiment of the present invention, after the enabling address that map unit receiving processor sends, the enabling address of processor can be mapped to first in Flash and start boot section BOOTROM, the Boot Strap program of being carried out in a BOOTROM by processor is carried out internal initialization, and the Boot Strap program copy in a BOOTROM is arrived to DDR SDRAM low memory, and jump to the Boot Strap program in DDR SDRAM low memory execution the one BOOTROM; And the condensing routine Zipped BootRom of a BOOTROM is decompressed to DDR SDRAM high memory, and jump to gunzip UnZipped BootRom corresponding to condensing routine Zipped BootRom that DDR SDRAM high memory is carried out a BOOTROM; And the formal reflection Run Image of file system area in Flash is loaded into the Run Image district of DDR SDRAM, and jump to the Run Image district execution Run Image of DDR SDRAM, thus realize the startup of processor.Owing to there being at least two BOOTROM in Flash, and in each BOOTROM, all preserve condensing routine Zipped BootRom and Boot Strap program, thereby when realizing BOOTROM backup, also Boot Strap program is backed up, make in the situation that the Boot Strap program of some BOOTROM is damaged, processor can also start from the Boot Strap program of other BOOTROM, thereby can improve the reliability that processor starts.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, to the accompanying drawing of required use in embodiment be briefly described below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skills, do not paying under the prerequisite of creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 is that in prior art, a kind of CPU starts schematic diagram;
Fig. 2 is that in prior art, another kind of CPU starts schematic diagram;
The schematic flow sheet of a kind of processor starting method that Fig. 3 provides for the embodiment of the present invention;
The structural representation of several processor starter gears that Fig. 4～Fig. 6 provides for the embodiment of the present invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described, obviously, described embodiment is only the present invention's part embodiment, rather than whole embodiment.Embodiment based in the present invention, those of ordinary skills, not making the every other embodiment obtaining under creative work prerequisite, belong to the scope of protection of the invention.
The embodiment of the present invention provides a kind of processor starting method and device, can improve the reliability that processor starts.Below be elaborated respectively.
Refer to Fig. 3, the schematic flow sheet of a kind of processor starting method that Fig. 3 provides for the embodiment of the present invention.As shown in Figure 3, the method can comprise the following steps:
301, the enabling address that map unit receiving processor sends, and the enabling address of processor is mapped to the startup of first in Flash boot section BOOTROM.
In the embodiment of the present invention, the first startup boot section BOOTROM can be any one BOOTROM in Flash, not refers to first BOOTROM of sequence number minimum in Flash.It can be any one BOOTROM except an above-mentioned BOOTROM in Flash with respect to the concept of a BOOTROM that the 2nd follow-up BOOTROM is only also one, not refers to second little BOOTROM of sequence number second in Flash.
302, the Boot Strap program that processor is carried out in a BOOTROM is carried out internal initialization, and the Boot Strap program copy in a BOOTROM is arrived to DDR SDRAM low memory, and jump to the Boot Strap program in DDR SDRAM low memory execution the one BOOTROM; And the condensing routine Zipped BootRom of a BOOTROM is decompressed to DDR SDRAM high memory, and jump to gunzip UnZipped BootRom corresponding to condensing routine Zipped BootRom that DDR SDRAM high memory is carried out a BOOTROM; And the formal reflection Run Image of file system area in Flash is loaded into the Run Image district of DDR SDRAM, and jump to the Run Image district execution Run Image of DDRSDRAM; Wherein, in Flash, there are at least two BOOTROM, and in each BOOTROM, all preserve condensing routine Zipped BootRom and Boot Strap program.
Wherein, Boot Strap program in processor execution the one BOOTROM is carried out internal initialization and can be comprised phaselocked loop (Phase Locked Loop, PLL), memory management unit (Memory Management Unit, MMU), the initialization such as DDR sdram controller (DDR SDRAM controller, DDRC).
In the embodiment of the present invention, after the enabling address that map unit receiving processor sends, the enabling address of processor can be mapped to first in Flash and start boot section BOOTROM, the Boot Strap program of being carried out in a BOOTROM by processor is carried out internal initialization, and the Boot Strap program copy in a BOOTROM is arrived to DDR SDRAM low memory, and jump to the Boot Strap program in DDR SDRAM low memory execution the one BOOTROM; And the condensing routine Zipped BootRom of a BOOTROM is decompressed to DDR SDRAM high memory, and jump to gunzip UnZipped BootRom corresponding to condensing routine Zipped BootRom that DDR SDRAM high memory is carried out a BOOTROM; And the formal reflection Run Image of file system area in Flash is loaded into the Run Image district of DDR SDRAM, and jump to the Run Image district execution Run Image of DDR SDRAM, thus realize the startup of processor.Owing to there being at least two BOOTROM in Flash, and in each BOOTROM, all preserve condensing routine Zipped BootRom and Boot Strap program, thereby when realizing BOOTROM backup, also Boot Strap program is backed up, make in the situation that the Boot Strap program of some BOOTROM is damaged, processor can also start from the Boot Strap program of other BOOTROM, thereby can improve the reliability that processor starts.
In an embodiment, if processor starts unsuccessfully by a BOOTROM, said method can also comprise the following steps:
1) frequency of failure that, map unit accumulative total processor starts by a BOOTROM.
In the embodiment of the present invention, processor is started unsuccessfully and may be caused by any one factor of following A～D by a BOOTROM, wherein:
A, a BOOTROM person are bad, as wiped, upgrade failure, component failure etc. by mistake.
The Boot Strap program that B, processor are carried out in a BOOTROM is carried out internal initialization failure.
C, processor arrive DDR SDRAM low memory by the Boot Strap program copy in a BOOTROM, and jump to the Boot Strap procedure failure in DDR SDRAM low memory execution the one BOOTROM.
D, processor are decompressed to DDR SDRAM high memory by the condensing routine Zipped BootRom of a BOOTROM, and jump to gunzip UnZipped BootRom failure corresponding to condensing routine Zipped BootRom that DDR SDRAM high memory is carried out a BOOTROM.
2) if the frequency of failure that processor starts by a BOOTROM is more than or equal to number of times threshold value corresponding to the 2nd BOOTROM in Flash, map unit maps to the 2nd BOOTROM by the enabling address of processor.
In an embodiment, the steering order that map unit can receiving processor sends, and according to the steering order of processor, the number of times threshold value that in Flash, each BOOTROM is corresponding is set; Wherein, the number of times threshold value that each BOOTROM is corresponding is one or more.
In an embodiment, the number of times threshold value that each BOOTROM is corresponding can be identical or not identical, and the embodiment of the present invention is not construed as limiting.Especially, if number of times threshold value corresponding to each BOOTROM is not identical, can number of pass times threshold value identify the BOOTROM corresponding with this number of times threshold value.
In an embodiment, the number of times threshold value that BOOTROM can be corresponding is interval, and this BOOTROM can corresponding more than one number of times threshold value like this.
Wherein, if processor starts unsuccessfully by a BOOTROM, and the frequency of failure that processor starts by a BOOTROM is less than number of times threshold value corresponding to the 2nd BOOTROM in Flash, map unit can map to the enabling address of processor the startup of first in Flash boot section BOOTROM again, by processor, re-execute above-mentioned steps 302, again attempt starting by a BOOTROM, until the frequency of failure that processor starts by a BOOTROM is while being more than or equal to number of times threshold value corresponding to the 2nd BOOTROM in Flash, map unit just maps to the enabling address of processor second in Flash and starts boot section BOOTROM, by processing, think highly of and attempt starting by the 2nd BOOTROM.
3) the Boot Strap program that, processor is carried out in the 2nd BOOTROM is carried out internal initialization, and the Boot Strap program copy in the 2nd BOOTROM is arrived to DDR SDRAM low memory, and jump to the Boot Strap program in DDR SDRAM low memory execution the 2nd BOOTROM; And the condensing routine Zipped BootRom of the 2nd BOOTROM is decompressed to DDR SDRAM high memory, and jump to gunzip UnZipped BootRom corresponding to condensing routine Zipped BootRom that DDR SDRAM high memory is carried out the 2nd BOOTROM; And the formal reflection Run Image of file system area in Flash is loaded into the Run Image district of DDR SDRAM, and jump to the Run Image district execution Run Image of DDR SDRAM, realize processor and normally start.
In the embodiment of the present invention, owing to all preserving condensing routine Zipped BootRom and Boot Strap program in each BOOTROM in Flash, thereby when realizing BOOTROM backup, also Boot Strap program is backed up, when the frequency of failure value that processor is started by a BOOTROM is more than or equal to number of times threshold value corresponding to the 2nd BOOTROM, processor can start from the Boot Strap program of the 2nd BOOTROM, thereby can improve the reliability that processor starts.
In an embodiment, when processor starts by the 2nd BOOTROM, CPU can be to starting the failed BOOTROM reparation of upgrading, and send clear instruction to map unit, make map unit remove according to this clear instruction the frequency of failure that processor starts by a BOOTROM, so that processor can be carried out BOOTROM program from a BOOTROM again, guide formal reflection Run Image to realize and start.
In an embodiment, processor can be CPU, and map unit can be built in CPU, thereby can simplify hardware periphery design and reduce costs.
Refer to Fig. 4, the structural representation of a kind of processor starter gear that Fig. 4 provides for the embodiment of the present invention.As shown in Figure 4, this device can comprise:
Processor-401, map unit-402, flash memory Flash-403 and DDR SDRAM-404;
Wherein, processor-401 are for sending enabling address to map unit-402;
Map unit-402 comprise address mapping module-4021, the enabling address sending for receiving processor-401, and the enabling address of processor-401 is mapped to the startup of first in Flash-403 boot section BOOTROM;
Processor-401, also for carrying out the Boot Strap program of a BOOTROM, carry out internal initialization, and by the Boot Strap program copy in a BOOTROM to DDR SDRAM-404 low memory, and jump to DDR SDRAM-404 low memory and carry out Boot Strap program in a BOOTROM (step is as shown in Figure 4 a); And the condensing routine Zipped BootRom of a BOOTROM is decompressed to DDR SDRAM-404 high memory, and jump to gunzip UnZipped BootRom (step b as shown in Figure 4, c) corresponding to condensing routine Zipped BootRom that DDR SDRAM-404 high memory is carried out a BOOTROM; And the Run Image district that the formal reflection Run Image of file system area in Flash-403 is loaded into DDR SDRAM-404, and the Run Image district that jumps to DDR SDRAM-404 carries out above-mentioned Run Image (steps d as shown in Figure 4, e), thereby realize processor, start;
Wherein, in Flash-403, there are at least two BOOTROM, and in each BOOTROM, all preserve condensing routine Zipped BootRom and Boot Strap program.
In the embodiment of the present invention, the first startup boot section BOOTROM can be any one BOOTROM in Flash-403, is not first BOOTROM of sequence number minimum in Flash-403.It can be any one BOOTROM except an above-mentioned BOOTROM in Flash-403 with respect to the concept of a BOOTROM that the 2nd follow-up BOOTROM is only also one, is not second little BOOTROM of sequence number second in Flash-403.
Wherein, processor-401 are carried out Boot Strap program in a BOOTROM and are carried out internal initialization and can comprise the initialization such as PLL, MMU, DDRC.
In an embodiment, map unit-402 can also comprise:
Counter module-4022, while starting unsuccessfully for pass through a BOOTROM in processor-401, the frequency of failure that accumulative total processor-401 start by a BOOTROM.
Wherein, cause processor-401 to start failed factor by a BOOTROM and above, in embodiment, be described in detail, the embodiment of the present invention is not repeated herein.
Identification module-4023, whether the frequency of failure starting by a BOOTROM for recognition processor-401 is more than or equal to number of times threshold value corresponding to the 2nd BOOTROM of Flash-403;
Address mapping module-4021, also for the recognition result in identification module-4023 when being, the enabling address of processor-401 is mapped to the 2nd BOOTROM in Flash-403;
Correspondingly, internal initialization is also carried out for the BootStrap program of carrying out in the 2nd BOOTROM of Flash-403 in processor-401, and the Boot Strap program copy in the 2nd BOOTROM is arrived to DDR SDRAM-404 low memory, and jump to the Boot Strap program (step a ' as shown in Figure 4) in DDR SDRAM-404 low memory execution the 2nd BOOTROM; And the condensing routine Zipped BootRom of the 2nd BOOTROM is decompressed to DDR SDRAM-404 high memory, and jump to gunzip UnZipped BootRom (step b ' as shown in Figure 4, c ') corresponding to condensing routine Zipped BootRom that DDR SDRAM-404 high memory is carried out the 2nd BOOTROM; And the Run Image district that the formal reflection Run Image of file system area in Flash-403 is loaded into DDR SDRAM-404, and the Run Image district that jumps to DDR SDRAM-404 carries out above-mentioned Run Image (steps d as shown in Figure 4, e), realize processor-401 and normally start.
In an embodiment, map unit-402 can also comprise:
Counter is put digital-to-analogue piece-4024, the control command sending for receiving processor-401, and according to the control command of processor-401, the number of times threshold value that in Flash-403, each BOOTROM is corresponding is set; Wherein, the number of times threshold value that each BOOTROM is corresponding is one or more.
In an embodiment, the number of times threshold value that each BOOTROM is corresponding can be identical or not identical, and the embodiment of the present invention is not construed as limiting.Especially, if number of times threshold value corresponding to each BOOTROM is not identical, the BOOTROM corresponding with number of times threshold value can number of pass times threshold value be identified in identification module-4023.
In an embodiment, the number of times threshold value that BOOTROM can be corresponding is interval, and this BOOTROM can corresponding more than one number of times threshold value like this.
Wherein, if processor-401 start unsuccessfully by a BOOTROM, and the frequency of failure that processor-401 start by a BOOTROM is less than number of times threshold value corresponding to the 2nd BOOTROM in Flash-403, map unit-402 map to the enabling address of processor-401 startup of first in Flash-403 boot section BOOTROM again, by processor-401, again attempted starting by a BOOTROM, until the frequency of failure that processor-401 start by a BOOTROM is while being more than or equal to number of times threshold value corresponding to the 2nd BOOTROM in Flash-403, map unit-402 map to second in Flash-403 by the enabling address of processor-401 and start boot section BOOTROM, by processor-401, heavily attempted starting by the 2nd BOOTROM.
In an embodiment, counter is put the clear instruction that digital-to-analogue piece-4024 also send for receiving processor-401, removes the frequency of failure that processor-401 start by the BOOTROM in Flash-403.
In the embodiment of the present invention, all preserve condensing routine Zipped BootRom and Boot Strap program in first, second BOOTROM in Flash-403, first, second BOOTROM status is completely reciprocity.Under normal circumstances, map unit-402 are mapped to the enabling address of processor-401 by its address mapping module-4021 BOOTROM (as primary BOOTROM) wherein, when processor-401 start unsuccessfully by a BOOTROM, the frequency of failure can be recorded in counter module-4022 in map unit-402, when identification module-4023 in map unit-402 are identified the frequency of failure that processor-401 start by a BOOTROM and are more than or equal to number of times threshold value corresponding to the 2nd BOOTROM, address mapping module-4021 are mapped to the enabling address of processor-401 the 2nd BOOTROM (as standby BOOTROM), the Run Image district that is loaded into DDRSDRAM-404 until the Run Image that formally videos realizes after the normal startup in processor-401, processor-401 can start the failed BOOTROM reparation of upgrading, by counter, put digital-to-analogue piece-4024 simultaneously and remove the frequency of failure value that processor-401 start by a BOOTROM, so that BOOTROM program can be carried out from a BOOTROM again in processor-401, coming booting image Run Image to realize processor-401 starts.
In an embodiment, can as shown in Figure 5 Flash-403 be expanded, make to have n BOOTROM district in Flash-403, each BOOTROM status equity, and also independent of one another; The interval correspondence of distributing of counter module-4022 count value in map unit-402 is to n BOOTROM.After BOOTROM0 damages, address mapping module-4021 in map unit-402 can be mapped to BOOTROM1 by the enabling address of processor-401; After BOOTROM1 damages, address mapping module-4021 can be mapped to BOOTROM2 by the enabling address of processor-401; By that analogy, thus can in n BOOTROM backup, realize the startup of processor-401.
In an embodiment, can as shown in Figure 5 Flash-403 be expanded, make to have n BOOTROM district in Flash-403, each BOOTROM status equity, and also independent of one another; The interval correspondence of distributing of counter module-4022 count value in map unit-402 is to n BOOTROM.Digital-to-analogue piece-4024 can be put by counter in processor-401, the count value of revising counter module-4022, allows it point to certain particular B OOTROM, then hot reset processor-401, so that processor-401 can start from particular B OOTROM, meet the application demand of some special scenes.
In an embodiment, can be as shown in Figure 6, processor-401 are expanded, make map unit-402 be built into inside, processor-401, thereby can be when reaching the backup of BOOTROM, switching, do not need outside to add hardware circuit and realize map unit-402, thereby simplify hardware periphery design, reduced cost.
One of ordinary skill in the art will appreciate that: all or part of step that realizes said method embodiment can complete by the relevant hardware of programmed instruction, aforesaid program can be stored in a computer read/write memory medium, this program, when carrying out, is carried out the step that comprises said method embodiment; And aforesaid storage medium comprises: various media that can be program code stored such as ROM (read-only memory) (Read-Only Memory, ROM), random access memory (Random Access Memory, RAM), magnetic disc or CDs.
A kind of processor starting method and the device that above the embodiment of the present invention are provided are described in detail, applied specific case herein principle of the present invention and embodiment are set forth, the explanation of above embodiment is just for helping to understand method of the present invention and core concept thereof; , for one of ordinary skill in the art, according to thought of the present invention, all will change in specific embodiments and applications, in sum, this description should not be construed as limitation of the present invention meanwhile.
Claims (8)
1. a processor starting method, is characterized in that, comprising:
The enabling address that map unit receiving processor sends, and the enabling address of described processor is mapped to the startup of first in flash memory Flash boot section BOOTROM;
The initiation region Boot Strap program that described processor is carried out in a described BOOTROM is carried out internal initialization, and by the Boot Strap program copy in a described BOOTROM to Double Data Rate synchronous DRAM DDR SDRAM low memory, and jump to described DDR SDRAM low memory and carry out the Boot Strap program in a described BOOTROM; And the condensing routine Zipped BootRom of a described BOOTROM is decompressed to described DDR SDRAM high memory, and jump to gunzip UnZipped BootRom corresponding to condensing routine Zipped BootRom that described DDR SDRAM high memory is carried out a described BOOTROM; And the formal reflection Run Image of file system area in described Flash is loaded into the Run Image district of described DDR SDRAM, and the Run Image district that jumps to described DDR SDRAM carries out described Run Image;
In described flash memory Flash, there are at least two BOOTROM, and in each BOOTROM, all preserve condensing routine Zipped BootRom and Boot Strap program;
If described processor starts unsuccessfully by a described BOOTROM, described method also comprises:
The frequency of failure that the described processor of described map unit accumulative total starts by a described BOOTROM;
If the frequency of failure that described processor starts by a described BOOTROM is more than or equal to number of times threshold value corresponding to the 2nd BOOTROM in described Flash, described map unit maps to described the 2nd BOOTROM by the enabling address of described processor;
The Boot Strap program that described processor is carried out in described the 2nd BOOTROM is carried out internal initialization, and by the Boot Strap program copy in described the 2nd BOOTROM to described DDR SDRAM low memory, and jump to described DDR SDRAM low memory and carry out the Boot Strap program in described the 2nd BOOTROM; And the condensing routine Zipped BootRom of described the 2nd BOOTROM is decompressed to described DDR SDRAM high memory, and jump to gunzip UnZipped BootRom corresponding to condensing routine Zipped BootRom that described DDR SDRAM high memory is carried out described the 2nd BOOTROM; And carry out the described formal reflection RunImage by file system area in described Flash and be loaded into the Run Image district of described DDR SDRAM, and the Run Image district that jumps to described DDR SDRAM carries out the process of described Run Image.
2. method according to claim 1, is characterized in that, described method also comprises:
Described map unit receives the steering order that described processor sends, and according to described steering order, the number of times threshold value that in described Flash, each BOOTROM is corresponding is set; Wherein, the number of times threshold value that each BOOTROM is corresponding is one or more.
3. method according to claim 2, is characterized in that, described method also comprises:
Described map unit receives the clear instruction that described processor sends, and removes the frequency of failure that described processor starts by a described BOOTROM.
4. according to the method described in claim 1～3 any one, it is characterized in that, described processor is central processing unit, and described map unit is built in described central processing unit.
5. a processor starter gear, is characterized in that, comprising:
Processor, map unit, flash memory Flash and Double Data Rate synchronous DRAM DDRSDRAM;
Described processor, for sending enabling address to described map unit;
Described map unit comprises address mapping module, the enabling address sending for receiving described processor, and the enabling address of described processor is mapped to the startup of first in described Flash boot section BOOTROM;
Described processor, also for carrying out the initiation region Boot Strap program of a described BOOTROM, carry out internal initialization, and by the Boot Strap program copy in a described BOOTROM to described DDR SDRAM low memory, and jump to described DDR SDRAM low memory and carry out the Boot Strap program in a described BOOTROM; And the condensing routine Zipped BootRom of a described BOOTROM is decompressed to described DDR SDRAM high memory, and jump to gunzip UnZipped BootRom corresponding to condensing routine Zipped BootRom that described DDR SDRAM high memory is carried out a described BOOTROM; And the formal reflection Run Image of file system area in described Flash is loaded into the Run Image district of described DDR SDRAM, and the Run Image district that jumps to described DDRSDRAM carries out described Run Image;
Wherein, in described Flash, there are at least two BOOTROM, and in each BOOTROM, all preserve condensing routine Zipped BootRom and Boot Strap program;
Described map unit also comprises:
Counter module, for when described processor starts unsuccessfully by a described BOOTROM, the frequency of failure that the described processor of accumulative total starts by a described BOOTROM;
Whether identification module, be more than or equal to number of times threshold value corresponding to the 2nd BOOTROM of described Flash for identifying described processor by the frequency of failure of a described BOOTROM startup;
Described address mapping module, also for the recognition result at described identification module when being, the enabling address of described processor is mapped to described the 2nd BOOTROM;
Described processor, for carrying out the Boot Strap program of described the 2nd BOOTROM, carry out internal initialization, and by the Boot Strap program copy in described the 2nd BOOTROM to described DDRSDRAM low memory, and jump to described DDR SDRAM low memory and carry out the Boot Strap program in described the 2nd BOOTROM; And the condensing routine Zipped BootRom of described the 2nd BOOTROM is decompressed to described DDR SDRAM high memory, and jump to gunzip UnZipped BootRom corresponding to condensing routine Zipped BootRom that described DDRSDRAM high memory is carried out described the 2nd BOOTROM; And the formal reflection Run Image of file system area in described Flash is loaded into the Run Image district of described DDR SDRAM, and the Run Image district that jumps to described DDRSDRAM carries out described Run Image.
6. device according to claim 5, is characterized in that, described map unit also comprises:
Counter is put digital-to-analogue piece, the control command sending for receiving described processor, and according to described control command, the number of times threshold value that in described Flash, each BOOTROM is corresponding is set; Wherein, the number of times threshold value that each BOOTROM is corresponding is one or more.
7. device according to claim 6, is characterized in that, described counter is put the clear instruction that digital-to-analogue piece also sends for receiving described processor, removes the frequency of failure that described processor starts by a described BOOTROM.
8. according to the device described in claim 5～7 any one, it is characterized in that, described processor is central processing unit, and described map unit is built in described central processing unit.
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| PCT/CN2011/080215 WO2012149774A1 (en) | 2011-09-27 | 2011-09-27 | Method and apparatus for activating processor |
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| CN102388365B true CN102388365B (en) | 2014-03-26 |
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| CN103605536B (en) * | 2013-11-06 | 2017-04-26 | 华为技术有限公司 | Starting method and starting device of embedded operating system and baseboard management controller |
| CN104915226B (en) * | 2015-05-21 | 2018-12-14 | 北京星网锐捷网络技术有限公司 | A kind of network device software starting method, apparatus and the network equipment |
| CN105677348A (en) * | 2016-01-04 | 2016-06-15 | 青岛海信信芯科技有限公司 | BOOT program storing method and device and BOOT program starting method and device |
| CN108701036A (en) * | 2016-02-23 | 2018-10-23 | 华为技术有限公司 | A kind of method, CPU and veneer starting Boot |
| CN106407156B (en) * | 2016-09-23 | 2018-11-23 | 深圳震有科技股份有限公司 | The method and system of one BOOTROM guidance multi-core CPU starting |
| CN109614798B (en) | 2017-09-30 | 2022-12-27 | 华为技术有限公司 | Safe starting method and device and terminal equipment |
| CN113535238B (en) * | 2020-04-15 | 2024-02-02 | 浙江宇视科技有限公司 | Compatible method, device, storage medium and equipment for DDR |
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