CN102386907A - Integrating circuit - Google Patents

Abstract

The invention discloses an integrating circuit. A first capacitor and a first switching unit are used for sampling input signals in a time division way, a second capacitor with a higher capacitance value is used for carrying out electric charge distribution with the first capacitor so as to store sampled voltage, when the electric charge distribution is carried out, the integrating circuit can conduct voltage originally stored on the second capacitor to one end of the first capacitor, which is used for being coupled with an earthing end originally, so as to improve voltage level of the first capacitor, so that the second capacitor can obtain a corresponding voltage rising value. Therefore, the integrating circuit can obtain higher accuracy degree and linearity degree.

Description

Integrating circuit

Technical field

The present invention relates to a kind of integrating circuit, and be particularly related to the integrating circuit that a kind of charge distributing theory of utilizing electric capacity reaches high-res and low phase difference.

Background technology

Integrator is common analog circuit, mainly is used for carrying out the integral operation in the mathematics.Typical voltage integrating meter device is that the bleeder circuit that utilizes resistance and electric capacity to form is realized.Because the electric current through electric capacity is relevant with the pace of change of voltage, just is relevant to voltage by the result of time diffusion, so the dividing potential drop at electric capacity two ends can be considered the integral result of input voltage, the dividing potential drop at resistance two ends then can be considered the differential result of input voltage.In the prior art, operational amplifier also often is applied in integrating circuit or the differential circuit to reach the effect of adjustment input impedance and output impedance.

Another kind of existing low frequency integrator is to utilize analog to digital converter (Analog to Digital Converter is digital signal with conversion of signals ADC), and then carries out integration, but the accuracy of circuit integration can be subject to the resolution of ADC like this.Though use the ADC of high-res can improve the accuracy of integrator, can make the circuit design cost rise.In addition, need to use low pass filter to come the filtering high frequency obtaining flip-flop in the prior art, and then carry out integration; Yet want the heal composition of low frequency of filtering, the capacitance that needs can be healed greatly, and this can cause this rising; Also the phase place drop can be produced, and the low frequency oscillation of system's control can be caused.

Summary of the invention

The present invention provides a kind of integrating circuit, and it utilizes the charge distributing principle of electric capacity, realizes the hybrid-type integrating circuit of low frequency, and not only resolution is high, also can not cause big phase difference simultaneously, can reach the effect of low-cost high-efficiency ability.

The present invention proposes a kind of integrating circuit, comprises one first energy-storage travelling wave tube, one first switch unit, one second switch unit and one second energy-storage travelling wave tube.First energy-storage travelling wave tube is coupled between one first end and one second end.First switch unit is coupled to first end and an input and is coupled to second end and earth terminal, in order to selectivity conducting first end and input and selectivity conducting second end and this earth terminal.Second switch unit is coupled to first end and second end and one the 3rd end, conducts voltage to the second end of first end in order to selectivity conducting first end and the 3rd end and selectivity.Second energy-storage travelling wave tube is coupled between the 3rd end and the earth terminal.

In an embodiment of the present invention, wherein when the first switch unit conducting, first end and input and conducting second end and earth terminal, the second not conducting of switch unit, first end and the 3rd end.

In an embodiment of the present invention, wherein when the second switch unit conducting, first end and the 3rd end and when conducting voltage to the second end of first end, the first not conducting of switch unit, first end and input and not conducting second end and earth terminal.

In an embodiment of the present invention, wherein first switch unit comprises one first switch and a second switch.First switch is coupled between this first end and this input, and second switch is coupled between this second end and this earth terminal.Wherein, first switch and second switch are controlled by one first control signal.

In an embodiment of the present invention, wherein second switch unit comprises one the 3rd switch, one first unity gain amplifier and one the 4th switch.The 3rd switch is coupled between this first end and the 3rd end, and the input of first unity gain amplifier is coupled to this first end.The 4th switch is coupled between the output and second end of first unity gain amplifier.Wherein the 3rd switch and the 4th switch are controlled by one second control signal.

In an embodiment of the present invention, during the above-mentioned first control signal activation, the second control signal forbidden energy.

In an embodiment of the present invention, above-mentioned integrating circuit also comprises one the 5th switch, is coupled between the 3rd end and the earth terminal.Above-mentioned first energy-storage travelling wave tube is one first electric capacity, and above-mentioned second energy-storage travelling wave tube is one second electric capacity, and the capacitance of first electric capacity is less than the capacitance of second electric capacity.

In an embodiment of the present invention, above-mentioned integrating circuit also comprises an output buffer cell, is coupled between the 3rd end and the output.This output buffer cell comprises one second unity gain amplifier, one the 6th switch, one the 3rd unity gain amplifier and one the 3rd electric capacity.The input of second unity gain amplifier is coupled to the 3rd end, and an end of the 6th switch is coupled to the output of second unity gain amplifier.The input of the 3rd unity gain amplifier is coupled to the other end of the 6th switch, and the output of the 3rd unity gain amplifier is coupled to output.The 3rd electric capacity is coupled between the input and earth terminal of the 3rd unity gain amplifier.

Beneficial effect of the present invention is, comprehensively above-mentioned, proposed by the invention integrating circuit utilizes the capacitance charge distribution principle, with the voltage compression of timesharing sampling and be stored in the electric capacity, improves the linearity of integrating circuit whereby.In addition, compared to existing integrator, the resolution that the accuracy of integrating circuit of the present invention can not be subject to ADC does not have the excessive problem of phase difference yet, and can reach the purpose of low-cost high-efficiency ability.

For letting the above-mentioned feature and advantage of the present invention can be more obviously understandable, hereinafter is special lifts preferred embodiment, and cooperates appended accompanying drawing, elaborates as follows.

Description of drawings

Fig. 1 is the functional-block diagram of integrating circuit according to an embodiment of the invention.

Fig. 2 is the integrating circuit figure according to present embodiment.

Fig. 3 is the waveform sketch map according to present embodiment.

Wherein, description of reference numerals is following:

100,200: integrating circuit

110: the first switch units

120: the first energy-storage travelling wave tubes

130: the second switch units

140: the second energy-storage travelling wave tubes

150: the output buffer cell

310～360: waveform

T1～T3: first to the 3rd end

GND: earth terminal

TIN: input

TOUT: output

SW1～SW6: first to the 6th switch

C1～C3: first to the 3rd electric capacity

GA1～GA3: first to the 3rd unity gain amplifier

CON1～CON3: first to the 3rd control signal

VIN: input signal

VOUT: output signal

Embodiment

Please with reference to Fig. 1, Fig. 1 is the functional-block diagram of integrating circuit according to an embodiment of the invention.Integrating circuit 100 comprises first switch unit 110, first energy-storage travelling wave tube 120, second switch unit 130, second energy-storage travelling wave tube 140 and output buffer cell 150.First energy-storage travelling wave tube 120 is coupled between the first end T1 and the second end T2; First switch unit 110 is coupled to the first end T1 and input TIN and is coupled to the second end T2 and earth terminal GND, in order to the selectivity conducting first end T1 and input TIN and selectivity conducting second end T2 and earth terminal GND.Second switch unit 130 is coupled to the first end T1 and the second end T2 and the 3rd end T3, conducts voltage to the second end T2 of the first end T1 in order to the selectivity conducting first end T1 and the 3rd end T3 and selectivity.Second energy-storage travelling wave tube 140 is coupled between the 3rd end T3 and the earth terminal GND.Output buffer cell 150 is coupled between the 3rd end T3 and the output TOUT.

Wherein, when first switch unit 110 conductings, the first end T1 and input TIN and conducting second end T2 and earth terminal GND, second switch unit 130 not conductings, first end T1 and the 3rd end T3.As second switch unit 130 conductings, the first end T1 and the 3rd end T3 and when conducting voltage to the second end T2 of the first end T1, first switch unit 110 not conductings, the first end T1 and input TIN and not conducting second end T2 and earth terminal GND.First switch unit 110 mainly is with the sampling rate that decides sampling input signal VIN, when first end T1 of conducting each time and input TIN and the second end T2 and earth terminal GND, is exactly to input signal VIN sampling once.The voltage of input signal VIN can be stored in first energy-storage travelling wave tube 120; First switch unit 110 can be closed guiding path then; Follow second switch unit, 130 meeting conducting the 3rd end T3 and the first end T1, and the voltage of the first end T1 is transmitted to the second end T2 to raise the reference voltage of first energy-storage travelling wave tube 120.At this moment, the electric charge in first energy-storage travelling wave tube 120 can be distributed in first energy-storage travelling wave tube 120 and second energy-storage travelling wave tube 140 to raise the voltage of the 3rd end T3.Whereby, just can reach the effect of voltage integrating meter.

In addition, it should be noted that first switch unit 110 and second switch unit 130 mainly are used for the switched conductive path, a plurality of switches capable of using or multiplexer or switching device realize that present embodiment is not limited.First energy-storage travelling wave tube 120 and second energy-storage travelling wave tube, 140 single capacitors capable of using or a plurality of capacitor realize that present embodiment is not limited.Output buffer cell 150 mainly is used for adjusting output impedance, and buffer circuit capable of using or unity gain amplifier are formed, and present embodiment is not limited.

Next, further specify the circuit implementation detail of the integrating circuit of present embodiment, please be simultaneously with reference to Fig. 1 and Fig. 2, Fig. 2 is the integrating circuit figure according to present embodiment.In integrating circuit shown in Figure 2 200, first switch unit 110 comprises first switch SW 1 and second switch SW2, and second switch unit 130 comprises the 3rd switch SW 3 and the 4th switch SW 4 and the first unity gain amplifier GA1.First energy-storage travelling wave tube 120 is realized that by first capacitor C 1 second energy-storage travelling wave tube 140 is realized by second capacitor C 2.Output buffer cell 150 comprises the second unity gain amplifier GA2, the 3rd unity gain amplifier GA3, the 6th switch SW 6 and the 3rd capacitor C 3.Integrating circuit 200 also comprises the 5th switch SW 5, is coupled between the 3rd end T3 and the earth terminal GND, in order to the electric charge in second capacitor C 2 is guided to earth terminal GND with replacement integrating circuit 200.

First capacitor C 1 is coupled between the first end T1 and the second end T2, and second capacitor C 2 is coupled between the 3rd end and the earth terminal GND.First switch SW 1 is coupled between the first end T1 and the input TIN, and second switch SW2 is coupled between the second end T2 and the earth terminal GND.The 3rd switch SW 3 is coupled between the first end T1 and the 3rd end T3, and the input of the first unity gain amplifier GA1 is coupled to the first end T1.The 4th switch SW 4 is coupled between the output and the second end T2 of the first unity gain amplifier GA1.The second unity gain amplifier GA2 is coupled between the 3rd end T3 and the 6th switch SW 6, and the 3rd unity gain amplifier GA3 is coupled between the other end and output TOUT of the 6th switch SW 6.Wherein, first to the 3rd unity gain amplifier GA1～GA3 realizes with degenerative operational amplifier, but present embodiment is not limited to this.In addition, it should be noted that the electric connection that the relation of coupling comprises directly or indirectly or both walk abreast between the said elements, as long as can reach required electrical signal transfer function, present embodiment is not limited.

First switch SW 1 is controlled by the first control signal CON1 with second switch SW2, and the 3rd switch SW 3 and the 4th switch SW 4 are controlled by the second control signal CON2.When the first control signal CON1 activation, first switch SW 1 and second switch SW2 conducting, otherwise then not conducting.When the second control signal CON2 activation, the 3rd switch SW 3 and 4 conductings of the 4th switch SW, otherwise then not conducting.The waveform of the first control signal CON1 and the second control signal CON2 please refer to Fig. 3, and Fig. 3 is the waveform sketch map according to present embodiment.Please be simultaneously with reference to Fig. 2 and Fig. 3, when carrying out integral operation, the first control signal CON1 is the frequency that is used for controlling sampling, activation each time (like waveform 310) all can be during its activation in store voltages to the first capacitor C 1 with input signal VIN.When the first control signal CON1 activation, the second control signal CON2 can forbidden energy.Behind the first control signal CON1 forbidden energy, the electric charge in first capacitor C 1 can be dispensed in second capacitor C 2 with voltage compression memory to the second capacitor C 2 with input signal VIN in the second control signal CON2 activation thereupon (like waveform 340).

When the second control signal CON2 activation; The 3rd switch SW 3 and the 4 meeting conductings of the 4th switch SW; So the voltage of the 3rd end T3 can conduct to the second end T2 with the accurate position of the direct current that raises first capacitor C 1, the voltage difference at first capacitor C, 1 two ends can be carried on the accurate position of direct current (voltage) of the 3rd original end T3.Utilize the charge distributing principle of electric capacity then, let second capacitor C 2 obtain corresponding voltage rising value, reach the effect of integration whereby.The voltage rising value of above-mentioned second capacitor C 2 can be considered the compressed value of input signal VIN, and its ratio is relevant to the capacitance of first capacitor C 1 and second capacitor C 2.Suppose that the capacitance of first capacitor C 1 representes with C1; The capacitance of second capacitor C 2 is represented with C2; Like this after the first control signal CON1 activation; Institute's charge stored can be represented like formula (1) in first capacitor C 1, and after the second control signal CON2 activation, the voltage rising value of second capacitor C 2 such as formula (2).

Q=C1 * V1=C2 * V1 '---------formula (1)

${V1}^{\&prime;}=\frac{C1}{\mathrm{<figure-callout\; id="2"\; label="C"\; filenames="HSA00000253558900011.png"\; state="\{\{state\}\}">C</figure-callout>}2}\&times;V1$ ---------------formula (2)

Wherein, the V1 in the above-mentioned formula representes the magnitude of voltage of input signal VIN when being extracted, the voltage rising value that V1 ' expression distributes the back to be caused at the 3rd end T3.That is to say that after the second control signal CON2 activation, rise because of charge distributing in the magnitude of voltage meeting of the 3rd end T3, the voltage difference of its rising is V1 '.Can be known that by above-mentioned formula V1 ' can have certain proportionate relationship with V1, its ratio is relevant with capacitance C1 and C2.Therefore; Can reach the effect of timesharing sampling input signal VIN through the sequential of controlling the first control signal CON1; The sequential of controlling the second control signal CON2 then can reassign to second capacitor C 2 with electric charge, lets the voltage of the 3rd end T3 obtain corresponding rising value to reach the effect of integration.On the other hand, if input signal VIN is a negative value, then V1 is a negative value, and this can make the voltage difference at second capacitor C, 2 two ends descend, and equally also is the result who has integration.After the explanation via the foregoing description, those skilled in the art of the present technique should know its execution mode by inference, do not add at this and give unnecessary details.

In addition; The capacitance of first capacitor C 1 in the present embodiment can be less than the capacitance of second capacitor C 2; 100C1=C2 for example; So just can avoid second capacitor C 2 in integral process, to produce too high voltage and to surpass the operate as normal of circuit interval, but present embodiment is not limited to the aforementioned proportion relation.

In addition, the 5th switch SW 5 integrating circuit 200 that can be used to reset, when the 3rd control signal CON3 activation (please with reference to Fig. 3 waveform 360), the electric charge in second capacitor C 2 can be directed to earth terminal GND with replacement integrating circuit 200.So before carrying out integral operation, the 3rd control signal CON3 can make zero with the voltage with the 3rd end T3 in first activation.

In output buffer cell 150, the second unity gain amplifier GA2 can conduct to the voltage of the 3rd end T3 in the 3rd capacitor C 3, and 6 of the 6th switch SW are to be used for keeping institute's charge stored in the 3rd capacitor C 3, avoids leakage current to take place.The 3rd unity gain amplifier GA3 exports integral result to output TOUT to produce output signal VOUT.Output signal VOUT can become a proportionate relationship with the integral result of input signal VIN, and its proportionate relationship is relevant with the capacitance of first capacitor C 1 and second capacitor C 2.After the explanation via the foregoing description, those skilled in the art of the present technique should know its account form by inference, do not add at this and give unnecessary details.

In sum, the present invention utilizes the charge distributing principle of electric capacity to realize the low frequency integrating circuit, and this integrating circuit can be with the voltage compression memory of timesharing sampling to reach the effect of line integral device.In addition, the present invention need not use ADC to reach storage effect, can effectively reduce circuit cost, and reaches integral result more accurately.

Though preferred embodiment of the present invention has disclosed as above; Right the present invention is not limited to the foregoing description; Person skilled under any; In not breaking away from disclosed scope, when can doing a little change and adjustment, so protection scope of the present invention should with claim the person of being defined be as the criterion.

Claims (10)

1. integrating circuit is characterized in that this integrating circuit comprises:

One first energy-storage travelling wave tube is coupled between one first end and one second end;

One first switch unit is coupled to this first end and an input and is coupled to this second end and an earth terminal, in order to this first end of selectivity conducting and this input and this second end of selectivity conducting and this earth terminal;

One second switch unit is coupled to this first end and this second end and one the 3rd end, in order to the voltage of this first end of selectivity conducting and the 3rd end and selectivity conduction the 3rd end to this second end; And

One second energy-storage travelling wave tube is coupled between the 3rd end and this earth terminal.

2. integrating circuit as claimed in claim 1 is characterized in that when this this first end of first switch unit conducting and this input and this second end of conducting and this earth terminal this this first end of not conducting of second switch unit and the 3rd end.

3. integrating circuit as claimed in claim 1; It is characterized in that when this this first end of second switch unit conducting and the 3rd end and when conducting voltage to this second end of the 3rd end, this this first end of not conducting of first switch unit and this input and this second end of not conducting and this earth terminal.

4. integrating circuit as claimed in claim 1 is characterized in that this first switch unit comprises:

One first switch is coupled between this first end and this input; And

One second switch is coupled between this second end and this earth terminal.

5. integrating circuit as claimed in claim 1 is characterized in that this second switch unit comprises:

One the 3rd switch is coupled between this first end and the 3rd end;

One first unity gain amplifier, the input of this first unity gain amplifier are coupled to this first end; And

One the 4th switch is coupled between the output and this second end of this first unity gain amplifier.

6. integrating circuit as claimed in claim 4 is characterized in that this second switch unit comprises:

One the 3rd switch is coupled between this first end and the 3rd end;

One first unity gain amplifier, the input of this first unity gain amplifier are coupled to this first end; And

One the 4th switch is coupled between the output and this second end of this first unity gain amplifier;

Wherein, this first switch and this second switch are controlled by one first control signal, and the 3rd switch and the 4th switch are controlled by one second control signal.

7. integrating circuit as claimed in claim 6 is characterized in that when this first control signal activation this second control signal forbidden energy.

8. integrating circuit as claimed in claim 1 is characterized in that this integrating circuit also comprises:

One the 5th switch is coupled between the 3rd end and this earth terminal.

9. integrating circuit as claimed in claim 1 is characterized in that this first energy-storage travelling wave tube is one first electric capacity, and this second energy-storage travelling wave tube is one second electric capacity, and the capacitance of this first electric capacity is less than the capacitance of this second electric capacity.

10. integrating circuit as claimed in claim 1, its characteristic at this integrating circuit in also comprising:

One output buffer cell is coupled between the 3rd end and the output, and this output buffer cell comprises:

One second unity gain amplifier, the input of this second unity gain amplifier is coupled to the 3rd end;

One the 6th switch, an end of the 6th switch is coupled to the output of this second unity gain amplifier;

One the 3rd unity gain amplifier, the input of the 3rd unity gain amplifier is coupled to the other end of the 6th switch, and the output of the 3rd unity gain amplifier is coupled to this output; And

One the 3rd electric capacity is coupled between the input and this earth terminal of the 3rd unity gain amplifier.

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