CN102377414B - Circuit regulator and synchronous clock pulse generation circuit thereof - Google Patents
Circuit regulator and synchronous clock pulse generation circuit thereof Download PDFInfo
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- CN102377414B CN102377414B CN201010257225.7A CN201010257225A CN102377414B CN 102377414 B CN102377414 B CN 102377414B CN 201010257225 A CN201010257225 A CN 201010257225A CN 102377414 B CN102377414 B CN 102377414B
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Abstract
The invention discloses a circuit regulator and a synchronous clock pulse generation circuit thereof. The circuit regulator is used for generating a pulse modulation signal to control power selectively to be input or not to be input to the primary side of a switching power supply. The circuit regulator is provided with the synchronous clock pulse generation circuit, and outputs a starting pulse after the signal processing of time delaying, clock pulse regulation and synchronous control over the pulse modulation signal, a primary side discharging time signal and a secondary side discharging time signal to effectively control the starting time of the pulse modulation signal. Then, when applied to the circuit regulator, the synchronous clock pulse generation circuit can effectively avoid the inductive current of the switching power supply entering a continuous conduction mode.
Description
Technical field
The present invention relates to a kind of circuit adjustment device and synchronous clock pulse thereof and produce circuit, relate in particular to a kind of starting impulse that can Synchronization Control PM signal, and circuit adjustment device and the synchronous clock pulse thereof of avoiding inductive current to enter continuous conduction mode produce circuit.
Background technology
In order to meet the demand of electronic installation in safety, power supply unit now must provide stable output voltage and output current, to supply with all kinds of electronic devices, carries out its preset function.General common AC/DC converter (Alternating Current/Direct Current Converter), can be according to the difference of its built-up circuit, and is divided into two kinds of linear formula power supply unit and switched power suppliers.
Linear formula power supply unit is to utilize transformer, diode and electric capacity, makes AC power after transformer pressure-reducing, then does full-wave rectification with electric capacity is made filtering voltage regulation by diode, and the DC power supply of stable output, to supply load end use.Yet linear formula power supply unit has that volume is large, weight is heavier and the problem such as conversion efficiency is too low.Therefore,, on actual application, the switched power supplier being comprised of passive devices such as power electronic switching and isolating transformer, electric capacity, diodes, compared to linear formula power supply unit, compared with the application in tool industry, and is widely used.
Generally speaking, the operating frequency of switched power supplier between 20K hertz (Hz) between 100K hertz, if again with zero voltage switch (Zero Voltage Switching, ZVS) etc. collocation is used, more than more its switching frequency can being promoted to 200K hertz, to obtain more stable output current.
Yet switched power supplier is easily because of the impact of its more complicated circuit structure and additional noise, and be difficult to realize the current curve of determining with linear characteristic.For example, Fig. 1 is the concise and to the point circuit framework figure of an existing switched power supplier, when switched power supplier is by the stored magnetic flux relation with restoring in inductance L, and switch between primary side and secondary side, while carrying out charge and discharge process, switched power supplier can produce respectively primary side switch current Ip and secondary side switch current Is in its both sides.When primary side switch current Ip enters continuous conduction mode (Continuous Conduction Mode, CCM) and while flowing through inductance L, if it is improper to control, very easily cause inductive current accumulation successively in the charge and discharge process of switched power supplier, and then cause the problem that inductor iron core is saturated; Secondly, when primary side switch current Ip enters continuous conduction mode (Continuous Conduction Mode, CCM) time, can make the switch cost of switching transistor (as: metal-oxide-semiconductor (MOS) or diode) increase, and then the excessive power drain of increase switched power supplier, especially at primary side, do in the design circuit of voltage stabilizing control, continuous conduction mode is difficult for detecting output current accurately.
Summary of the invention
In view of more than, the object of the invention is to propose a kind of circuit adjustment device and synchronous clock pulse thereof that can be applicable to switched power supplier and produce circuit, by paired pulses modulating signal and a secondary side discharge time signal, after elapsed time delay, clock pulse regulate and process with the signal of Synchronization Control, the starting impulse of output adjustable change of one time.Secondly, adjuster and synchronous clock pulse thereof produce circuit in a circuit according to the invention, more can effectively prevent that the inductive current of switched power supplier from entering continuous conduction mode.
To achieve these goals, the present invention proposes a kind of synchronous clock pulse and produces circuit, is suitable for a switched power supplier.Switched power supplier has primary side and secondary side, and switched power supplier is via a PM signal, makes an electric power optionally input or not input primary side.Synchronous clock pulse produces circuit in order to produce the starting impulse of PM signal, and synchronous clock pulse generation circuit comprises: a time delay unit, a clock pulse regulon and a synchronous control unit.
Time delay unit postpones starting impulse after one scheduled time, output one control signal; Clock pulse regulon, according to control signal, makes a constant current source optionally charge in clock pulse regulon, and exports according to this clock pulse signal; Synchronous control unit is according to a discharge time signal of secondary side and clock pulse signal output starting impulse, wherein clock pulse signal has a rising edge, discharge time signal has a drop edge, the triggered time of starting impulse is synchronized with rising edge and drop edge more late person of appearance in same period, and starting impulse is in order to determine the start-up time of PM signal.
To achieve these goals, the present invention also proposes a kind of circuit adjustment device, is suitable for a switched power supplier, and switched power supplier has primary side and secondary side, and switched power supplier, via a PM signal, makes an electric power optionally input or not input primary side.Circuit adjustment device comprises: a PM signal generating circuit and a synchronous clock pulse produce circuit.
PM signal generating circuit, according to the primary side switched voltage signal of primary side and the discharge time signal of secondary side, is exported PM signal, and wherein PM signal has a starting impulse; Synchronous clock pulse produces circuit according to PM signal and discharge time signal, after elapsed time delay, clock pulse regulate and process with the signal of Synchronization Control, and output starting impulse, wherein starting impulse is in order to determine the start-up time of PM signal.
So, the circuit adjustment device proposing according to the present invention and synchronous clock pulse thereof produce circuit, be applied in switched power supplier, can make the discharge time signal that is synchronized with secondary side start-up time (meaning is starting impulse) of PM signal and clock pulse signal one of them.The circuit adjustment device proposing according to the present invention and synchronous clock pulse thereof produce circuit, can avoid the inductive current of switched power supplier to enter continuous conduction mode (Continuous Conduction Mode, CCM).
Below in conjunction with the drawings and specific embodiments, describe the present invention, but not as a limitation of the invention.
Accompanying drawing explanation
Fig. 1 is the concise and to the point circuit framework figure of an existing switched power supplier;
Fig. 2 A produces circuit according to the synchronous clock pulse of the embodiment of the present invention, is applied to the application architecture schematic diagram of the primary circuit adjuster of primary side;
Fig. 2 B produces circuit according to the synchronous clock pulse of the embodiment of the present invention, is applied to the application architecture schematic diagram that secondary side is determined the secondary circuit adjuster under voltage control;
Fig. 2 C produces circuit according to the synchronous clock pulse of the embodiment of the present invention, is applied to the application architecture schematic diagram that secondary side is determined the secondary circuit adjuster under Current Control;
Fig. 3 A is the circuit block diagram of primary circuit adjuster according to an embodiment of the invention;
Fig. 3 B is according to one embodiment of the invention, the relative timing figure of starting impulse, adjustment signal and PM signal;
Fig. 3 C is according to the circuit block diagram of the primary circuit adjuster of further embodiment of this invention;
Fig. 4 is clock pulse regulon according to an embodiment of the invention, its internal circuit allocation plan;
Fig. 5 A to Fig. 5 G produces circuit, the relative timing oscillogram of its each end points for synchronous clock pulse according to an embodiment of the invention;
Fig. 6 A is synchronous control unit according to an embodiment of the invention, its internal circuit allocation plan;
Fig. 6 B is the synchronous control unit according to second embodiment of the invention, its internal circuit allocation plan;
Fig. 7 produces the circuit block diagram of circuit according to the synchronous clock pulse of third embodiment of the invention;
Fig. 8 A is according to fourth embodiment of the invention, and synchronous clock pulse is produced to circuit application in primary side primary circuit adjuster, the circuit block diagram of the application architecture under voltage mode control;
Fig. 8 B is according to fifth embodiment of the invention, and synchronous clock pulse is produced to circuit application secondary circuit adjuster under voltage mode control in Fig. 2 B, the circuit block diagram that it is inner; And
Fig. 8 C is according to sixth embodiment of the invention, and synchronous clock pulse is produced to circuit application secondary circuit adjuster under current control mode in Fig. 2 C, the circuit block diagram that it is inner.
Wherein, Reference numeral
Primary circuit adjuster 10,10a
Primary side 11
PM signal generating circuit 12
Synchronous clock pulse produces circuit 14,14a
Secondary circuit adjuster 20,20a
Transformer 100
Time delay unit 110,510
Synchronous control unit 130,130a
Discharge time, detector 202
Flip-flop 204,508
Charge-discharge circuit 300
Switch element 304
Constant current source 320
Common factor logic gate 504
One shots 506,140
Switched power supplier 1000
Output voltage V
o
Output current I
o
Input voltage V
in
Auxiliary winding N
a
First side winding N
p
Secondary side winding N
s
Power source supply end VDD
Earth terminal GND
Output VOUT
Discharge time test side VDET
Switch current detects end VS
Transistor SW
Rectifier D
dD
Capacitor C
dD
Reflected voltage V
w
External power supply VCC
Primary side switch current I
p
Secondary side switch current I
s
Primary side switched voltage signal V
cs
PM signal V
pWM
Discharge time signal V
dSC
Anti-phase discharge time signal V '
dSC
Adjust signal V
mod
Starting impulse V
sync
Control signal TR
Clock pulse signal T
eND
High voltage pressure value V
h
Low-voltage pressure value V
l
Index signal V
tri
Reference voltage V
ref1
Critical voltage V
ref2
Period 1 T
1
Second round T
2
Rising edge R-
t1, R-
t2, R-
v1, R-
v2
Click clock pulse signal V
oS
Trough signal V
vLY
Embodiment
Below in conjunction with accompanying drawing, structural principle of the present invention and operation principle are described in detail:
Fig. 2 A to Fig. 2 C is respectively according to the synchronous clock pulse of the embodiment of the present invention and produces circuit, its application architecture schematic diagram.Synchronous clock pulse produces circuit according to an embodiment of the invention, can be applicable to primary side 11 or the secondary side 22 of switched power supplier 1000, wherein Fig. 2 A produces circuit application in primary circuit adjuster 10 (the Primary Side Regulator of primary side 11 by synchronous clock pulse, PSR), Fig. 2 B and Fig. 2 C produce synchronous clock pulse respectively circuit application and determine secondary circuit adjuster 20 (the Secondary Side Regulator under voltage control (constant voltage control) in secondary side 22, SSR) determine secondary circuit adjuster 20a (the Secondary Side Regulator under Current Control (constant current control) with secondary side 22, SSR).
Wherein switched power supplier 1000 can be but be not limited to direction flyback converter (flybackconverter), forward converter (Forward Converter), semi-bridge convertor (Half-bridgeConverter), full-bridge converters (Full-bridge Converter) or push-pull type transducer (Push-PullConverter).
Following execution mode, is to using synchronous clock pulse to produce circuit application explanation as an embodiment in the primary circuit adjuster 10 (PSR) of primary side 11, is so not intended to limit scope of the present invention.
PM signal V
pWMthe grid that connects transistor SW via output VOUT.In this, primary circuit adjuster 10 can utilize PM signal V
pWMswitching transistor SW, with control inputs voltage V
ininput or do not input primary side 11.Primary side switched voltage signal V wherein
cScan be the current signal that magnetizes.Reflected voltage V
wcan pass through rectifier D
dDto capacitor C
dDcharge and provide energy to primary circuit adjuster 10.
Fig. 3 A is the circuit block diagram of primary circuit adjuster according to an embodiment of the invention, and wherein primary circuit adjuster 10 comprises that a PM signal generating circuit 12 and synchronous clock pulse produce circuit 14.Two inputs of PM signal generating circuit 12 connect respectively discharge time test side VDET and switch current detect end VS.See also Fig. 2 A, due to discharge time, test side VDET can detect to obtain reflected voltage V
w, reflected voltage V again
win response to secondary side switch current Is, and along with the charge and discharge of transformer 100, and form and produce and the relation simultaneously die-offing simultaneously with secondary side switch current Is.Therefore, PM signal generating circuit 12 can be by the detector 202 discharge time that is connected in test side VDET discharge time, detection of reflected voltage V
w, and export according to this corresponding to secondary side switch current I
sdischarge time signal V
dSC.
The energy that wherein ought be stored in transformer 100 is released into secondary side 22, and forms secondary side switch current I
stime, discharge time signal V
dSCfor high voltage; And when being stored in the energy of transformer 100, to discharge complete (be secondary side switch current I
sget back to zero point) time, discharge time signal V
dSCfor low-voltage.
As shown in Figure 3A, PM signal generating circuit 12 is first according to discharge time signal V
dSC, primary side switched voltage signal V
cSwith critical voltage V
ref2through current waveform remake (Output waveformrebuilding circuit), filtering (Filtering), amplify (Amplifier), with after relatively the signal of (Comparison) is processed, signal V is adjusted in output one
mod.Thereafter, produce the starting impulse V that circuit 14 is exported then according to synchronous clock pulse
sync, by SR type flip-flop 204 output PM signal V
pWM.Take Fig. 3 B as example, starting impulse V
syncin order to determine PM signal V
pWMwhen be switched to high voltage, and adjust signal V
modin order to determine PM signal V
pWMwhen be switched to low-voltage.
Synchronous clock pulse produces circuit 14 in order to export PM signal V
pWMstarting impulse V
sync, and synchronous clock pulse generation circuit 14 comprises a time delay unit 110, a clock pulse regulon 120 and a synchronous control unit 130.Time delay unit 110 receives starting impulse V
sync, and by starting impulse V
syncpostpone after the scheduled time, export a control signal TR, the visual side circuit specification of the length of the scheduled time and designing wherein, for example, the scheduled time can be 50ns to 100ns, or is the retention time (Holding time) that is set as being greater than SR type flip-flop 204.
Control signal TR can or close in order to the conducting of control switch element 304.For example, when control signal TR is low-voltage (switch element 304 cut-offs), charge-discharge circuit 300 can charge by being connected in 320 pairs of electric capacity 302 of constant current source of external power supply VCC; And when control signal TR be high voltage (during switch element 304 conducting), the voltage signal storing in electric capacity 302 can be released into voltage limiting circuit 306.In this, voltage limiting circuit 306 can be respectively by this voltage signal the limiting voltage after charging in high voltage pressure value V
hwith electric discharge after limiting voltage in low-voltage pressure value V
l(magnitude of voltage circle that meaning limits this voltage signal is in high voltage pressure value V
hwith low-voltage pressure value V
lbetween), and export according to this index signal V
tri, index signal V wherein
tritiming waveform, as shown in Figure 5A, and voltage limiting circuit 306 is not with Fig. 4, by high voltage pressure value V
hwith low-voltage pressure value V
lthe way of differential concatenation fly-wheel diode is limited, and also can select to bear the ways such as edge triggering and design it.
Fig. 6 A is synchronous control unit according to an embodiment of the invention, its internal circuit allocation plan.Synchronous control unit 130 comprises anti-phase grid (anti-phase lock) 502 and one common factor logic gate (common factor logic lock) 504, and wherein anti-phase grid 502 receive discharge time signal V
dSC, and by discharge time signal V
dSCafter anti-phase, output one anti-phase discharge time signal V '
dSC.Two inputs of common factor logic gate 504 receive respectively anti-phase discharge time signal V '
dSCwith clock pulse signal T
eND, and export according to this starting impulse V
sync.Discharge time signal V wherein
dSC, anti-phase discharge time signal V '
dSC, clock pulse signal T
eNDwith starting impulse V
syncrelative timing oscillogram, see also Fig. 5 B to Fig. 5 E.
From the above, that is to say, common factor logic gate 504 is in anti-phase discharge time signal V '
dSCwith clock pulse signal T
eNDwhen both are all high voltage, just make starting impulse V
syncbe triggered to form high voltage.In this, starting impulse V
synctriggered time can be synchronized with clock pulse signal T
eNDwith anti-phase discharge time signal V '
dSCone of them.
More particularly, with period 1 T
1for example, as clock pulse signal T
eNDrising edge (Risingedge) R
t1be later than anti-phase discharge time signal V '
dSCrising edge R
v1time, starting impulse V
synctriggered time can be synchronized with clock pulse signal T
eNDrising edge R
t1(i.e. more late person); As at T second round
2in, even if clock pulse signal T
eNDrising edge (Rising edge) R
t2early than anti-phase discharge time signal V '
dSCrising edge R
v2, starting impulse V
synctriggered time also can be synchronized with anti-phase discharge time signal V '
dSCrising edge R
v2(that is more late person).Hence one can see that, and synchronous control unit 130 according to an embodiment of the invention, starting impulse V
synctriggered time be optionally synchronized with in same period, clock pulse signal T
eNDrising edge and anti-phase discharge time signal V '
dSC(meaning is discharge time signal V in rising edge
dSCdrop edge), the wherein more late person of appearance.
In view of more than, due to starting impulse V
syncin order to determine PM signal V
pWMstart-up time (when being switched to high voltage), therefore, as shown in Fig. 5 F, PM signal V
pWMstart-up time also can be synchronized with in same period, clock pulse signal T
eNDrising edge and anti-phase discharge time signal V '
dSCrising edge, the wherein more late person of appearance, reaches modulation PM signal V whereby
pWMthe object of start-up time.
Please refer to Fig. 2 A, due to PM signal V
pWMhigh voltage and low-voltage in order to switching transistor SW, with control inputs voltage V
ininput or do not input primary side 11 and (produce or do not produce primary side switch current I
p).Therefore, see also Fig. 5 C, Fig. 5 F and Fig. 5 G, in period 1 T
1time, even if discharge time signal V
dSCbeing returned to low-voltage (is secondary side switch current I
sget back to zero point), primary side switch current I
palso can not form immediately thereupon, but can wait until PM signal V
pWMafter being triggered, just can start conducting, so make primary side switch current I
pform DCM (Discontinuous Conduction Mode, DCM).
Secondly, according to embodiments of the invention, see also Fig. 5 A to Fig. 5 G, in T second round
2afterwards, PM signal V
pWM(meaning is starting impulse V start-up time
synctrigger point) be adjusted to and be synchronized with discharge time signal V
dSC(meaning is anti-phase discharge time signal V ' in drop edge
dSCrising edge), therefore, switched power supplier can be efficiently after secondary side discharge off, switch back primary side charging immediately and (form primary side switch current I
p), in this, forming boundary conduction mode (BoundaryConduction Mode, BCM), first side winding N avoids flowing through
pinductive current enter continuous conduction mode (Continuous Conduction Mode, CCM).
Secondly, see also Fig. 2 A and Fig. 3 C, for according to the circuit block diagram of the primary circuit adjuster of further embodiment of this invention, wherein discharge time, test side VDET also can be connected in valley detection device 206, and valley detection device 206 can be by test side VDET detection of reflected voltage V discharge time
w, and export according to this trough signal V
vLY, to determine the minimum point of transistor SW resonance between the off period.In this, synchronous clock pulse produces circuit 14 can be according to trough signal V
vLYwith starting impulse V
sync, carry out the signal of time delay, clock pulse adjusting and Synchronization Control and process, to reach modulation PM signal V
pWM(be starting impulse V start-up time
sync) object.Application valley detection device 206 produces circuit 14 in the synchronous clock pulse of the embodiment of the present invention, not only can reach aforementioned modulation starting impulse V
syncobject, also can reduce whereby transistor SW switch cost (meaning be limit transistor SW only in trough conducting and limit its highest frequency), and reduce the electromagnetic interference (Electromagnetic Disturbance, EMI) of integrated circuit.
Fig. 6 B is the synchronous control unit according to second embodiment of the invention, its internal circuit allocation plan, wherein synchronous control unit 130a, except anti-phase grid 502 and common factor logic gate 504, separately can comprise an one shots (One Shot Circuit) 506, one SR type flip-flop 508 and a time delay unit 510.
One shots 506 receive clock pulse signal T wherein
eND, be converted to according to this one and click clock pulse signal V
oS.Two inputs of SR type flip-flop 508 connect respectively the output of one shots 506 and time delay unit 510, and wherein time delay unit 510 is by starting impulse V
syncpostpone after the scheduled time, export SR type flip-flop 508 to.In this, SR type flip-flop 508 receives clicks clock pulse signal V
oSwith the starting impulse V postponing after the scheduled time
sync, produce according to this clock pulse signal T
eND, for follow-up common factor logic gate 504, export according to this starting impulse V
sync.
Secondly, Fig. 7 produces the circuit block diagram of circuit according to the synchronous clock pulse of third embodiment of the invention, the starting impulse V that wherein time delay unit 110 of synchronous clock pulse generation circuit 14a receives
syncalso can be by PM signal V
pWMafter processing by an one shots (One Shot Circuit) 140, produce.That is to say, time delay unit 110 is electrically connected at actual track (Layout) connected mode of other external circuit, not in order to limit scope of the present invention; All according to embodiments of the invention, time delay unit 110 received pulse modulating signal V
pWMstarting impulse V
sync, make clock pulse regulon 120 and synchronous control unit 130 carry out follow-up signal processing, with the starting impulse V that begins
syncbe synchronized with in same period clock pulse signal T
eNDrising edge and anti-phase discharge time signal V '
dSCrising edge, the wherein more late person of appearance, all belongs to the scope of protection of the invention.
Fig. 8 A is according to fourth embodiment of the invention, synchronous clock pulse is produced to the circuit block diagram that circuit 14 is applied to the application architecture of primary side primary circuit adjuster 10a (Primary Side Regulator, PSR) under voltage mode control (voltage mode control).Fig. 8 B and Fig. 8 C are according to fifth embodiment of the invention and the 6th embodiment, synchronous clock pulse is produced to circuit 14 and be applied to respectively the secondary circuit adjuster 20 under voltage mode control in Fig. 2 B (voltage mode control), with the secondary circuit adjuster 20a under current control mode in Fig. 2 C (current mode control), the circuit block diagram that it is inner.So, according to the synchronous clock pulse of the embodiment of the present invention, produce circuit, visual circuit requirements and be optionally disposed at primary side primary circuit adjuster or the secondary side secondary circuit adjuster of stop voltage pattern not or constant current mode.
Secondly, the synchronous clock pulse of the application embodiment of the present invention produces circuit in the circuit adjustment device of switched power supplier, also can effectively control and export can modulation the PM signal of its start-up time, and then the inductive current of avoiding switched power supplier enters continuous conduction mode (ContinuousConduction Mode, CCM).
Certainly; the present invention also can have other various embodiments; in the situation that not deviating from spirit of the present invention and essence thereof; those of ordinary skill in the art are when making according to the present invention various corresponding changes and distortion, but these corresponding changes and distortion all should belong to the protection range of the appended claim of the present invention.
Claims (10)
1. a synchronous clock pulse produces circuit, be suitable for a switched power supplier, this switched power supplier has a primary side and a secondary side, and this switched power supplier is via a PM signal, make an electric power optionally input or not input this primary side, this synchronous clock pulse produces circuit in order to produce a starting impulse of this PM signal, it is characterized in that, this synchronous clock pulse produces circuit and comprises:
One time delay unit, postpones this starting impulse after one scheduled time, output one control signal;
One clock pulse regulon, according to this control signal, makes a constant current source optionally charge in this clock pulse regulon, and exports according to this clock pulse signal; And
One synchronous control unit, according to a discharge time signal of this secondary side and this clock pulse signal, export this starting impulse, wherein this clock pulse signal has a rising edge, this discharge time signal has a drop edge, the triggered time of this starting impulse is synchronized with Yu Gai drop edge, this rising edge more late person of appearance in same period, and this starting impulse is in order to determine a start-up time of this PM signal.
2. synchronous clock pulse according to claim 1 produces circuit, it is characterized in that, this clock pulse regulon comprises:
One charge-discharge circuit, according to this control signal and this constant current source, output one index signal; And
One comparator, is compared to a reference voltage by this index signal, and exports according to this this clock pulse signal.
3. synchronous clock pulse according to claim 2 produces circuit, it is characterized in that, this charge-discharge circuit comprises:
One electric capacity, is connected between this constant current source and a ground connection;
Whether one switch element, is electrically connected at this electric capacity, and this switch element is controlled its conducting or closed by this control signal, to control this constant current source, charge in this electric capacity; And
One voltage limiting circuit, in order to limit the voltage of this electric capacity output signal, to export this index signal.
4. synchronous clock pulse according to claim 1 produces circuit, it is characterized in that, this synchronous control unit comprises:
One anti-phase grid, receive this discharge time signal, and export an anti-phase discharge time signal; And
One common factor logic gate, receives this clock pulse signal and this anti-phase discharge time signal, exports according to this this starting impulse.
5. synchronous clock pulse according to claim 4 produces circuit, it is characterized in that, this synchronous control unit also comprises:
One one shots, receives this clock pulse signal, and exports one and click clock pulse signal;
This time delay unit, postpones this starting impulse after this scheduled time, to export this control signal; And
One flip-flop, receives this and clicks clock pulse signal and this control signal, exports according to this this clock pulse signal.
6. a circuit adjustment device, be suitable for a switched power supplier, this switched power supplier has a primary side and a secondary side, and this switched power supplier is via a PM signal, make an electric power optionally input or not input this primary side, it is characterized in that, this circuit adjustment device comprises:
One PM signal generating circuit, according to a primary side switched voltage signal of this primary side and a discharge time signal of this secondary side, exports this PM signal, and wherein this PM signal has a starting impulse; And
One synchronous clock pulse produces circuit, according to this PM signal and this discharge time signal, elapsed time delay, clock pulse are exported this starting impulse after regulating and processing with the signal of Synchronization Control, wherein this starting impulse is in order to determine a start-up time of this PM signal
Wherein, this synchronous clock pulse generation circuit comprises:
One time delay unit, receives this starting impulse, and this starting impulse was postponed after the scheduled time, output one control signal;
One clock pulse regulon, according to this control signal, makes a constant current source optionally charge in this clock pulse regulon, and exports according to this clock pulse signal; And
One synchronous control unit, according to this discharge time signal and this clock pulse signal, export this starting impulse, wherein this clock pulse signal has a rising edge, this discharge time signal has a drop edge, and the triggered time of this starting impulse is synchronized with Yu Gai drop edge, this rising edge more late person of appearance in same period.
7. circuit adjustment device according to claim 6, is characterized in that, this clock pulse regulon comprises:
One charge-discharge circuit, according to this control signal and this constant current source, output one index signal; And
One comparator, is compared to a reference voltage by this index signal, and exports according to this this clock pulse signal.
8. circuit adjustment device according to claim 7, is characterized in that, this charge-discharge circuit comprises:
One electric capacity, is connected between this constant current source and a ground connection;
Whether one switch element, is electrically connected at this electric capacity, and this switch element is controlled its conducting or closed by this control signal, to control this constant current source, charge in this electric capacity; And
One voltage limiting circuit, in order to limit the voltage of this electric capacity output signal, to export this index signal.
9. circuit adjustment device according to claim 6, is characterized in that, this synchronous control unit comprises:
One anti-phase grid, receive this discharge time signal, and export an anti-phase discharge time signal; And
One common factor logic gate, receives this clock pulse signal and this anti-phase discharge time signal, exports according to this this starting impulse.
10. circuit adjustment device according to claim 9, is characterized in that, this synchronous control unit also comprises:
One one shots, receives this clock pulse signal, and exports one and click clock pulse signal;
This time delay unit, postpones this starting impulse after this scheduled time, to export this control signal; And
One flip-flop, receives this and clicks clock pulse signal and this control signal, exports according to this this clock pulse signal.
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|---|---|---|---|
| CN201010257225.7A CN102377414B (en) | 2010-08-11 | 2010-08-11 | Circuit regulator and synchronous clock pulse generation circuit thereof |
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|---|---|---|---|
| CN201010257225.7A CN102377414B (en) | 2010-08-11 | 2010-08-11 | Circuit regulator and synchronous clock pulse generation circuit thereof |
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| TWI647975B (en) * | 2015-09-03 | 2019-01-11 | 財團法人工業技術研究院 | Driving power generation circuit and method for generating driving power |
| CN114422287B (en) * | 2021-12-09 | 2023-07-07 | 福建星云电子股份有限公司 | Microsecond-level charge and discharge synchronous control method and system |
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| CN101207333A (en) * | 2006-12-21 | 2008-06-25 | 辉芒微电子（深圳）有限公司 | Switch power supply and control method with awaiting orders mode thereof |
| CN101669273A (en) * | 2007-06-14 | 2010-03-10 | 三美电机株式会社 | Switching power supply device and primary side control circuit |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN1806380A (en) * | 2003-06-18 | 2006-07-19 | 崇贸科技股份有限公司 | Primary-side regulated pulse width modulation controller with improved load regulation |
| CN1983783A (en) * | 2005-12-15 | 2007-06-20 | 崇贸科技股份有限公司 | Voltage reflecting method and device for measuring voltage transformer |
| TW200814503A (en) * | 2006-09-06 | 2008-03-16 | Delta Electronics Inc | Resonance converter and driving method for synchronous rectifier thereof |
| CN101207333A (en) * | 2006-12-21 | 2008-06-25 | 辉芒微电子（深圳）有限公司 | Switch power supply and control method with awaiting orders mode thereof |
| CN101669273A (en) * | 2007-06-14 | 2010-03-10 | 三美电机株式会社 | Switching power supply device and primary side control circuit |
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