CN102360192A - Underwater multi-channel data acquisition circuit - Google Patents
Underwater multi-channel data acquisition circuit Download PDFInfo
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- CN102360192A CN102360192A CN2011102655536A CN201110265553A CN102360192A CN 102360192 A CN102360192 A CN 102360192A CN 2011102655536 A CN2011102655536 A CN 2011102655536A CN 201110265553 A CN201110265553 A CN 201110265553A CN 102360192 A CN102360192 A CN 102360192A
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Abstract
The invention discloses an underwater multi-channel data acquisition circuit which can be used for acquiring 1-7 routes of chemical and temperature sensor signals and carrying out data transmission and data acquisition in submarine high-temperature and high-pressure environments. The circuit is divided into an analog circuit part and a digital circuit part, wherein the analog circuit part is mainly responsible for carrying out processing on acquired sensor signals so as to remove interference signal contents in the acquired sensor signals, and adjusting the acquired sensor signals to be in a range which can be converted by an analog-digital converter; and the digital circuit part is mainly responsible for converting analog signals into corresponding digital quantities and storing the digital quantities into a memory chip, and in charge of the operation control and external communication of a whole circuit board. The underwater multi-channel data acquisition circuit disclosed by the invention is low in power consumption and high in reliability of data storage.
Description
Technical field
The invention belongs to the sensor data acquisition field, especially a kind of circuit of multi-channel data acquisition under water.
Background technology
Each state of the world today all is faced with the threat of shortage of resources; Expanding economy has consumed the resource of land gradually; Yet containing huge in the ocean and rich in natural resources; This just requires us to strengthen the development and utilization to ocean resources, and the first step of marine resources research exploitation is the exploration of ocean resources, and this just need use the environmental aspect that the very high instrument of a lot of precision is surveyed the ocean.The technology of utilizing sensor to realize that ocean resources are surveyed has at present obtained significant progress; The circumstance complication of ocean; The factor that influences marine environment is a lot; This just requires the instrument and equipment of hydrospace detection to want integrated various physics, chemical sensor, ask for something for a long time in the ocean equipment of in-situ observation also to possess characteristics such as low-power consumption, reliability height.
Summary of the invention
The present invention is directed to the deficiency of prior art, proposed a kind of circuit of multi-channel data acquisition under water.
A kind of circuit of multi-channel data acquisition under water comprises microcontroller circuit, A/D forward path circuit, data storage circuitry, real time clock circuit and RS232 communicating circuit.
Microcontroller circuit comprises MSP430F149 chip U17, the second crystal oscillator Y2, the 51 capacitor C 51, the 58 capacitor C 58, the tenth polar capacitor E10, the 11 polar capacitor E11.
The XIN pin of the second crystal oscillator Y2, one termination MSP430F149 chip U17, the XOUT/TCLK pin of another termination MSP430F149 chip U17, the DVCC pin of a termination MSP430F149 chip U17 of the 51 capacitor C 51; Another termination digitally, the AVCC pin of a termination MSP430F149 chip U17 of the 58 capacitor C 58, another termination simulation ground; The AVCC pin of the positive pole one termination MSP430F149 chip U17 of the tenth polar capacitor E10; Another termination simulation ground, the DVCC pin of the positive pole one termination MSP430F149 chip U17 of the 11 polar capacitor E11, another termination is digitally; DVSS, the XT2IN of MSP430F149 chip U17 connect digitally; AVSS connects simulation ground, and AVCC pin and DVCC pin all connect voltage and be+power supply of 3.3V, the P6.1-P6.7 pin of MSP430F149 chip U17 is the interface of seven road A/D data-switching passages.
A/D forward path circuit passes through the chemical sensor and the measured electric weight of temperature sensor of native system filtering, amplifies the voltage signal that converts into Chip Microcomputer A/the D reference voltage is mated.Because 8 paths are arranged, every paths is similar basically, therefore only selects the wherein A/D forward path circuit of one road chemical sensor here.This A/D forward path partly comprises the 14 resistance R 14, the 21 resistance R 21, the 22 resistance R 22, the 29 resistance R 29; The 33 resistance R 33, the eight capacitor C 8, the nine capacitor C 9, the ten capacitor C 10; The 11 capacitor C 11, the 17 capacitor C 17, the 26 capacitor C 26, the 30 capacitor C 30; The 35 capacitor C 35, the three operational amplifier U3A, four-operational amplifier U4A.
One termination chemical sensor of the 14 resistance R 14, the input end in the same way of another termination the 3rd operational amplifier U3A, the inverting input of a termination four-operational amplifier U4A of the 21 resistance R 21; The output terminal of another termination four-operational amplifier U4A, the output terminal of a termination the 3rd operational amplifier U3A of the 22 resistance R 22, the inverting input of another termination four-operational amplifier U4A; One termination reference voltage of the 29 resistance R 29, the in-phase input end of another termination four-operational amplifier U4A, the output terminal of a termination four-operational amplifier U4A of the 33 resistance R 33; The P6.6/A6 pin of another termination MSP430F149 chip U17, the termination simulation ground of the 8th capacitor C 8, the forward power input of another termination the 3rd operational amplifier U3A; The one termination simulation ground of the 9th capacitor C 9, the negative sense power input of another termination the 3rd operational amplifier U3A, the termination simulation ground of the tenth capacitor C 10; The forward power input of another termination four-operational amplifier U4A; The one termination simulation ground of the 11 capacitor C 11, the negative sense power input of another termination four-operational amplifier U4A, the termination simulation ground of the 17 capacitor C 17; The P6.6/A6 pin of another termination MSP430F149 chip U17; The one termination simulation ground of the 26 capacitor C 26, the input end in the same way of another termination the 3rd operational amplifier U3A, the inverting input of a termination four-operational amplifier U4A of the 30 capacitor C 30; The output terminal of another termination four-operational amplifier U4A; The one termination simulation ground of the 35 capacitor C 35, the P6.6/A6 pin of another termination MSP430F149 chip U17, the inverting input of the 3rd operational amplifier U3A and its output terminal join; The positive supply input end of the 3rd operational amplifier U3A and four-operational amplifier U4A all connects+the 3.3V power supply, and the negative sense power input all connects-the 3.3V power supply.
Data storage circuitry comprises pin-saving chip AT45DB321BU14, the 50 resistance R 50.
One termination of the 50 resistance R 50+3.3V power supply; The RDY/BUSY pin of another termination pin-saving chip AT45DB321BU14;
pin and the VCC pin of pin-saving chip AT45DB321BU14 connect+the 3.3V power supply; The GND pin connects digitally; The RESET pin connects the P4.7/TBCLK pin of MSP430F149 chip U17; The RDY/BUSY pin connects the P1.5/TA0 pin of MSP430F149 chip U17, and the CS pin connects the P5.0/STE1 pin of MSP430F149 chip U17, and the SCK pin connects the P5.3/UCLK1 pin of MSP430F149 chip U17; The SI pin connects the P5.1/SIMO1 pin of MSP430F149 chip U17, and the SO pin connects the P5.2/ SOMI1 pin of MSP430F149 chip U17.
Real time clock circuit comprises standard time clock chip PCF8563U10, the first crystal oscillator Y1, the 45 capacitor C the 45, the 46 capacitor C 46, sextupole property electric capacity E6, the 45 resistance R the 45, the 46 resistance R the 46, the 47 resistance R 47, the second diode D2, the 3rd diode D3, the first battery BT1.
The OSCO pin of the termination standard time clock chip PCF8563U10 of the first crystal oscillator Y1, the OSCI pin of another termination standard time clock chip PCF8563U10, the OSCI pin of a termination standard time clock chip PCF8563U10 of the 45 capacitor C 45; Another termination digitally, the VSS pin of a termination standard time clock chip PCF8563U10 of the 46 capacitor C 46, the VDD pin of another termination standard time clock chip PCF8563U10; The positive pole of sextupole property electric capacity E6 connects the VDD pin of standard time clock chip PCF8563U10; Minus earth, the INT pin of a termination standard time clock chip PCF8563U10 of the 45 resistance R 45, another termination+3.3V power supply; The SCL pin of one termination standard time clock chip PCF8563U10 of the 46 resistance R 46; Another termination+3.3V power supply, the SDA pin of a termination standard time clock chip PCF8563U10 of the 47 resistance R 47, another termination+3.3V power supply; One termination of the second diode D2+3.3V power supply; The VDD pin of another termination standard time clock chip PCF8563U10, the VDD pin of the termination standard time clock chip PCF8563U10 of the 3rd diode D3, the positive pole of another termination first battery BT1; The negative pole of the first battery BT1 connects digitally; The INT pin of standard time clock chip PCF8563U10 connects the P2.5/Rosc pin of MSP430F149 chip U17, and the SCL pin connects the P2.7/TA0 pin of MSP430F149 chip U17, and the SDA pin connects the P3.0/STE0 pin of MSP430F149 chip U17.
The RS232 communicating circuit comprises RS232 level transferring chip LTC1385U12, the 54 capacitor C the 54, the 55 capacitor C the 55, the 59 capacitor C the 59, the 60 capacitor C the 60, the 49 resistance R the 49, the 54 resistance R 54, second LED 2, first switch S 1, the 4th connection terminal J4.
The C1+ pin of one termination RS232 level transferring chip LTC1385U12 of the 54 capacitor C 54, the C1-pin of another termination RS232 level transferring chip LTC1385U12, the C2+ pin of a termination RS232 level transferring chip LTC1385U12 of the 55 capacitor C 55; The C2-pin of another termination RS232 level transferring chip LTC1385U12, the V-pin of a termination RS232 level transferring chip LTC1385U12 of the 59 capacitor C 59, another termination is digitally; The V+ pin of one termination RS232 level transferring chip LTC1385U12 of the 60 capacitor C 60; Another termination digitally, the ON/OFF pin of a termination RS232 level transferring chip LTC1385U12 of the 49 resistance R 49, the positive pole of another termination second LED 2; The ON pin of one termination RS232 level transferring chip LTC1385U12 of the 54 resistance R 54; Another termination digitally, a termination the 49 resistance R 49 of second LED 2, another termination digitally; One termination of first switch S 1+3.3V power supply; The ON/OFF pin of another termination RS232 level transferring chip LTC1385U12, the B3 pin of the 4th connection terminal J4 and A3 pin connect the TR2out pin of RS232 level transferring chip LTC1385U12, and the A2 pin connects the RX2in pin of RS232 level transferring chip LTC1385U12; B1 pin and A1 pin connect digitally; The D-DIS pin of level transferring chip LTC1385U12 connects the P5.5/SMCLK pin of MSP430F149 chip U17, and the TR2in pin connects the P3.4/UTXD0 pin of MSP430F149 chip U17, and the RX2out pin connects the P3.5/URXD0 pin of MSP430F149 chip U17; The GND pin connects digitally, and the VCC pin connects the power supply of voltage for+3.3V.
Principal feature of the present invention is that the MSP430F149 microcontroller of selecting for use carries 8 tunnel 12 AD passages, is digital signal with the analog signal conversion of importing, and the data that each sampling obtains will be saved among the RAM of MSP430F149 automatically.Through control of software, after the data acquisition of certain group finished, the temporal information that these data are provided together with real-time clock in time stored in the FLASH storer with the communication modes of spi bus.Single-chip microcomputer is once sampling at set intervals, in sampling time not, can make single-chip microcomputer be in low-power consumption mode (LPM3) through software control; This moment, CPU was under an embargo, and major clock MCLK is under an embargo, and period of the day from 11 p.m. to 1 a.m clock SMCLK is under an embargo; The NC R C oscillator DCO that MSP430F149 carries is under an embargo, and ACLK auxiliary clock maintenance activity can reduce power consumption in this way greatly; This moment, the power consumption of microcontroller had only about 6uW, almost can ignore.The timing sampling function is accomplished by timer TimerA; Setting through software; Selecting the clock source of timer is ACLK, when the preset timing sampling time arrives, in the interruption subroutine of timer, MCU is activated; Total system is in active state again, and all I/O mouths recover to use to realize that MSP430F149 is with the communication between peripheral chip.After detecting head was placed on the seabed and reaches the regular hour, when we hauled out the sea with detecting head, the data that leave in the FLASH storer outputed in the PC through the RS232 serial communication, so that carry out next step analysis and research work.Even because the FLASH storer is under the situation of power down, for example battery has broken down etc., can obliterated data yet, so the storage of data is reliable.
Description of drawings
Fig. 1 is the circuit diagram of microcontroller MSP430F149 chip of the present invention;
Fig. 2 is the circuit diagram of data storage part of the present invention;
Fig. 3 is the circuit diagram of real-time clock part of the present invention;
Fig. 4 is the circuit diagram of RS232 serial communication part of the present invention;
Fig. 5 is the circuit diagram of A/D forward path part of the present invention.
Embodiment
Below in conjunction with accompanying drawing the present invention is further described.
A kind of circuit of multi-channel data acquisition under water comprises microcontroller circuit, A/D forward path circuit, data storage circuitry, real time clock circuit and RS232 communicating circuit.
As shown in Figure 1, microcontroller circuit comprises MSP430F149 chip U17, the second crystal oscillator Y2, the 51 capacitor C 51, the 58 capacitor C 58, the tenth polar capacitor E10, the 11 polar capacitor E11.
The XIN pin of the second crystal oscillator Y2, one termination MSP430F149 chip U17, the XOUT/TCLK pin of another termination MSP430F149 chip U17, the DVCC pin of a termination MSP430F149 chip U17 of the 51 capacitor C 51; Another termination digitally, the AVCC pin of a termination MSP430F149 chip U17 of the 58 capacitor C 58, another termination simulation ground; The AVCC pin of the positive pole one termination MSP430F149 chip U17 of the tenth polar capacitor E10; Another termination simulation ground, the DVCC pin of the positive pole one termination MSP430F149 chip U17 of the 11 polar capacitor E11, another termination is digitally; DVSS, the XT2IN of MSP430F149 chip U17 connect digitally; AVSS connects simulation ground, and AVCC pin and DVCC pin all connect voltage and be+power supply of 3.3V, the P6.1-P6.7 pin of MSP430F149 chip U17 is the interface of seven road A/D data-switching passages.
A/D forward path circuit as shown in Figure 5 passes through the chemical sensor and the measured electric weight of temperature sensor of native system filtering, amplifies the voltage signal that converts into Chip Microcomputer A/the D reference voltage is mated.Because 8 paths are arranged, every paths is similar basically, therefore only selects the wherein A/D forward path circuit of one road chemical sensor here.This A/D forward path partly comprises the 14 resistance R 14, the 21 resistance R 21, the 22 resistance R 22, the 29 resistance R 29; The 33 resistance R 33, the eight capacitor C 8, the nine capacitor C 9, the ten capacitor C 10; The 11 capacitor C 11, the 17 capacitor C 17, the 26 capacitor C 26, the 30 capacitor C 30; The 35 capacitor C 35, the three operational amplifier U3A, four-operational amplifier U4A.
One termination chemical sensor of the 14 resistance R 14, the input end in the same way of another termination the 3rd operational amplifier U3A, the inverting input of a termination four-operational amplifier U4A of the 21 resistance R 21; The output terminal of another termination four-operational amplifier U4A, the output terminal of a termination the 3rd operational amplifier U3A of the 22 resistance R 22, the inverting input of another termination four-operational amplifier U4A; One termination reference voltage of the 29 resistance R 29, the in-phase input end of another termination four-operational amplifier U4A, the output terminal of a termination four-operational amplifier U4A of the 33 resistance R 33; The P6.6/A6 pin of another termination MSP430F149 chip U17, the termination simulation ground of the 8th capacitor C 8, the forward power input of another termination the 3rd operational amplifier U3A; The one termination simulation ground of the 9th capacitor C 9, the negative sense power input of another termination the 3rd operational amplifier U3A, the termination simulation ground of the tenth capacitor C 10; The forward power input of another termination four-operational amplifier U4A; The one termination simulation ground of the 11 capacitor C 11, the negative sense power input of another termination four-operational amplifier U4A, the termination simulation ground of the 17 capacitor C 17; The P6.6/A6 pin of another termination MSP430F149 chip U17; The one termination simulation ground of the 26 capacitor C 26, the input end in the same way of another termination the 3rd operational amplifier U3A, the inverting input of a termination four-operational amplifier U4A of the 30 capacitor C 30; The output terminal of another termination four-operational amplifier U4A; The one termination simulation ground of the 35 capacitor C 35, the P6.6/A6 pin of another termination MSP430F149 chip U17, the inverting input of the 3rd operational amplifier U3A and its output terminal join; The positive supply input end of the 3rd operational amplifier U3A and four-operational amplifier U4A all connects+the 3.3V power supply, and the negative sense power input all connects-the 3.3V power supply.
As shown in Figure 2, data storage circuitry comprises pin-saving chip AT45DB321BU14, the 50 resistance R 50.
One termination of the 50 resistance R 50+3.3V power supply; The RDY/BUSY pin of another termination pin-saving chip AT45DB321BU14;
pin and the VCC pin of pin-saving chip AT45DB321BU14 connect+the 3.3V power supply; The GND pin connects digitally; The RESET pin connects the P4.7/TBCLK pin of MSP430F149 chip U17; The RDY/BUSY pin connects the P1.5/TA0 pin of MSP430F149 chip U17, and the CS pin connects the P5.0/STE1 pin of MSP430F149 chip U17, and the SCK pin connects the P5.3/UCLK1 pin of MSP430F149 chip U17; The SI pin connects the P5.1/SIMO1 pin of MSP430F149 chip U17, and the SO pin connects the P5.2/ SOMI1 pin of MSP430F149 chip U17.
As shown in Figure 3, real time clock circuit comprises standard time clock chip PCF8563U10, the first crystal oscillator Y1, the 45 capacitor C the 45, the 46 capacitor C 46, sextupole property electric capacity E6, the 45 resistance R the 45, the 46 resistance R the 46, the 47 resistance R 47, the second diode D2, the 3rd diode D3, the first battery BT1.
The OSCO pin of the termination standard time clock chip PCF8563U10 of the first crystal oscillator Y1, the OSCI pin of another termination standard time clock chip PCF8563U10, the OSCI pin of a termination standard time clock chip PCF8563U10 of the 45 capacitor C 45; Another termination digitally, the VSS pin of a termination standard time clock chip PCF8563U10 of the 46 capacitor C 46, the VDD pin of another termination standard time clock chip PCF8563U10; The positive pole of sextupole property electric capacity E6 connects the VDD pin of standard time clock chip PCF8563U10; Minus earth, the INT pin of a termination standard time clock chip PCF8563U10 of the 45 resistance R 45, another termination+3.3V power supply; The SCL pin of one termination standard time clock chip PCF8563U10 of the 46 resistance R 46; Another termination+3.3V power supply, the SDA pin of a termination standard time clock chip PCF8563U10 of the 47 resistance R 47, another termination+3.3V power supply; One termination of the second diode D2+3.3V power supply; The VDD pin of another termination standard time clock chip PCF8563U10, the VDD pin of the termination standard time clock chip PCF8563U10 of the 3rd diode D3, the positive pole of another termination first battery BT1; The negative pole of the first battery BT1 connects digitally; The INT pin of standard time clock chip PCF8563U10 connects the P2.5/Rosc pin of MSP430F149 chip U17, and the SCL pin connects the P2.7/TA0 pin of MSP430F149 chip U17, and the SDA pin connects the P3.0/STE0 pin of MSP430F149 chip U17.
As shown in Figure 4, the RS232 communicating circuit comprises RS232 level transferring chip LTC1385U12, the 54 capacitor C the 54, the 55 capacitor C the 55, the 59 capacitor C the 59, the 60 capacitor C the 60, the 49 resistance R the 49, the 54 resistance R 54, second LED 2, first switch S 1, the 4th connection terminal J4.
The C1+ pin of one termination RS232 level transferring chip LTC1385U12 of the 54 capacitor C 54, the C1-pin of another termination RS232 level transferring chip LTC1385U12, the C2+ pin of a termination RS232 level transferring chip LTC1385U12 of the 55 capacitor C 55; The C2-pin of another termination RS232 level transferring chip LTC1385U12, the V-pin of a termination RS232 level transferring chip LTC1385U12 of the 59 capacitor C 59, another termination is digitally; The V+ pin of one termination RS232 level transferring chip LTC1385U12 of the 60 capacitor C 60; Another termination digitally, the ON/OFF pin of a termination RS232 level transferring chip LTC1385U12 of the 49 resistance R 49, the positive pole of another termination second LED 2; The ON pin of one termination RS232 level transferring chip LTC1385U12 of the 54 resistance R 54; Another termination digitally, a termination the 49 resistance R 49 of second LED 2, another termination digitally; One termination of first switch S 1+3.3V power supply; The ON/OFF pin of another termination RS232 level transferring chip LTC1385U12, the B3 pin of the 4th connection terminal J4 and A3 pin connect the TR2out pin of RS232 level transferring chip LTC1385U12, and the A2 pin connects the RX2in pin of RS232 level transferring chip LTC1385U12; B1 pin and A1 pin connect digitally; The D-DIS pin of level transferring chip LTC1385U12 connects the P5.5/SMCLK pin of MSP430F149 chip U17, and the TR2in pin connects the P3.4/UTXD0 pin of MSP430F149 chip U17, and the RX2out pin connects the P3.5/URXD0 pin of MSP430F149 chip U17; The GND pin connects digitally, and the VCC pin connects the power supply of voltage for+3.3V.
The A/D forward path passes through the chemical sensor and the measured electric weight of temperature sensor of native system filtering, amplifies the voltage signal that converts into Chip Microcomputer A/the D reference voltage is mated; 8 tunnel 12 AD passages that treated input signal carries through single-chip microcomputer are digital signal with the analog signal conversion of importing.Data on the sensor that each sampling obtains are saved among the RAM of MSP430 automatically; Pass through control of software; After the data acquisition of certain group finished, the temporal information that these data are provided together with real-time clock in time stored in the FLASH storer with the communication modes of spi bus.Single-chip microcomputer is once sampling at set intervals, in sampling time not, can make single-chip microcomputer be in low-power consumption mode (LPM3) through software control; This moment, CPU was under an embargo, and major clock MCLK is under an embargo, and period of the day from 11 p.m. to 1 a.m clock SMCLK is under an embargo; The NC R C oscillator DCO that MSP carries is under an embargo, and ACLK auxiliary clock maintenance activity can reduce power consumption in this way greatly; This moment, the power consumption of microcontroller had only about 6uW, almost can ignore.The timing sampling function is accomplished by timer TimerA; Setting through software; Selecting the clock source of timer is ACLK, when the preset timing sampling time arrives, in the interruption subroutine of timer, MCU is activated; Total system is in active state again, and all I/O mouths recover to use to realize that MSP is with the communication between peripheral chip.After detecting head was placed on the seabed and reaches the regular hour, when we hauled out the sea with detecting head, the data that leave in the FLASH storer outputed in the PC through the RS232 serial communication, so that carry out next step analysis and research work.Even because the FLASH storer is under the situation of power down, can obliterated data yet, so the storage of data is reliable.
MSP430F149 itself carries the RAM of 2K, can not satisfy the requirement of storage mass data at all, therefore needs the external data memory, for long-term detection data is preserved; On the signal processing integrated circuit plate, designed the Flash storer AT45DB321B of 32Mbit, it can deposit 327,640 groups of image data; Per 40 groups have zero-time (year, the moon, day; Hour Minute Second), inner FLASH storer is 8192 pages, every page of 528byte.Data recording is 4 road chemical sensors, No. 3 temperature sensors; Every page have 1 zero-time data (days, day, the time, divide, second) totally 13 bytes.Every page data has 40 groups, has available 8191 pages altogether, can deposit 8191 * 40 groups of data, if every group of sampling time interval is 6 seconds, can store the data of 455 hours (that is: 22.75 days).
Standard time clock chip PCF8563, the time can be accurate to year, month, day, week, the time, divide, second.And be provided with special time adjusting program, can be by the variation adjustment clock in time zone.PCF8563 is the CMOS real-time clock/calendar chip of low-power consumption, and it provides a programmable clock output, and one interrupts output and detection of power loss device, and all address and data are passed through I
2C EBI serial transfer.Maximum bus speed is 400Kbits/s, and after reading and writing data, embedded word address register can produce increment automatically at every turn.
Because single-chip microcomputer output is the voltage signal of 3V; Then require the level signal of 12V with PC RS232 communication, so need level transferring chip between the two, select LTC1385 at this; It is the two-way RS232/UART modular converter of low-power consumption; Have normally, drive part turn-offs, three kinds of patterns of sleep, can reduce power consumption to greatest extent.
Claims (1)
1. a multi-channel data acquisition circuit under water comprises microcontroller circuit, A/D forward path circuit, data storage circuitry, real time clock circuit and RS232 communicating circuit, it is characterized in that:
Microcontroller circuit comprises MSP430F149 chip U17, the second crystal oscillator Y2, the 51 capacitor C 51, the 58 capacitor C 58, the tenth polar capacitor E10 and the 11 polar capacitor E11; The XIN pin of the second crystal oscillator Y2, one termination MSP430F149 chip U17, the XOUT/TCLK pin of another termination MSP430F149 chip U17, the DVCC pin of a termination MSP430F149 chip U17 of the 51 capacitor C 51; Another termination digitally, the AVCC pin of a termination MSP430F149 chip U17 of the 58 capacitor C 58, another termination simulation ground; The AVCC pin of the positive pole one termination MSP430F149 chip U17 of the tenth polar capacitor E10; Another termination simulation ground, the DVCC pin of the positive pole one termination MSP430F149 chip U17 of the 11 polar capacitor E11, another termination is digitally; DVSS, the XT2IN of MSP430F149 chip U17 connect digitally; AVSS connects simulation ground, and AVCC pin and DVCC pin all connect voltage and be+power supply of 3.3V, the P6.1-P6.7 pin of MSP430F149 chip U17 is the interface of seven road A/D data-switching passages;
A/D forward path circuit has 8 paths, and every paths structure is consistent, comprises the 14 resistance R 14, the 21 resistance R 21; The 22 resistance R 22, the 29 resistance R 29, the 33 resistance R 33, the eight capacitor C 8; The 9th capacitor C 9, the ten capacitor C 10, the 11 capacitor C 11, the 17 capacitor C 17; The 26 capacitor C 26, the 30 capacitor C 30, the 35 capacitor C 35, the three operational amplifier U3A and four-operational amplifier U4A; One termination chemical sensor of the 14 resistance R 14, the input end in the same way of another termination the 3rd operational amplifier U3A, the inverting input of a termination four-operational amplifier U4A of the 21 resistance R 21; The output terminal of another termination four-operational amplifier U4A, the output terminal of a termination the 3rd operational amplifier U3A of the 22 resistance R 22, the inverting input of another termination four-operational amplifier U4A; One termination reference voltage of the 29 resistance R 29, the in-phase input end of another termination four-operational amplifier U4A, the output terminal of a termination four-operational amplifier U4A of the 33 resistance R 33; The P6.6/A6 pin of another termination MSP430F149 chip U17, the termination simulation ground of the 8th capacitor C 8, the forward power input of another termination the 3rd operational amplifier U3A; The one termination simulation ground of the 9th capacitor C 9, the negative sense power input of another termination the 3rd operational amplifier U3A, the termination simulation ground of the tenth capacitor C 10; The forward power input of another termination four-operational amplifier U4A; The one termination simulation ground of the 11 capacitor C 11, the negative sense power input of another termination four-operational amplifier U4A, the termination simulation ground of the 17 capacitor C 17; The P6.6/A6 pin of another termination MSP430F149 chip U17; The one termination simulation ground of the 26 capacitor C 26, the input end in the same way of another termination the 3rd operational amplifier U3A, the inverting input of a termination four-operational amplifier U4A of the 30 capacitor C 30; The output terminal of another termination four-operational amplifier U4A; The one termination simulation ground of the 35 capacitor C 35, the P6.6/A6 pin of another termination MSP430F149 chip U17, the inverting input of the 3rd operational amplifier U3A and its output terminal join; The positive supply input end of the 3rd operational amplifier U3A and four-operational amplifier U4A all connects+the 3.3V power supply, and the negative sense power input all connects-the 3.3V power supply;
Data storage circuitry comprises pin-saving chip AT45DB321BU14 and the 50 resistance R 50; One termination of the 50 resistance R 50+3.3V power supply; The RDY/BUSY pin of another termination pin-saving chip AT45DB321BU14;
pin and the VCC pin of pin-saving chip AT45DB321BU14 connect+the 3.3V power supply; The GND pin connects digitally; The RESET pin connects the P4.7/TBCLK pin of MSP430F149 chip U17; The RDY/BUSY pin connects the P1.5/TA0 pin of MSP430F149 chip U17, and the CS pin connects the P5.0/STE1 pin of MSP430F149 chip U17, and the SCK pin connects the P5.3/UCLK1 pin of MSP430F149 chip U17; The SI pin connects the P5.1/SIMO1 pin of MSP430F149 chip U17, and the SO pin connects the P5.2/ SOMI1 pin of MSP430F149 chip U17;
Real time clock circuit comprises standard time clock chip PCF8563U10, the first crystal oscillator Y1, the 45 capacitor C the 45, the 46 capacitor C 46, sextupole property electric capacity E6, the 45 resistance R the 45, the 46 resistance R the 46, the 47 resistance R 47, the second diode D2, the 3rd diode D3 and the first battery BT1; The OSCO pin of the termination standard time clock chip PCF8563U10 of the first crystal oscillator Y1, the OSCI pin of another termination standard time clock chip PCF8563U10, the OSCI pin of a termination standard time clock chip PCF8563U10 of the 45 capacitor C 45; Another termination digitally, the VSS pin of a termination standard time clock chip PCF8563U10 of the 46 capacitor C 46, the VDD pin of another termination standard time clock chip PCF8563U10; The positive pole of sextupole property electric capacity E6 connects the VDD pin of standard time clock chip PCF8563U10; Minus earth, the INT pin of a termination standard time clock chip PCF8563U10 of the 45 resistance R 45, another termination+3.3V power supply; The SCL pin of one termination standard time clock chip PCF8563U10 of the 46 resistance R 46; Another termination+3.3V power supply, the SDA pin of a termination standard time clock chip PCF8563U10 of the 47 resistance R 47, another termination+3.3V power supply; One termination of the second diode D2+3.3V power supply; The VDD pin of another termination standard time clock chip PCF8563U10, the VDD pin of the termination standard time clock chip PCF8563U10 of the 3rd diode D3, the positive pole of another termination first battery BT1; The negative pole of the first battery BT1 connects digitally; The INT pin of standard time clock chip PCF8563U10 connects the P2.5/Rosc pin of MSP430F149 chip U17, and the SCL pin connects the P2.7/TA0 pin of MSP430F149 chip U17, and the SDA pin connects the P3.0/STE0 pin of MSP430F149 chip U17;
The RS232 communicating circuit comprises RS232 level transferring chip LTC1385U12, the 54 capacitor C the 54, the 55 capacitor C the 55, the 59 capacitor C the 59, the 60 capacitor C the 60, the 49 resistance R the 49, the 54 resistance R 54, second LED 2, first switch S 1 and the 4th connection terminal J4; The C1+ pin of one termination RS232 level transferring chip LTC1385U12 of the 54 capacitor C 54, the C1-pin of another termination RS232 level transferring chip LTC1385U12, the C2+ pin of a termination RS232 level transferring chip LTC1385U12 of the 55 capacitor C 55; The C2-pin of another termination RS232 level transferring chip LTC1385U12, the V-pin of a termination RS232 level transferring chip LTC1385U12 of the 59 capacitor C 59, another termination is digitally; The V+ pin of one termination RS232 level transferring chip LTC1385U12 of the 60 capacitor C 60; Another termination digitally, the ON/OFF pin of a termination RS232 level transferring chip LTC1385U12 of the 49 resistance R 49, the positive pole of another termination second LED 2; The ON pin of one termination RS232 level transferring chip LTC1385U12 of the 54 resistance R 54; Another termination digitally, a termination the 49 resistance R 49 of second LED 2, another termination digitally; One termination of first switch S 1+3.3V power supply; The ON/OFF pin of another termination RS232 level transferring chip LTC1385U12, the B3 pin of the 4th connection terminal J4 and A3 pin connect the TR2out pin of RS232 level transferring chip LTC1385U12, and the A2 pin connects the RX2in pin of RS232 level transferring chip LTC1385U12; B1 pin and A1 pin connect digitally; The D-DIS pin of level transferring chip LTC1385U12 connects the P5.5/SMCLK pin of MSP430F149 chip U17, and the TR2in pin connects the P3.4/UTXD0 pin of MSP430F149 chip U17, and the RX2out pin connects the P3.5/URXD0 pin of MSP430F149 chip U17; The GND pin connects digitally, and the VCC pin connects the power supply of voltage for+3.3V.
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| CN2011102655536A CN102360192A (en) | 2011-09-08 | 2011-09-08 | Underwater multi-channel data acquisition circuit |
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Application publication date: 20120222 |