CN102360080B - Global positioning system (GPS) and global navigation satellite system (GLONASS) multimode channel search method and search engine - Google Patents
Global positioning system (GPS) and global navigation satellite system (GLONASS) multimode channel search method and search engine Download PDFInfo
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Abstract
The invention discloses a global positioning system (GPS) and global navigation satellite system (GLONASS) multimode channel search method and a search engine. The search engine comprises a clock generator, a control register, an analog-to-digital converter multiplexer, a code generator, a mixer, a correlator and an advanced peripheral bus interface.
Description
Technical field
The present invention relates to satellite-signal tracing system, mainly refer to a kind of GPS and GLONASS multimode channel search method and search engine (FAP).
Background technology
Known GPS adopts CDMA signals, and GLONASS adopts frequency division multiple address signal, and their signal format, transmission mode etc. all have remarkable difference.Traditional satellite-signal tracing system can only receive GPS or GLONASS signal, can not receive simultaneously and follow the tracks of GPS and GLONASS signal.
Summary of the invention
Object of the present invention is just to provide a kind of GPS and GLONASS multimode channel search method and search engine, by clock generator, control register, analog to digital converter multiplexer switch, code generator, mixer, correlator, advanced peripheral bus interface, overcome preferably the deficiency that prior art exists.
Realizing method of the present invention is: comprise
Clock generator is inputted and is carried out frequency division to obtain the internal clock signal group of leggy MCLK;
Control register comprises inhomogeneous bit and controls analog to digital converter multiplexer switch (ADC multiplexer), clock generator (Clock generator) and mixer (Mixer);
Analog to digital converter multiplexer switch is programmable, there are two kinds of mode of operations: the binary data of 16 (multiplexing modes), the quaternary data of 8 (2 take advantage of 2 complicated multiplexing modes), under binary data pattern, analog to digital converter is supported the input of three kinds of forms: without symbol scale-of-two, symbol and value, or two's complement input analog-to-digital converter multiplexer switch can be configured to two cell multiplexing input (16 inputting channel) or binary complex signal I & Q (8 inputting channel), data representation frequency is the bandpass signal to 19MHz at 1MHz, this signal is sampled by the sample frequency with 40MHz, thereby raising frequency is to 21MHz to 39MHz,
C/A code generator is gps satellite, ground transmitter (pseudo satellite, pseudolite), whole world mobile satellite network (INMARSAT-GIC) satellite or GLONASS satellite generate selected gold code, by CNTL register being write to 10 Bit datas detailed description of register chapters and sections (specifically referring to) of AD HOC, decide the gold code of selection, or, for GLONASS coding, low to GPS_NGLON position;
Mixer has comprised carrier wave numerically-controlled oscillator, and oscillator is by MCLK signal driver, thereby being used for synchronous local digital oscillator mixes down to baseband frequency input signal.Oscillator frequency must be adjustable to adapt to Doppler shift and reference frequency error;
Correlator is done position the copy coding of the baseband I/Q signal from carrier wave mixer and local generation and is multiplied each other, and obtains two different correlated results.Correlated results is sent to " cumulative sum abandons " memory module and integrates;
Advanced peripheral bus interface is the read-write that register is register the signal decoding from advanced peripheral bus.
The method also comprises:
FAP (PRESETn) read-write that to be reset AMBA advanced peripheral bus interface be register is register the signal decoding from advanced peripheral bus of can resetting by APB, if PRESETn is set low, the logic that FAP is all and state can be reset to their raw value, if do not have APB to reset, once user is forbidden FAP, the all states of FAP all can change into the free time so, and the control register of FAP can not reset along with the forbidding of FAP;
Carry out signal capture, carrier frequency and encoding phase need searched until signal to be detected, the maximum offset of carrier frequency based on standard value is that maximum Doppler shift adds maximum receiver clock error, maximum code phase bias determines (fixing) by code length, all possible encoding phase on a frequency grid all can be searched, if signal is not hunted down, search operation enters next frequency grid so;
Following register:
CARRIER_DCO_INCR
Be programmed successively with relevant data based searched initial frequency grid; Carrier wave numerically-controlled oscillator is programmed in after FAP is released (being activated) and comes into force, if FAP is activated, CARRIER_DCO_INCR write operation comes into force immediately;
Following register:
CODE_DCO_INCR
Be programmed successively with relevant data based standard code frequency, carrier wave numerically-controlled oscillator is programmed in after FE is released (being activated) and comes into force, if FE is activated, CODE_DCO_INCR write operation comes into force immediately;
To each satellite, start search step as follows:
1. SOURCESEL register-bit is set and selects input signal source,
2. pair CNTR register programming arranges searching carrier number of squares, synchronous cumulative number, and asynchronous cumulative number,
3. pair THR register programming arranges lock-on signal intensity,
4. pair CNTCTRL register programming arranges number of steps, relevant and noncoherent accumulation number,
5. G2_LOAD position is set is that GPS selects to need PRN code or GL_NGPS position is set to the programming of pair SATCNTL register is that GLONASS selects coding.START position is set,
Catch operation and only can after TIC front end arrives, just can add up to correlated results,
After satellite acquisition EO, (the READY position of STATUS register is set, INT signal is set), if the OK position of STATUS register is 1, those 11 Least Significant Bit units announce that phase encoding finds signal, ensuing 12 bits announce that carrier wave grid finds signal, and at POWER register, you can read the intensity of the signal searching.
Realizing Rapid search engine of the present invention is: comprising: clock generator, control register, analog to digital converter multiplexer switch, code generator, mixer, correlator, advanced peripheral bus interface, wherein code generator is connected with clock generator with analog to digital converter multiplexer switch respectively through correlator, mixer, control register is connected with analog to digital converter multiplexer switch with clock generator respectively, and advanced peripheral bus interface is connected with control register, mixer, correlator, code generator respectively.
The beneficial effect that the present invention has: adopt clock generator, control register, analog to digital converter multiplexer switch, code generator, mixer, correlator, advanced peripheral bus interface mode, realized a receiver and can receive GPS and GLONASS multi-channel signal simultaneously.
Accompanying drawing explanation
Fig. 1 is signal connection layout of the present invention.
Fig. 2 is system principle structured flowchart of the present invention.
Bilingual: CLOCK GENERATOR (clock generator), CONTROL REGISTER (control register), ADDRESS DECODER (address decoder), APB BUS INTERFACE APB (bus interface), ADC MUX (ADC MUX), MIXER (frequency mixer), CORRELATOR (correlator), CODE GENERATOR (code generator), REGISTER SELECTS (register selection signal), 32-BIT BUS32 (position bus signals), CONTROL (control signal), MULTIPHASE CLOCKS (multi-phase clock signal), signal: all the other add " signal " two words after english abbreviation.
Fig. 3 is the plain engine data stream of searching fast of the present invention.
Fig. 4 is application principle figure of the present invention.
Bilingual: CLOCK GENERATOR (clock generator), CONTROL REGISTER (control register), ADDRESS DECODER (address decoder), BUS INTERFACE bus interface, STATUS REGISTERS status register, TIME BASE GENERATOR time-base generator, TRACKING MODULE CHANNEL1 tracking module passage 1, REGISTER SELECTS (register selection signal), 32-BIT BUS32 (position bus signals), CONTROL (control signal), MULTIPHASE CLOCKS (multi-phase clock signal), SYSTEM STATUS BITS system state position signal, signal: all the other add " signal " two words after english abbreviation.
Fig. 5 is storer 1 block diagram of the present invention.
Fig. 6 is storer 2 block diagrams of the present invention.
Fig. 7 is storer 3 block diagrams of the present invention.
Fig. 8 is storer 4 block diagrams of the present invention.
Embodiment
Below in conjunction with accompanying drawing, the invention will be further described:
Feature
Meet AMBA 2.0APB standard
Fast search GPS C/A coding
Fast search GLONASS satellite
N2046 time shaft sampling provides the resolution of 1/2
Adjustment Doppler frequency able to programme
The coherent integration time: 1-32
The non-coherent integration time: 1-32
Up to 16 front end inputs
Running produces look-at-me when operation completes voluntarily
Application
Ingredient fast search satellite-signal as AVM2048IP
Pin is described
Table 1. pin is described (as shown in Figure 1)
Functional description (FUNCTIONAL DESCRIPTION)
ZVM2048IP_03 is a part for the correlator of 60 channels.This correlator is used to catch GPS C/A coding or GLONASS signal.
ZVM2048IP has also comprised 60 channel GNSS correlators
Frequency analysis and the signal integration of search engine piece executive signal acquisition phase
ZVM2048IP comprises independently numeral and is downconverted to baseband functions, and independently numerical frequency is converted to arrowband function, and GPS C/A coding and GLONASS coding produce function, correlator and ' cumulative sum abandons ' storer
The ZVM2048IP_03 has 32-bits APB AMBA-2.0 interface.
Quick engine (FAP)
Figure .2 has shown the structural drawing of a FAP. it has comprised following module
Receiver control module
Clock generator (Clock Generator)
Clock generator is inputted and is carried out frequency division to obtain the internal clock signal group of leggy MCLK.
Control register (Control register)
Control register comprises inhomogeneous bit and controls analog to digital converter multiplexer switch (ADC multiplexe), clock generator (Clock generator) and mixer (Mixe)
Analog to digital converter multiplexer switch (ADC multiplexer)
Analog to digital converter multiplexer switch is programmable, there are two kinds of mode of operations: the binary data of 16 (multiplexing modes), the quaternary data of 8 (2 take advantage of 2 complicated multiplexing modes). under binary data pattern, analog to digital converter is supported the input of three kinds of forms: without symbol scale-of-two, symbol and value, or two's complement
Input analog-to-digital converter multiplexer switch can be configured to two cell multiplexing input (16 inputting channel) or binary complex signal I & Q (8 inputting channel)
Data representation frequency is the bandpass signal to 19MHz at 1MHz, and this signal is sampled by the sample frequency with 40MHz, thereby raising frequency is to 21MHz to 39MHz
Code generator (Code generator)
C/A code generator is gps satellite, ground transmitter (pseudo satellite, pseudolite), and global mobile satellite network (INMARSAT-GIC) satellite or GLONASS satellite generate selected gold code.By CNTL register being write to 10 Bit datas detailed description of register chapters and sections (specifically referring to) of AD HOC, decide the gold code of selection, or, for GLONASS coding, low to GPS_NGLON position.
Mixer (Mixer)
Mixer has comprised carrier wave numerically-controlled oscillator, and oscillator is by MCLK signal driver, thereby being used for synchronous local digital oscillator mixes down to baseband frequency input signal.Oscillator frequency must be adjustable to adapt to Doppler shift and reference frequency error.
Correlator (Correlator)
Correlator is done position the copy coding of the baseband I/Q signal from carrier wave mixer and local generation and is multiplied each other, and obtains two different correlated results.Correlated results is sent to " cumulative sum abandons " memory module and integrates.
Advanced peripheral bus interface (APB Bus interface)
Advanced peripheral bus interface is the read-write that register is register the signal decoding from advanced peripheral bus
Rapid search engine (FE) operation
FE resets
FE (PRESETn) read-write that to be reset AMBA advanced peripheral bus interface be register is register the signal decoding from advanced peripheral bus of can resetting by APB.If PRESETn is set low, the logic that FE is all and state can be reset to their raw value.If do not have APB to reset, once user is forbidden FE, all states of FE all can change into idle so.The control register of FE can not reset along with the forbidding of FE.
Search operation
Carry out signal capture, carrier frequency and encoding phase need searched until signal to be detected.The maximum offset of carrier frequency based on standard value is that maximum Doppler shift adds maximum receiver clock error.Maximum code phase bias determines (fixing) by code length.All possible encoding phase on a frequency grid all can be searched, if signal is not hunted down,
Search operation enters next frequency grid so.
The programming of carrier wave numerically-controlled oscillator
Following register:
CARRIER_DCO_INCR and relevant data based searched initial frequency grid are programmed successively.Carrier wave numerically-controlled oscillator is programmed in after FE is released (being activated) and comes into force.If FE is activated, CARRIER_DCO_INCR write operation comes into force immediately.
Coded digital is controlled oscillator programming
Following register:
CODE_DCO_INCR and relevant data based standard code frequency are programmed successively.Carrier wave numerically-controlled oscillator is programmed in after FE is released (being activated) and comes into force.If FE is activated, CODE_DCO_INCR write operation comes into force immediately.Start
Search step
To each satellite, start search step as follows:
1. SOURCESEL register-bit is set and selects input signal source
2. pair CNTR register programming arranges searching carrier number of squares, synchronous cumulative number, asynchronous cumulative number
3. pair THR register programming arranges lock-on signal intensity
4. pair CNTCTRL register programming arranges number of steps, relevant and noncoherent accumulation number
5.. to SATCNTL register programming, G2_LOAD position is set is that GPS selects to need PRN code or GL_NGPS position is set is that GLONASS selects coding.START position is set.
Catch operation only can just can add up to correlated results after TIC front end arrives.
After satellite acquisition EO, (the READY position of STATUS register is set, INT signal is set), if the OK position of STATUS register is 1, those 11 Least Significant Bit units announce that phase encoding finds signal, and ensuing 12 bits announce that carrier wave grid finds signal.At POWER register, you can read the intensity of the signal searching.
Register is described in detail
The list of table 2. register
CARR_DCO
(writing address)
Bits 29 to 0: (phase increment .30-bit increment numerical value is applicable to 30-bit totalizer numeral and controls oscillator carrier wave numerically-controlled oscillator
The Least Significant Bit unit of INCR register is expressed as follows the stepping amount drawing:
The ÷ 2^30=372529mHz of minimum step frequency=(40MHz)
Output frequency=CARRIER_DCO* (min.step frequency)
SIG_SEL
(writing address)
Bit 30 to 28: select analog to digital converter inputted search 4bit-31:28,27:24
Bit 27: select analog to digital converter inputted search I input 2bit-I or Q
Bit 26: select analog to digital converter inputted search Q input 2bit-Q or I
Bit 25: reversion I and Q input most significant bit unit-I[1] and Q[1]
Bit 24: I and Q input SIG, MAGN transfers ADC to
Bit 18 to 0: test is controlled
CODE_DCO
(writing address)
Bits 23 to 0: coded digital is controlled oscillator phase increment
24-bi increment numerical value is applicable to 25-bit totalizer numeral and controls oscillator because the increment in most significant bit unit always the Least Significant Bit unit of 0INCR register be expressed as follows the stepping amount drawing:
Minimum step frequency=(40MHz ÷ 7) ÷ 225=170.29898mHz
Output frequency=CHx_CARRIER_DCO_INCR* (min.step frequency)
Attention: coded digital is controlled oscillator drives code generator to provide half stepping period of chip period, so oscillator must be programmed to reach the twice of chip-rate.The resolution that this means chip-rate wants to reach 8514949mHz
CDCO_THR
(writing address)
The Least Significant Bit unit of INCR register is expressed as follows the stepping amount drawing:
The ÷ 2^30=372529mHz of minimum step frequency=(40MHz)
Output frequency=DCARRIER_DCO*2^16=2441.4Hz.
Bits 15 to 0: signal threshold
SATCNTL (writing address)
Table 3
The PSP_DOPP bits-is the digital control oscillator phase incremental step of carrier wave equally, but each step of this numerical value all can be added to CODE_DCO.
The START_RESET bit-stops current operation at 0 o'clock at once, and replacement FE, otherwise writes 1, starts each operation.
The GL_NGPS bit selects copy coding kind: the 0-GLONASS that will generate, one-GPS
G2_LOAD (9 to 0), bits 9 to 0:C/A codes selection functions: SATCNTL register can be programmed to code generator, are that approximate start-up mode generates desired GPS or INMARSAT-GIC encodes by G2 is set.Register can be programmed at any time.
The pattern loading is second bits of coded place buffer status constantly.Following table has been listed the needed numerical value of PRN pattern of selecting 37 gps satellites or 8 INMARSAT-GIC satellites.
If what G2 was written into is all 0, it can enter an illegal state of only making bit test, and the coding of G1 generator can be considered output
The G2_LOAD that table 4. satellite reception requires arranges
Attention:
_ PRN sequence 33 to 37 is that (such as ground transmitter-' pseudo satellite, pseudolite ' ') _ C/A coding 34 and 37 that is left to that non-satellite situation used equates.
(the complete channel of GPS) used.
_ PRN sequence 120 to 138 is left to Wide Area Augmentation System (WAAS).
_ PRN sequence 201 to 211 is left to INMARSAT GIC
SATCNTL
(writing address)
Table 5
The SYNC_NONCOH bits arranges the non-coherent integration length in search engine.The numerical value that writes register should be less by one than actual value, and such as 0 corresponding integration circulation, the rest may be inferred.After having calculated the approximate absolute value obtaining after carrying out coherent integration to the received signal, search engine can carry out non-coherent integration to the received signal.The meaning of non-coherent integration is that the complex signal receiving is not consider phase information when doing integration.
Non-coherent integration time from the coherent integration interval time is multiplied by an integer and obtains.
The approximated absolute values of the signal receiving is obtained by following formula: abs (n)=| Icoh (n) |+| Qcoh (n) |
Search engine remakes coherent integration after relevant the signal that receives and reference signal being carried out to Hu.The meaning of coherent integration is that I and Q composition are difference integrations.Be that the integer of GPS C/A coding or GLONASS code length is long-pending integral time.GPS information data length is 20 to be multiplied by code length (20ms), and the code length of GLONASS is 10ms.This will take into account when the coherent integration time is set, because the mean value of data bit element is 0
That The SYNC_SYNC_NSTEPS bits arranges is the frequency number of squares s+1 of search
The total mark time of search engine is calculated by equation below:
Tinteg＝((SYNC_COH+1)*(SYNC_NONCOH+1))*
1023/Fcode
Calculated the working time that search engine is once searched for by equation below:
Toper＝Tinteg*(SYNC_NSTEPS+1)+1023/Fcode
Because will be written into new coding and coding is brushed to the operation (expending a coding duration) into engine before starting real operation, reasonably 1023/Fcode time proximity is 1ms.
STATUS
(reading address)
Table 6
The READY bit search processing finish or FE be reset after by assignment
The shift value of the frequency grid at The NUM_BIN bits-maximum correlation place
The OK bit is found rear by assignment at signal
The CODE_PHASE bits represent the signal that finds coding take the phase value that subluxation is unit
POWER
(reading address)
The maximal value of the correlated results of Bits 31 to 0 storage non-coherent integrations.
Claims (5)
1. GPS and a GLONASS multimode channel search method, is characterized in that comprising:
Clock generator is inputted and is carried out frequency division to obtain the internal clock signal group of leggy MCLK;
Control register comprises inhomogeneous bit and controls analog to digital converter multiplexer switch (ADC multiplexer), clock generator (Clock generator) and mixer (Mixer);
Analog to digital converter multiplexer switch is programmable, there are two kinds of mode of operations: the binary data multiplexing modes of 16, the quaternary data 2 of 8 are taken advantage of 2 complicated multiplexing modes, under binary data pattern, analog to digital converter is supported the input of three kinds of forms: without symbol scale-of-two, symbol and value, or two's complement input analog-to-digital converter multiplexer switch can be configured to two cell multiplexings and input 16 inputting channels or binary complex signal I & Q8 inputting channel, data representation frequency is the bandpass signal to 19MHz at 1MHz, this signal is sampled by the sample frequency with 40MHz, thereby raising frequency is to 21MHz to 39MHz,
C/A code generator is gps satellite, ground transmitter pseudo satellite, pseudolite, whole world mobile satellite network (INMARSAT-GIC) satellite or GLONASS satellite generate selected gold code, by CNTL register being write to 10 Bit datas of AD HOC, decide the gold code of selection, or, for GLONASS coding, low to GPS NGLON position;
Mixer has comprised carrier wave numerically-controlled oscillator, and oscillator is by MCLK signal driver, thereby being used for synchronous local digital oscillator mixes down to baseband frequency input signal, and oscillator frequency must be adjustable to adapt to Doppler shift and reference frequency error;
Correlator is done position the copy coding of the baseband I/Q signal from carrier wave mixer and local generation and is multiplied each other, and obtains two different correlated results, and correlated results is sent to " cumulative sum abandons " memory module and integrates;
Advanced peripheral bus interface is the read-write that register is register the signal decoding from advanced peripheral bus.
2. GPS as claimed in claim 1 and GLONASS multimode channel search method, is characterized in that also comprising:
FAP (PRESETn) read-write that to be reset AMBA advanced peripheral bus interface be register is register the signal decoding from advanced peripheral bus of can resetting by APB, if PRESETn is set low, the logic that FAP is all and state can be reset to their raw value, if do not have APB to reset, once user is forbidden FAP, the all states of FAP all can change into the free time so, and the control register of FAP can not reset along with the forbidding of FAP;
Carry out signal capture, carrier frequency and encoding phase need searched until signal to be detected, the maximum offset of carrier frequency based on standard value is that maximum Doppler shift adds maximum receiver clock error, maximum code phase bias is determined by code length, all possible encoding phase on a frequency grid all can be searched, if signal is not hunted down, search operation enters next frequency grid so;
Following register:
CARRIER?DCO?INCR
Be programmed successively with relevant data based searched initial frequency grid; Carrier wave numerically-controlled oscillator is programmed in after FAP is released and comes into force, if FAP is activated, CARRIER DCO INCR write operation comes into force immediately;
Following register:
CODE?DCO?INCR
Be programmed successively with relevant data based standard code frequency, carrier wave numerically-controlled oscillator is programmed in after FAP is released and comes into force, if FAP is activated, CODE DCO INCR write operation comes into force immediately;
To each satellite, start search step as follows:
1. SOURCESEL register-bit is set and selects input signal source,
2. pair CNTR register programming arranges searching carrier number of squares, synchronous cumulative number, and asynchronous cumulative number,
3. pair THR register programming arranges lock-on signal intensity,
4. pair CNTCTRL register programming arranges number of steps, relevant and noncoherent accumulation number,
5. G2LOAD position is set is that GPS selects to need PRN code or GL NGPS position is set to the programming of pair SATCNTL register is that GLONASS selects coding, and START position is set,
Catch operation and only can after TIC front end arrives, just can add up to correlated results,
After satellite acquisition EO, the READY position of STATUS register is set, INT signal is set, if the OK position of STATUS register is 1, those 11 Least Significant Bit units announce that phase encoding finds signal, ensuing 12 bits announce that carrier wave grid finds signal, and at POWER register, you can read the intensity of the signal searching.
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| CN104471440B (en) * | 2012-02-23 | 2016-08-24 | 康奈尔大学 | Low-power asynchronous GPS BBP |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5923287A (en) * | 1997-04-01 | 1999-07-13 | Trimble Navigation Limited | Combined GPS/GLONASS satellite positioning system receiver |
| CN101198160A (en) * | 2007-05-25 | 2008-06-11 | 北京大学 | Method and device for implementing GNSS multi-module parallelism receiving at front end by using single path radio frequency |
| CN101447822A (en) * | 2007-11-30 | 2009-06-03 | 联发科技股份有限公司 | A method for receiving a first signal channel and a second signal channel from a satellite and receiver thereof |
| CN202102114U (en) * | 2010-05-31 | 2012-01-04 | 北京联星科通微电子技术有限公司 | Rapid search engine of GPS and GLONASS multimode satellite navigation (GNSS) receiver |
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| US7460615B2 (en) * | 2005-04-12 | 2008-12-02 | Novatel, Inc. | Spatial and time multiplexing of multi-band signals |
| WO2007068661A1 (en) * | 2005-12-16 | 2007-06-21 | Nemerix Sa | Signal processor and signal processing method |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5923287A (en) * | 1997-04-01 | 1999-07-13 | Trimble Navigation Limited | Combined GPS/GLONASS satellite positioning system receiver |
| CN101198160A (en) * | 2007-05-25 | 2008-06-11 | 北京大学 | Method and device for implementing GNSS multi-module parallelism receiving at front end by using single path radio frequency |
| CN101447822A (en) * | 2007-11-30 | 2009-06-03 | 联发科技股份有限公司 | A method for receiving a first signal channel and a second signal channel from a satellite and receiver thereof |
| CN202102114U (en) * | 2010-05-31 | 2012-01-04 | 北京联星科通微电子技术有限公司 | Rapid search engine of GPS and GLONASS multimode satellite navigation (GNSS) receiver |
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