CN102347859B

CN102347859B - Link rapidly recovering method and device

Info

Publication number: CN102347859B
Application number: CN 201110288489
Authority: CN
Inventors: 张楠; 祁正林; 刘刀桂; 文闻
Original assignee: Hangzhou H3C Technologies Co Ltd
Current assignee: New H3C Information Technologies Co Ltd
Priority date: 2011-09-26
Filing date: 2011-09-26
Publication date: 2013-04-10
Anticipated expiration: 2031-09-26
Also published as: CN102347859A

Abstract

The invention provides a link rapidly recovering method and device. The method comprises the following steps of: A, after ensuring that each port of a link is usable in a physical state, starting a logic state conversion timer at a port of the end, and sending an informing message for triggering logic state conversion to the port of the opposite end; B, detecting whether the port of the end receives a verifying message about the informing message, send by the port of the opposite end, if so, executing a step E, and otherwise, executing a step C; C, detecting whether the port of the end receives the verifying message for triggering logic state conversion, send by the port of the opposite end, if so, sending the verifying message about the informing message to the port of the opposite end and executing the step E, and otherwise, executing a step D; D, checking whether the logic state conversion timer at the port of the end is timeout, if so, sending the informing message for triggering logic state conversion to the port of the opposite end again, restarting the logic state conversion timer and returning to the step B, and otherwise, returning to the step B; and E, closing the logic state conversion timer at the port of the end, triggering an upper layer to convert the logic state of the port of the end to a usable logic state.

Description

Method and device for quickly recovering link

Technical Field

The present invention relates to network communication technologies, and in particular, to a method and an apparatus for quickly recovering a link.

Background

The ethernet port has two physical connection states: available and not available (DOWN). An ethernet physical link (hereinafter referred to as link) is restored to be connected, and physical states of ports at two ends of the link need to be available through physical layer negotiation.

However, the link restoration connectivity does not depend on whether the physical states of the ports at both ends of the link are available, but also depends on whether the logical states of the ports at both ends of the link, such as the STP states of the ports, the aggregation member states, and the like, are available. When the physical state of the port becomes available, LINK UP is reported to the upper layer protocol module immediately so as to trigger the upper layer protocol module to switch the logic state of the port into the logic state available. When the logic states of the ports at the two ends of the link become available, the link is indicated to be connected again, and the link can be used for data forwarding.

It can be seen that the process of restoring connectivity of a link is a process in which the logical states of the ports at both ends of the link become available, and the difference between the times when the logical states of the ports become available is the time of restoring the ethernet physical link. In practical application, the time difference for the two end ports of the link to become available is not easy to determine, and the link can not be recovered quickly.

Disclosure of Invention

The invention provides a method and a device for quickly recovering a link, which are used for quickly recovering the link.

The technical scheme provided by the invention comprises the following steps:

a method of quickly recovering a link, comprising:

a, after each port on the link is available in its physical state, starting a logic state switching timer corresponding to the port of the local end, and detecting whether the port of the local end receives a message for triggering logic state switching sent by the port of the opposite end, if not, executing step B, and if so, executing step C;

b, checking whether the logic state switching timer started by the port of the local terminal is overtime, if so, sending a message for triggering logic state switching to the port of the opposite terminal, and executing the step C;

and C, closing the opened logic state switching timer of the port of the local end, and triggering an upper layer to switch the logic state of the port of the local end into a logic state available.

An apparatus for rapidly recovering a link, the apparatus being applied to a port on the link, comprising: the device comprises a processing unit, a checking unit and a triggering unit; wherein,

the processing unit is used for starting a logic state switching timer corresponding to the local port after the available physical state of the local port is available, and detecting whether the local port receives a message which is sent by the opposite port and used for triggering logic state switching;

the checking unit is used for checking whether the logic state switching timer started by the port of the local terminal is overtime or not when the detection result of the processing unit is negative, and if yes, sending a message for triggering logic state switching to the port of the opposite terminal and sending a triggering notification to the triggering unit;

and the triggering unit is used for closing the started logic state switching timer of the local port and triggering an upper layer to switch the logic state of the local port into a logic state for use when the detection result of the processing unit is yes or the triggering notification is received.

A method of quickly recovering a link, comprising:

a, after each port on a link has an available physical state, starting a logic state switching timer corresponding to a port at the local end, and sending a notification message for triggering logic state switching to a port at the opposite end;

b, detecting whether the local terminal port receives a confirmation message aiming at the notification message sent by the opposite terminal port, if so, executing the step E, and if not, executing the step C;

c, detecting whether the local terminal port receives a notification message which is sent by the opposite terminal port and used for triggering logic state switching, if so, sending a confirmation message aiming at the notification message to the opposite terminal port, and executing the step E; if not, executing the step D;

d, checking whether the logic state switching timer started by the port of the local terminal is overtime, if so, sending the notification message for triggering the logic state switching to the port of the opposite terminal again, restarting the logic state switching timer, returning to the step B, and otherwise, directly returning to the step B;

and E, closing the opened logic state switching timer of the port of the local end, and triggering an upper layer to switch the logic state of the port of the local end into a logic state which can be used.

An apparatus for rapidly recovering a link, the apparatus being applied to a port on the link, comprising: the device comprises a processing unit, a first detection unit, a second detection unit, a checking unit and a triggering unit; wherein,

the processing unit is used for starting a logic state switching timer corresponding to the local port after the available physical state of the local port and sending a notification message for triggering logic state switching to the opposite port;

the first detection unit is used for detecting whether the local port receives a confirmation message aiming at the notification message sent by the opposite port;

the second detection unit is used for detecting whether the local port receives a notification message which is sent by the opposite port and used for triggering logic state switching when the detection result of the first detection unit is negative, if so, sending a confirmation message aiming at the notification message to the opposite port and sending a triggering notification to the triggering unit, and if not, sending a checking notification to the checking unit;

the checking unit is used for checking whether the logic state switching timer started by the local terminal port is overtime, if so, the notification message is sent to the opposite terminal port again, the logic state switching timer is restarted, and the first detecting unit is triggered to execute the detection operation, otherwise, the first detecting unit is directly triggered to execute the detection operation;

the trigger unit is configured to receive the trigger notification, or when the detection result of the first detection unit is yes, close the logic state switching timer that is already started in the home port, and trigger an upper layer to switch the logic state of the home port to a logic state that is available. .

It can be seen from the above technical solutions that, in the present invention, after a port of a link becomes available in a physical state, instead of reporting to an upper layer protocol module immediately to trigger the upper layer protocol module to switch a logical state of a local port to a logical state, it waits for a message sent by an opposite end or a logical state switching timer started by itself to time out to report to the upper layer protocol module to trigger the upper layer protocol module to switch the logical state of the local port to the logical state to be available, but according to the above technical solutions, it can be known that a port sends a message such as a notification message, a confirmation message, etc. to the opposite end port, indicating that the physical state of the port has become available, and a port receives a message such as a notification message, a confirmation message, etc. sent by the opposite end port after the physical state becomes available, then the upper layer protocol module is triggered to switch the logical state of the local port to the logical state to be available, therefore, the invention can be obtained that the upper layer protocol module is triggered to switch the logic state of the port of the local end into the logic state available within the time when the physical state of the ports of the two ends becomes available, compared with the prior art, the time difference of the logic UP of the ports of the two ends is obviously shortened, and the aim of rapidly recovering the link is realized.

Drawings

FIG. 1 illustrates a LINK UP DELAY functional implementation diagram;

FIG. 2 is a flow chart provided in example 1 of the present invention;

fig. 3 is a schematic diagram of an info packet in embodiment 1 of the present invention;

fig. 4 to 7 are schematic diagrams of scenarios 1 to 4 in embodiment 1 of the present invention;

FIG. 8 is a flowchart provided in embodiment 2 of the present invention;

fig. 9 is a schematic diagram of an info message and an ack message in embodiment 2 of the present invention;

fig. 10 to 12 are schematic diagrams of scenarios 1 to 3 in embodiment 2 of the present invention;

FIG. 13 is a block diagram of an apparatus according to an embodiment of the present invention;

fig. 14 is a structural diagram of another apparatus according to an embodiment of the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be described in detail with reference to the accompanying drawings and specific embodiments.

Since the process of restoring the connection of one link is a process in which the logical states of the ports at both ends of the link are both available (for convenience of description, the logical states are both available and are simply referred to as logical UPs), that is, the time difference between the logical UPs of the two ports is the time for restoring the physical link of the ethernet, and the shorter this time difference is, the better the performance for restoring the physical link of the ethernet is, the lower the packet loss rate in the switching process is. Therefore, shortening the time difference between the logical UPs of the two ports of the ethernet physical link is the key to improve the performance of the ethernet physical link.

The LINK UP DELAY function, which is widely used to shorten the time difference between logical UPs of two ports of a LINK, refers to delaying triggering of a logical UP after the physical state of a port becomes available (for convenience of description, the physical state is hereinafter available in the form of physical UP) and the time of the DELAY can be configured through a command line. Based on this, LINK UP DELAY functions need to be configured at two ports of the LINK, and the time difference of the logical UP of the two ports is shortened by adjusting the time for triggering the logical UP of the two ports, so as to achieve the purpose of rapidly recovering the LINK, which is analyzed by using fig. 1 as follows:

as shown in fig. 1, assuming that the port A, B is a port at both ends of a link, if the port a is a port of the physical UP first, the time difference Δ T between the logical UP of the port a and the port B is Δ T_logicComprises the following steps:

ΔT_logic＝T_{logic_b}-T_{logic_a}

＝T_{phy_b}+t_{delay_b}-(T_{phy_a}+t_{delay_a})

＝(T_{phy_b}-T_{phy_a})+t_{delay_b}-t_{delay_a}

＝ΔT_phy+t_{delay_b}-t_{delay_a}(formula 1)

Wherein, T_{logic_b}For the time point of logical UP of port B, T_{logic_a}For the time point of logical UP of port A, T_{phy_b}Is the point in time, t, of port B physical UP_{delay_b}LINK UP DELAY time, T, set for Port B to DELAY triggering of logic UP_{phy_a}Is the point in time, t, of port A physical UP_{delay_a}LINK UP DELAY time, Δ T, set for Port A to DELAY triggering of logic UP_phyIs the time difference between port a and port B physical UPs.

As can be seen from equation 1 above, let Δ T_logicReducing to 0 ensures that the time difference between port A and port B logical UP is minimal, achieving synchronization, based on which t_{delay_a}、t_{delay_b}、ΔT_phyThe three satisfy the following conditions:

t_{delay_a}-t_{delay_b}＝ΔT_phy. (formula 2)

Simply, to synchronize the logical UP of Port A and Port B, the LINK UPDELAY function, i.e., configuration T, can be configured only at Port A_{phy_a}Since the port B is not equipped with the LINK UP DELAY function, t is as described above_{delay_b}Is equal to 0, based on the above equation 2, it can be obtained when t_{delay_a}＝ΔT_phyIn time, the logical UPs of port a and port B are synchronized as: the port A of the physical UP waits for the opposite end, namely the port B physical UP, and then triggers the logic UP, and the port B triggers the logic UP immediately after the physical UP, so that the logic UP of the port A and the port B can be ensured to be synchronous, and the aim of quickly recovering a link is fulfilled.

In summary, it can be seen that a fast recovery LINK can be realized by configuring the LINK UP DELAY function at the LINK port. However, it needs to know in advance the port of the first physical UP of the two ports of the link and the time difference of the physical UP of the two ports. In practical application, the ports at two ends of the link have various differences, the factors for triggering link recovery are different, which port is the physical UP first is difficult to determine, and the time difference of the physical UPs of the ports at two ends is inconvenient for accurate measurement and inaccurate for estimation.

Therefore, the present invention also provides a scheme that the port of the first physical UP in the ports at the two ends of the link and the time difference of the physical UPs of the ports at the two ends do not need to be known in advance, but the link can be quickly recovered, which is described below by

embodiments

1 and 2, respectively:

example 1:

in the prior art, after a port of a link is physically UP, the port immediately reports to an upper layer protocol module to trigger the upper layer protocol module to switch a logic state of the port to a logic UP, whereas in embodiment 1, the port of the first physical UP in the ports at both ends of the link is controlled to delay and trigger the logic UP, that is, the port of the first physical UP waits for the port of the second physical UP, so that a time difference of triggering the logic UP by the two ports can be shortened, and a purpose of rapidly recovering the link can be achieved. The specific implementation of this embodiment 1 may include the flow shown in fig. 2:

referring to fig. 2, fig. 2 is a flowchart provided in embodiment 1 of the present invention. As shown in fig. 2, the process may include the following steps:

in step 201, when a port (denoted as port a) of a LINK is in a physical UP state, a logic state switching timer (LINK UP timer for short) corresponding to the port is started.

In this embodiment, the LINK UP timer corresponding to the port a may be set in the port a, or may be independent of the port a, and the present invention is not limited in particular.

In step 202, port a detects whether it receives a message (referred to as info message for short) sent by an opposite port (i.e. a port on an opposite device connected to a link and denoted as port B) for triggering logic state switching, if so, step 205 is executed, otherwise, step 203 is executed.

In this embodiment 1, an info packet is an interactive packet on a direct link and is terminated at a receiving port. The info packet may be a redefined packet in this embodiment 1, or may be obtained by modifying a packet defined by an existing protocol. In fig. 3, the DMAC field adopts a broadcast MAC address, the SMAC field is an MAC address of a port that sends the info packet, the Type field can identify the redefined packet, and a value can be 0X 9909. Of course, as an extension, the redefined info packet may also adopt a format different from that of fig. 3, and the present invention is not particularly limited.

In step 203, the port a checks whether the LINK UP timer started by itself is overtime, if yes, step 204 is executed, otherwise, the step 202 is returned to.

In step 203, the period t of the LINK UP timer may be a value of millisecond, and may be set based on the analysis of the four scenarios in embodiment 1 described below.

In step 204, port A sends an info message to port B. Step 205 is then performed.

Step 205, the port a closes the opened LINK UP timer, and reports the LINK UP to the upper layer protocol module, so as to trigger the upper layer protocol module to switch the logic state of the port a to the logic UP.

When the logical states of the ports at the two ends of the link, namely the port A and the port B, are both logical UP, the link can be recovered and can be normally used for data transmission.

Thus, the description of fig. 2 is completed. As can be seen from the process shown in fig. 2, after a port of a LINK is in physical UP, instead of reporting LINK UP to an upper layer protocol module immediately to trigger logical UP, the LINK UP is reported to the upper layer protocol module to trigger logical UP until an info message sent by an opposite end or a LINK UP timer started by the port expires, but according to the process shown in fig. 2, it can be known that, when an info message is sent by a port, the port indicates that the port is in physical UP, and when an info message sent by an opposite end port is received by a port at the physical UP, an upper layer protocol module is triggered to switch a logical state of the port to logical UP.

The flow shown in fig. 2 is analyzed in detail by the following four scenarios:

because the physical UPs times of the ports at the two ends of a LINK are not completely the same, and there may exist a sequence, the ports at the two ends are assumed to be ports a and B, where the time point of the physical UP of the port a is Tphy _ a, and the time point of reporting LINK UP by the port a (because the port reports LINK UP to the upper layer protocol module and the upper layer protocol module switches the logical state of the port to logical UP almost synchronously, the time point of reporting LINK UP may be simply referred to as the time point of logical UP) is T_{logic_a}The time point of the physical UP of the port B is T_{phy_b}The time point of the logical UP of the port B is T_{logic_b}，ΔT_phyFor the time difference of the two-port physical UP, i.e. the time interval, Δ T_phy＝T_{phy_b}-T_{phy_a}，ΔT_logicFor the logical UP time difference, Delta T, of the ports at both ends of the link_logic＝T_{logic_b}-T_{logic_a}. In addition, based on the description in fig. 2, it can be known that the ports at the two ends in the LINK need to start their corresponding LINK UP timers after physical UP, in this embodiment 1, the periods of the LINK UP timers started by the ports at the two ends may be the same or different, and for the sake of simple description, the following scenarios all use the same period of the LINK UP timers started by the ports at the two ends, which are all t as an example. Also, as can be known from the description of fig. 2, when the LINK UP timer expires, a port of the LINK needs to send an info packet to the opposite end, where the transmission time of the info packet depends on the length of the info packet. When the ports at the two ends of the link send info messages with the same length, the transmission time of the info messages should be the same, and this embodiment 1 takes the case that the lengths of the info messages sent by the ports at the two ends of the link are the same, that is, the transmission time of the info messages sent by the ports at the two ends is the same, and both the transmission time and the transmission time are Δ T_tx。

Based on the above description, the following four scenarios are described below, respectively:

scene 1:

scenario 1 applies to Δ T_tx＜＝ΔT_phyThe case of "t" is shown in fig. 4. In this case, the port of the first physical UP assumes that port a will start its own LINK UP timer. As for the other port, if it is port B, since Δ T_tx＜＝ΔT_phyT, this means that port B must be physically UP when the timeout t of the LINK UP timer for port a to turn on has not been reached. The port B will also start its LINK UP timer after physical UP.

When the LINK UP timer on the port A is overtime, the port A closes the LINK UP timer which is opened by the port A, immediately sends an info message to an opposite end, and reports the LINK UP to an upper layer protocol module so as to trigger the upper layer protocol module to switch the logic state of the port A into logic UP, wherein the time T of the logic UP of the port A is_{logic_a}＝T_{phy_a}+ t. Due to Δ T_tx＜＝ΔT_phyT, it means that when the port B receives the info packet sent by the port a, the LINK UP timer started by the port B must not be timed out, based on the description of fig. 2, the port B will also close the LINK UP timer started by itself and report the LINK UP to the upper protocol module to trigger the upper protocol module to switch the logic state of the port B to logic UP because the port B receives the info packet, and at this time, the time T of the port B logic UP is T_{logic_b}＝T_{logic_a}+ΔT_tx。

Based on the above obtained T_{logic_a}、T_{logic_b}Then, the time difference Δ T of the two-port logical UP in scenario 1 can be obtained_logic＝T_{logic_b}-T_{logic_a}＝ΔT_tx. While the time from the average physical UP to the average logical UP (shaded in fig. 4) Δ T that both ports go through_syn＝t-ΔT_phy+ΔT_tx＜＝t。

Based on the analysis of scenario 1, it can be known that if T, Δ T are set_tx、ΔT_phyThe following conditions are satisfied: delta T_tx＜＝ΔT_phyT, then enable Δ T_logicOptimized to DeltaT_txHowever, generally, because the length of an info packet is relatively short, the time Δ T for each port to transmit the info packet is short_txAlso shorter, therefore, the time difference Δ T of logically UP the two ports_logicDecrease to Δ T_txThe purpose of quickly recovering the link can be achieved.

Scene 2:

scenario 2 applies to T > Δ T_tx＞＝ΔT_phyThe situation of (2) is specifically as shown in fig. 5. In this case, the port of the first physical UP assumes that port a will start its own LINK UP timer. As for the other port, if it is port B, since T > Δ T_tx＞＝ΔT_phyThis indicates that port B must be physically UP when the timeout t of the LINK UP timer for port a to turn on has not been reached. The port B will also start its LINK UP timer after physical UP.

When the LINK UP timer on the port A is overtime, the port A closes the LINK UP timer which is opened by the port A, immediately sends an info message to an opposite end, and reports the LINK UP to an upper layer protocol module so as to trigger the upper layer protocol module to switch the logic state of the port A into logic UP, wherein the time T of the logic UP of the port A is_{logic_a}＝T_{phy_a}+ t. And T > Δ T_tx＞＝ΔT_phyIf the LINK UP timer started by the port B before receiving the info message sent by the port a is overtime, the port B closes the LINK UP timer when the LINK UP timer started by the port B is overtime, immediately sends the info message to the opposite end, i.e., the port a, and reports the LINK UP to the upper protocol module to trigger the upper protocol module to switch the logic state of the port B to logic UP, and at this time, the time T of the port B logic UP is T_{logic_b}＝T_{phy_b}+t。

Based on the above obtained T_{logic_a}、T_{logic_b}Then, the time difference Δ T of the two-port logical UP in the present scenario 2 can be obtained_logic＝T_{logic_b}-T_{logic_a}＝ΔT_phy. While the time from the average physical UP to the average logical UP (shaded in fig. 5) Δ T that both ports go through_syn＝t。

Based on the analysis of scenario 2, it can be known that if T, Δ T are set_tx、ΔT_phyThe following conditions are satisfied: t > Δ T_tx＞＝ΔT_phyThen Δ T_logicIs equal to Δ T_phy。

Scene 3:

application of scenario 3 to T + Δ T_tx＞＝ΔT_phyThe case of > t is shown in FIG. 6. In this case, the port of the first physical UP is assumed to be port A and the LINK UP timer on its own is started, and the other port is assumed to be port B, since T + Δ T_tx＞＝ΔT_phyT, this means that the port B must be physically UP after the LINK UP timer started by the port a times out, wherein the LINK UP timer on the port B is also started after the port B is physically UP.

When the LINK UP timer on the port A is overtime, the port A closes the LINK UP timer which is opened by the port A, immediately sends an info message to an opposite end, namely the port B, and reports the LINK UP to an upper layer protocol module so as to trigger the upper layer protocol module to switch the logic state of the port A into logic UP, and at the moment, the time T of the logic UP of the port A is the time T of the logic UP of the port A_{logic_a}＝T_{phy_a}+ t. Due to T + Δ T_tx＞＝ΔT_phyIf the time T is greater than T, the port B affirms that the info message sent by the port A is received before the opened LINK UP timer is overtime, at the moment, the port B closes the opened LINK UP timer and reports LINK UP to an upper layer protocol module to trigger the upper layer protocol module to switch the logic state of the port B into logic UP, at the moment, the time T of the logic UP of the port B is the time T of the logic UP of the port B_{logic_b}＝T_{logic_a}+ΔT_tx。

Based on the above obtained T_{logic_a}、T_{logic_b}Then, the time difference Δ T of the two-port logical UP in scenario 3 can be obtained_logic＝T_{logic_b}-T_{logic_a}＝ΔT_tx. While the time from the average physical UP to the average logical UP (shaded in fig. 6) Δ T that both ports go through_syn＝t+ΔT_tx-ΔT_phy＜ΔT_tx。

Based on the analysis of scenario 3, it can be known that if T, Δ T are set_tx、ΔT_phyThe following conditions are satisfied: t + DeltaT_tx＞＝ΔT_phyIf > T, Δ T can be enabled_logicIs reduced to delta T_txSo as to achieve the purpose of quickly recovering the link.

Scene 4:

scenario 4 applies to T + Δ T_tx＜ΔT_phyThe situation of (2) is specifically as shown in fig. 7. In this case, the port of the first physical UP assumes that port a will start its own LINK UP timer. As for the other port assumed to be port B, since T + Δ T_tx＜ΔT_phyThen it means that port B is physically UP after the LINK UP timer that port a must open at port a times out. Wherein, the port B will also start its LINK UP timer after physical UP.

When the LINK UP timer on the port A is overtime, the port A closes the LINK UP timer which is opened by the port A, immediately sends an info message to an opposite end, and reports the LINK UP to an upper layer protocol module so as to trigger the upper layer protocol module to switch the logic state of the port A into logic UP, wherein the time T of the logic UP of the port A is_{logic_a}＝T_{phy_a}+ t. Due to T + Δ T_tx＜ΔT_phyIf the LINK UP timer is not started, the port B will not receive the info packet sent by the port a, and therefore, when the LINK UP timer started by the port B times out, the port B will close the LINK UP timer started by the port B and report the LINK UP to the upper protocol module, so as to trigger the upper protocol module to switch the logical state of the port B to the logical UP, and at this time, the time T of the logical UP of the port B will be T_{logic_b}＝T_{phy_b}+t。

Based on the above obtained, T_{logic_a}、T_{logic_b}Then, the time difference Δ T of the two-port logical UP in the present scenario 4 can be obtained_logic＝T_{logic_b}-T_{logic_a}＝ΔT_phy. While the two ports pass from physical UP to physical UPTime of logical UP (shaded in fig. 7) Δ T_syn＝t。

Now, the description of the four scenes in this embodiment 1 is completed.

The four scenes under embodiment 1 can cover Δ T_phy、t、ΔT_txAll cases of quantitative relationships between. However, as can be seen from the above description of the four scenarios, Δ T is obtained under different scenarios_logicHave different values, e.g., Δ T in scene 1 and scene 3_logic＝ΔT_txAnd Δ T in

scenes

2 and 4_logic＝ΔT_phyWherein, Δ T_logic＝ΔT_phyAs in the prior art, this is equivalent to no optimization of the recovery of the link. Based on this, in order to realize the effect of link fast recovery, it is necessary to define a scene, and the scene is composed of Δ T_phy、t、ΔT_txAnd (6) determining. Therefore, to ensure the effect of fast link recovery, T, Δ T need to be limited_phy、ΔT_tx. In this embodiment 1, T and Δ T in the above-mentioned scene 1 or scene 3 can be ensured_phy、ΔT_txSo as to achieve the purpose of fast link recovery.

To this end, the description of example 1 is completed, and example 2 is described below:

example 2:

the specific implementation of this embodiment 2 may include the flow shown in fig. 8:

referring to fig. 8, fig. 8 is a flowchart provided in embodiment 2 of the present invention. As shown in fig. 8, the process may include the following steps:

step 801, after a port (denoted as port a) of a LINK switches its physical state to physical UP, a notification message (info message for short) for triggering logic state switching is sent to an opposite port (i.e. a port of an opposite device connected to the LINK, denoted as port B), and a logic state switching timer (LINK UP timer for short) corresponding to the port is started.

In step 802, the port a detects whether it receives an acknowledgment message (ack message for short) sent by the port B for the info message, if so, step 806 is executed, otherwise, step 803 is executed.

The info packet and the ack packet in this embodiment 2 are interactive packets on the direct link, and terminate at the receiving port, which may be redefined in this embodiment 2, or obtained by modifying the packet defined by the existing protocol. In fig. 9, the DMAC field adopts a broadcast MAC address, the SMAC field is an MAC address of a port that sends the packet, the Type field can identify the redefined packet, the value can be 0X9909, the status field is a Type identifier of the packet, when the value is 1, the packet is an info packet, and when the value is 2, the packet is an ack packet. Of course, as an extension, the redefined message in this embodiment 2 may also adopt a format different from that of fig. 9, and the present invention is not limited in particular.

Step 803, the port a detects whether it receives the info message sent by the port B, if so, step 805 is executed, otherwise, step 804 is executed.

Step 804, the port A checks whether the opened LINK UP timer is overtime, if yes, the port A sends the info message to the port B again, and restarts the LINK UP timer corresponding to the port A, and then the step 802 is returned, otherwise, the step 802 is directly returned.

As can be seen from step 804, when the started LINK UP timer times out, the port a needs to send an info packet to the port B again, and restart the LINK UP timer corresponding to the port a, so that it can be obtained that the LINK UP timer corresponding to the port a is periodically restarted before the port a receives an acknowledgement packet returned by the port B for the info packet sent by the port a, or before the port a receives the info packet sent by the port B. This period is the timeout time (denoted as t) of the LINK UP timer. Moreover, because the port needs to send the info packet to the port B again when restarting the corresponding LINK UP timer, it can be further obtained that the port a also sends the info packet to the port B with t as a period.

Step 805 sends an ack message to port B, followed by step 806.

Step 806, the port a closes the opened LINK UP timer, and reports LINK UP to the upper protocol module to trigger the upper protocol module to switch the logic state of the port a to logic UP.

The description of fig. 8 is thus completed.

To make the flow shown in fig. 8 clearer, the flow shown in fig. 8 is described in detail by the following three scenarios:

because the physical UP time of the ports at two ends of a link is not completely the same, the physical UP time of the ports at two ends of the link may have a sequence, the ports at two ends are set as ports A and B, wherein the time point of the physical UP of the port A is T_{phy_a}The time point of the logical UP of the port A is T_{logic_a}The time point of the physical UP of the port B is T_{phy_b}The time point of the logical UP of the port B is T_{logic_b}，ΔT_phyFor the time difference of the two-port physical UP, i.e. the time interval, Δ T_phy＝T_{phy_b}-T_{phy_a}，ΔT_logicFor the logical UP time difference, Delta T, of the ports at both ends of the link_logic＝T_{logic_b}-T_{logic_a}. In addition, based on the description of step 801, it can be known that the two ports in the LINK need to start their corresponding LINK UP timers after physical UP, and based on the description of step 804, it can be known that the LINK UP timers are periodically restarted, where in this embodiment 2, the periods for starting the LINK UP timers by the two ports may be the same or different, and for a simple description, each of the following scenarios starts the LINK by the two portsThe UP timers have the same period, which is t for example. Furthermore, the ports at both ends of the link need to periodically send an info packet to the port at the opposite end before the logical UP is not triggered, and the transmission time of the info packet depends on the length of the info packet. When the ports at the two ends of the link send info messages with the same length, the transmission time of the info messages should be the same, and this embodiment 2 takes the case that the lengths of the info messages sent by the ports at the two ends of the link are the same, that is, the transmission time of the info messages sent by the ports at the two ends is the same, and both the transmission time and the transmission time are Δ T_tx。

Based on the above description, the following describes three scenarios under embodiment 2, respectively:

scene 1:

scenario 1 applies to n × T + Δ T_tx＜ΔT_phyIs < (n +1) > t, and AT_phy+ΔT_txIn the case of (n +1) × t, where n is the period of the port sending the info packet, and is greater than or equal to 0, the case applied in the scenario 1 is specifically shown in fig. 10. In this case, the port of the physical UP first assumes that port a starts its LINK UP timer, and sends an info packet to the opposite port, which assumes that port B. And then, before the port A receives the ack message or the info message sent by the port B, the port A restarts the LINK UP timer and sends the info message by taking t as a period. As for port B, since n × T + Δ T_tx＜ΔT_phyIf t is less than (n +1), then the physical UP of the port B in the nth cycle of the port a sending the info message can be obtained. Since the port B is physically UP in the nth cycle, the port B does not respond to the info packet sent by the port a before the nth cycle.

At the beginning of the nth cycle, port A sends an info message to port B. Since n x T + Δ T_tx＜ΔT_phyIs < (n +1) > t, and AT_phy+ΔT_txIf t is less than (n +1), it means that port B still has no physical UP when receiving the info packet sent from port a in the nth cycle, but has a physical UP at a time point after receiving the info packet sent from port a in the nth cycle (the time point also belongs to the nth cycle). Port B is physically UPAnd similarly, starting a corresponding LINK UP timer and sending an info message to an opposite end, namely the port A. And then, after the physical UP and before the ack message or the info message sent by the port a is received, the port B restarts the LINK UP timer and sends the info message with the period of t.

When port A receives the info message sent by port B, considering that port B has been physically UP, sending ack message for the received info message to port B, closing the opened LINK UP timer, reporting LINK UP to upper layer protocol module to trigger the upper layer protocol module to switch the logic state of port A to logic UP, at this time, time T of the port A logic UP is UP_{logic_a}＝T_{phy_b}+ΔT_tx。

When port B receives ack message sent by port A, the self-started LINK UP timer is closed, and LINK UP is reported to the upper layer protocol module, so as to trigger the upper layer protocol module to switch the logic state of port B into logic UP and report the logic UP, and at the moment, the time T of the logic UP of port B is_{logic_b}＝T_{logic_a}+ΔT_tx。

Based on the above obtained T_{logic_a}、T_{logic_b}Then, the time difference Δ T of the two-port logical UP in scenario 1 can be obtained_logic＝T_{logic_b}-T_{logic_a}＝ΔT_tx. While the time from the average physical UP to the average logical UP (shaded in fig. 10) Δ T that both ports go through_syn＝ΔT_tx+ΔT_logic＝2ΔT_tx。

Based on the analysis of scenario 1, it can be known that if T, Δ T are set_tx、ΔT_phyThe following conditions are satisfied: n x T + Δ T_tx＜ΔT_phyN + 1T, and Δ T_phy+ΔT_txIf n + 1T, Δ T can be obtained_logicOptimized to DeltaT_txHowever, generally, because the length of an info packet is relatively short, the time Δ T for each port to transmit the info packet is short_txAlso shorter, therefore, the time difference Δ T of logically UP the two ports_logicDecrease to Δ T_txThe purpose of quickly recovering the link can be achieved.

Scene 2:

scenario 2 applies to n × T + Δ T_tx＜ΔT_phy(n +1) T, and (n +1) T < Δ T_phy+ΔT_tx＜＝(n+1)*t+ΔT_txWhere n is a period for sending an info packet, and is greater than or equal to 0, the scenario 2 applies as shown in fig. 11. In this case, the port of the physical UP first assumes that port a starts its LINK UP timer, and sends an info packet to the opposite port, which assumes that port B. And then, before the port A receives the ack message or the info message sent by the port B, the port A restarts the LINK UP timer and sends the info message by taking t as a period. As for port B, since n × T + Δ T_tx＜ΔT_phyIf t is less than (n +1), then the physical UP of the port B in the nth cycle of the port a sending the info message can be obtained. Since the port B is physically UP in the nth cycle, the port B does not respond to the info packet sent by the port a before the nth cycle.

At the beginning of the nth cycle, port A sends an info message to port B, since n × T + Δ T_tx＜ΔT_phyIf the port B receives the info packet sent by the port a in the nth period, there is still no physical UP, but the physical UP is at the time point after the port B receives the info packet sent by the port a in the nth period. When port B is in physical UP, it will start its LINK UP timer, and send info message to the opposite end, i.e. port a. After the physical UP and before receiving the ack message or the info message sent by the port a, the port B restarts the LINK UP timer and sends the info message with the period of t.

When the port A receives the info message sent by the port B, the port A is connected with the port B because of n × T + delta T_tx＜ΔT_phy(n +1) T, and (n +1) T < Δ T_phy+ΔT_tx＜＝(n+1)*t+ΔT_txThen, it means that the time point when the port a receives the info packet is within the (n +1) th cycle. After receiving the info message sent by the port B, the port A considers the port BSending an ack message corresponding to the received info message to the port B after the physical UP is finished, closing a LINK UP timer which is opened per se, reporting the LINK UP to an upper layer protocol module to trigger the upper layer protocol module to switch the logic state of the port A of the local end into logic UP, wherein the time T of the logic UP of the port A is at the moment_{logic_a}＝T_{phy_b}+ΔT_tx。

Based on the above description that the time point when the port a receives the info packet sent by the port B is within the (n +1) th cycle, it can be obtained that when the (n +1) th cycle is reached, the port a has not received the info packet sent by the port B, and therefore, when the (n +1) th cycle is reached, the port a also sends the info packet to the port B. The time point of the port A sending the info message is earlier than the time point of the port A sending the ack message. Thus, port B will receive the info message sent by port A first, and when receiving the info message, close the opened LINK UP timer, report LINK UP to the upper protocol module, to trigger the upper protocol module to switch the logic state of port B to logic UP, at this time, the time T of the port B logic UP_{logic_b}＝T_{phy_a}+(n+1)*t+ΔT_tx. When the two ports are logically UP, the subsequently received info message and ack message are ignored.

Based on the above obtained T_{logic_a}、T_{logic_b}Then, the time difference Δ T of the two-port logical UP in the present scenario 2 can be obtained_logic＝T_{logic_b}-T_{logic_a}＝T_{phy_a}+(n+1)*t-T_{phy_b}＝(n+1)*t-ΔT_phy. While the time from the average physical UP to the average logical UP (shaded in fig. 11) Δ T that both ports go through_syn＝ΔT_tx+ΔT_logic＝ΔT_tx+(n+1)*t-ΔT_phy。

Based on (n +1) × T < Δ T_phy+ΔT_tx(n +1) T + Δ T, Δ T can be obtained_logic＜＝ΔT_txThus, it is possible to obtain T and Δ T in the present scenario 2_tx、ΔT_phyThe following conditions are satisfied: n x T + Δ T_tx＜ΔT_phy(n +1) T, and (n +1) T < Δ T_phy+ΔT_tx＜＝(n+1)*t+ΔT_txCan make Δ T_logicOptimized to be less than DeltaT_txThis obviously achieves the goal of fast link recovery.

Scene 3:

scenario 3 applies to n x T < Δ T_phy＜＝n*t+ΔT_txWhere n is a period for sending an info packet, and is greater than or equal to 0, the situation applied in the scenario 3 is specifically as shown in fig. 12. In this case, the port of the physical UP first assumes that port a starts its LINK UP timer, and sends an info packet to the opposite port, which assumes that port B. And then, before the port A receives the ack message or the info message sent by the port B, the port A restarts the LINK UP timer and sends the info message by taking t as a period. As for port B, since n × T < Δ T_phy＜＝n*t+ΔT_txIf so, the physical UP of the port B in the nth cycle of the port a sending the info message can be obtained, and when the port B is in physical UP, the LINK UP timer on the port B is also started, and the info message is sent to the opposite end, i.e., the port a. And then, after the physical UP and before receiving the ack message or the info message sent by the port a, the port B restarts the LINK UP timer and sends the info message with the period of t as a cycle. It should be noted that, because port B is physically UP in the nth cycle, port B does not have any response to the info packet sent by port a before the nth cycle.

At the beginning of the nth cycle, port A sends an info message to port B, since n × T < Δ T_phy＜＝n*t+ΔT_txIt means that port B has been physically UP before receiving the info packet sent by port a in the nth cycle. Because port B will send info message to port a immediately when it is in physical UP, it can be further obtained that port B has not already been in physical UP until it receives info message sent by port a in the nth cycle, and has also sent info message to port a.

When port B receives the info message sent by port A in the nth period, the opened LINK UP timer is closed, and LINK UP is reported to the upper layer protocol module to trigger the UPThe layer protocol module switches the logic state of the port B into logic UP and sends an ACK message to the port A. At this time, the time T of the logical UP of the port B_{logic_b}＝T_{phy_a}+n*t+ΔT_tx。

When the port A receives the info message sent by the port B, the opened LINK UP timer is closed, and the LINK UP is reported to the upper layer protocol module so as to trigger the upper layer protocol module to switch the logic state of the port A into the logic UP and send an ACK message to the port B. At this time, the time T of the logical UP of the port A_{logic_a}＝T_{phy_b}+ΔT_tx。

Based on the above obtained T_{logic_a}、T_{logic_b}Then, the time difference Δ T of the two-port logical UP in scenario 3 can be obtained_logic＝T_{logic_a}-T_{logic_b}＝T_{phy_b}-T_{phy_a}-n*t＝ΔT_phyN T, and the time (shaded in fig. 12) Δ T from the average physical UP to the average logical UP through which both ports pass_syn＝ΔT_tx。

Based on n x T < Δ T_phy＜＝n*t+ΔT_txThe Δ T obtained above can be obtained_logic＜＝ΔT_tx. Thus, in scenario 3, the values of T and Δ T can be obtained_tx、ΔT_phyThe following conditions are satisfied: n x T < delta T_phy＜＝n*t+ΔT_txCan make Δ T_logicOptimized to be less than DeltaT_txThis obviously achieves the goal of fast link recovery.

So far, the description of the three scenarios in this embodiment 2 is completed. In the three scenarios, the info message and the ack message received after the ports at the two ends of the link have been logically UP are ignored.

The three scenarios can cover delta T_phy、t、ΔT_txAll cases of quantitative relationships between. As can be seen from the above three scenarios, Δ T can be obtained under each scenario_logic＜＝ΔT_txAnd Δ T_tx＜＝ΔT_syn＜＝2ΔT_tx. That is, a tubeThe process shown in fig. 8 can shorten the logical UP time difference between the ports at both ends of the link to be not greater than the transmission time (Δ T) of one packet on the link in any scenario_logic＜＝Δ_tx) Usually, the transmission time of a message on the link is only a few milliseconds or even less than a millisecond, which can achieve the purpose of quickly recovering the link.

Compared with the first embodiment, the second embodiment can shorten the logical UP time difference of the ports at the two ends of the link to be not more than the transmission time (delta T) of one message on the link regardless of the scenario_logic＜＝ΔT_tx) Therefore, this embodiment 2 has no special requirement for the period T of the LINK UP timer start, and is not affected by Δ T_phy、ΔT_txThe optimization effect is stable, and the method has certain popularization. Preferably, considering practical situations, the processing capacity of the CPU can be considered when setting t, which is generally not less than 100 ms.

The description of the second embodiment is completed so far.

The method provided by the present invention is described above, and the port module provided by the present invention is described below:

fig. 13 and 13 are structural diagrams of apparatuses provided in an embodiment of the present invention. The device is applied to the port in the embodiment 1, and specifically comprises: the device comprises a processing unit, a checking unit and a triggering unit; wherein,

the processing unit is used for starting a logic state switching timer corresponding to the local port after the physical state of the local port is available (available), and detecting whether the local port receives a message which is sent by the opposite port and used for triggering logic state switching;

Preferably, the message (for example, the info message in embodiment 1) for triggering logic state switching is a message transmitted on the direct link and terminates at the receiving port.

In this embodiment, to achieve the purpose of quickly recovering the link, the period t of the logic state switching timer satisfies the following condition:

ΔT_tx＜＝ΔT_phyt; or, T + Δ T_tx＞＝ΔT_phy＞t；

Wherein, Delta T_txTransmission time, Δ T, of messages sent for the port of the home terminal for triggering the logic state switching_phyThe time difference between the availability of the physical state of the local port and the availability of the physical state of the opposite port.

In addition, another structure diagram of a port module is provided in the embodiments of the present invention, which is specifically shown in fig. 14.

Fig. 14 and 14 are views showing another structure of the apparatus according to the embodiment of the present invention. The device is applied to the port in the embodiment 2, and specifically comprises: the device comprises a processing unit, a first detection unit, a second detection unit, a checking unit and a triggering unit; wherein,

the trigger unit is configured to receive the trigger notification, or when the detection result of the first detection unit is yes, close the logic state switching timer that is already started in the home port, and trigger an upper layer to switch the logic state of the home port to a logic state that is available.

Preferably, the notification message and the confirmation message are messages transmitted on a direct link and are terminated at a receiving port.

So far, the description of the port module provided by the present invention is completed.

The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present invention should be included in the scope of the present invention.

Claims

1. A method for rapidly recovering a link, the method comprising:

a, after each port on the link is available in the physical state, starting a logic state switching timer corresponding to the port of the local end, and detecting whether the port of the local end receives a message which is sent by the port of the opposite end and used for triggering logic state switching, if not, executing the step B, and if so, executing the step C;

b, checking whether the logic state switching timer started by the port of the local terminal is overtime, if so, sending a message for triggering logic state switching to the port of the opposite terminal, executing the step C, and if not, returning to the detection in the step A;

2. The method according to claim 1, wherein the message for triggering the logic state switch is a message transmitted on a direct link and terminates at a receiving port.

3. The method according to claim 1, wherein the period t of the logic state switching timer satisfies the following condition:

ΔT_tx<=ΔT_phy<= t; or, T + Δ T_tx>=ΔT_phy>t；

4. An apparatus for rapidly recovering a link, the apparatus being applied to a port on the link, comprising: the device comprises a processing unit, a checking unit and a triggering unit; wherein,

5. The apparatus according to claim 4, wherein the message for triggering the logic state switch is a message transmitted on a direct link and terminates at a receiving port.

6. The apparatus of claim 4, wherein the period t of the logic state switching timer satisfies the following condition:

ΔT_tx<=ΔT_phy<= t; or, T + Δ T_tx>=ΔT_phy>t；

7. A method for rapidly recovering a link, the method comprising:

8. The method of claim 7, wherein the notification message and the confirmation message are messages transmitted on a direct link and terminate at a receiving port.

9. An apparatus for rapidly recovering a link, the apparatus being applied to a port on the link, comprising: the device comprises a processing unit, a first detection unit, a second detection unit, a checking unit and a triggering unit; wherein,

10. The apparatus according to claim 9, wherein the notification message and the confirmation message are messages transmitted on a direct link and terminate at a receiving port.