CN102325023B - Data generation method and device capable of prolonging service life of chip - Google Patents
Data generation method and device capable of prolonging service life of chip Download PDFInfo
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Abstract
The invention discloses a data generation method and device capable of prolonging the service life of a chip, wherein the method comprises the following steps: step A) acquiring a variable factor according to association information stored in a memory in the chip; step B) reading a hardware serial number of the chip; and step C) carrying out calculation on the variable factor and the hardware serial number to generate basic data. In addition, the step A) further comprises the modification of the stored association information. By adopting the method and the device, the problem of unsafety of an information system caused by the situation that the basic data generated by the chip at the fixed time are same can be solved and the reliability of the system is enhanced.
Description
Technical field
The present invention relates to information security field, in particular to a kind of chip data creation method and device in useful life of extending.
Background technology
Along with developing rapidly of computer technology, the communication technology and network technology, the safety problem of information in storage, transmission, reception and processing procedure gets more and more people's extensive concerning.Random number is being played the part of important role in information safety system, and basis has a wide range of applications in based on computer, network service and transaction.Such as key generation, initialization vector, timestamp, authentication challenge code, key agreement etc., all to use random number.
In actual applications, such as mutual authentication or session key generation, it not is very high that the statistics randomness of random number is required, and is uncertain, so often by pseudo random number, realizes various functions at present but require the random number sequence producing.The process that generates pseudo random number by random number algorithm, relies on basic data conventionally, need to generate between the pseudo random sequence of specifying numerical value interval by basic data.
In prior art, produce in the method for basic data based on chip, because chip does not have stochastic source, the basic data that the fixed time after each chip power is produced is identical, and this just causes the dangerous of information system.
The unsafe problem of the identical information system causing of basic data producing at fixed time for correlation technique chips, not yet proposes effective solution at present.
Summary of the invention
The invention provides a kind of chip data creation method and device in useful life of extending, above-mentioned because of the basic data identical information system that the cause unsafe problem of chip in fixed time generation at least to solve.
The invention provides a kind of chip data creation method in useful life that extends, comprising:
Steps A: obtain Variable Factors according to the related information of storing in storage on chip;
Step B: the hardware sequence number that reads described chip;
Step C: described Variable Factors and described hardware sequence number are calculated to formation base data;
In steps A, also comprise the related information of revising described storage.
Described memory is flash memory, and described flash memory comprises a counting page and at least one use page; Wherein, described counting page is for storing the described erasable number of times that page is corresponding that uses, and described use page comprises a plurality of sections, and every section comprises a plurality of positions;
Describedly according to the related information of storing in memory, obtain Variable Factors and comprise: query aim position calculate physical deflection value corresponding to described target bit in the use page of described flash memory, and read the erasable number of times in described counting page; According to described physical deflection value and described erasable number of times, calculate Variable Factors.
In described flash memory, be provided with and use sign; Described in the use page of described flash memory before query aim position and physical deflection value corresponding to described target bit, described method also comprises:
According to described use sign, judge that whether described flash memory is for being used first; If so, by the erasable number of times zero clearing in described counting page, and wipe described uses page, wipe after described uses page, in described use page, the numerical value of all is designated value, described use is set and is designated and uses; If not, directly perform step A.
Described in the use page of described flash memory query aim position comprise:
According to the lookup method of setting, in described first position that is described designated value of numerical value of searching storage in using page, the position for described designated value finding is defined as to target bit, and the value of target bit is revised as to the value beyond described designated value.
Described in the use page of described flash memory query aim position also comprise:
According to the lookup method of setting, at the described numerical value of searching storage in using page, last is not the position of described designated value, the next bit that is not the position of described designated value by last finding is defined as target bit, and the value of described target bit is revised as to described designated value value in addition.
Described designated value is 1, described target bit is revised as to described designated value value in addition and comprises: by described target bit zero clearing.
Sequence number of described every section of correspondence; The lookup method of described setting comprises:
From low sequence number section, to high sequence number segment search, be not the target phase of designated value entirely, in described target phase, from a high position to low level, search target bit;
Or, from high sequence number section, to low high sequence number segment search, be not the target phase of designated value entirely, in described target phase, from a high position to low level, search target bit;
Or, from low sequence number section, to high sequence number segment search, be not the target phase of designated value entirely, in described target phase, from low level to a high position, search target bit;
Or, from height sequence number section, to low high sequence number segment search, be not the target phase of designated value entirely, in described target phase, from low level to a high position, search target bit.
Described method also comprises: read the erasable number of times in described counting page and add 1, wiping described counting page; The described erasable number of times adding after 1 is write to described counting page; Described use page is wiped, wiped after described use page, in described use page, the numerical value of all positions is designated value.
When described use page is while be a plurality of, described a plurality of use in page section sequence number be sequential organization successively.
Described memory is EEPROM (Electrically Erasable Programmable Read Only Memo); Described memory comprises a counting unit and at least one use unit; Wherein, the sequence number of described counting unit for storing described use unit, first numerical value writing in described use unit is initial value;
Describedly according to the related information of storing in memory, obtain Variable Factors, be specially: according to the sequence number in described counting unit, determine the current use unit reading, read the numerical value in definite described use unit, according to described numerical generation Variable Factors;
The related information of the described storage of described modification, is specially: revise the numerical value in described use unit, judge whether amended numerical value surpasses setting threshold, if so, the sequence number in described counting unit is adjusted into the next sequence number of using unit; If not, directly perform step A.
Described memory is provided with and uses sign; Described according to the sequence number in described counting unit, determine the current use unit reading before, described method also comprises:
According to described use sign, judge that whether described memory is for using first; If so, in described counting unit, write preset value, in described use unit, write described initial value, and described use is set is designated and uses; If not, directly perform step A.
Numerical value in the described use of described modification unit comprises: the numerical value in described use unit is added to 1.
Describedly described Variable Factors and described hardware sequence number calculated to formation base data comprise:
Described Variable Factors and described hardware sequence number are carried out to computing, obtain operation values; Described operation values is carried out to hashing algorithm, obtain basic data.
Describedly described Variable Factors and described hardware sequence number calculated to formation base data also comprise:
In described chip, generate random number, described random number and described Variable Factors are carried out to computing, obtain a median; Described median and described hardware sequence number are carried out to computing, obtain operation values; Described operation values is carried out to hashing algorithm, obtain basic data.
Described computing is: XOR, splicing computing, combinatorial operation or sum operation.
Described method also comprises: described basic data is calculated to pseudo random number; The described pseudo random number obtaining is calculated again as new basic data at every turn, obtained pseudo-random number sequence.
Described method also comprises: use described basic data to carry out information security operation.
The present invention provides again a kind of chip data generating device in useful life that extends, and comprising:
Memory module, for storing the hardware sequence number of related information and chip;
Variable Factors acquisition module, for obtaining described related information from described memory module, calculates Variable Factors according to described related information, also for upgrading described related information;
Sequence number read module, for reading the hardware sequence number of described chip from described memory module;
Basic data generation module, for calculating formation base data with described Variable Factors and described hardware sequence number.
Described memory module is flash memory, comprises a counting page and at least one use page, and described counting page is for storing an erasable number of times corresponding to described use page, and described use page comprises a plurality of sections, and each section comprises a plurality of positions;
Described Variable Factors acquisition module comprises the first Variable Factors acquiring unit and the first updating block; Described the first Variable Factors acquiring unit, for searching target bit and physical deflection value corresponding to described target bit at described use page, and read the erasable number of times in described counting page, according to the physical deflection value of described target bit and described erasable number of times, calculate Variable Factors; Described the first updating block, for upgrading the definite target bit of described the first Variable Factors acquiring unit.
Described memory module is EEPROM (Electrically Erasable Programmable Read Only Memo), and described memory module comprises a counting unit and at least one use unit; Wherein, the sequence number of described counting unit for storing described use unit, first numerical value writing in described use unit is initial value;
Described Variable Factors acquisition module comprises the second Variable Factors acquiring unit and the second updating block; Described the second Variable Factors acquiring unit, for determine the current use unit reading according to the sequence number of described counting unit, reads the numerical value in definite described use unit, according to described numerical generation Variable Factors; Described the second updating block, for revising the numerical value of described use unit, and judges whether amended described numerical value surpasses setting threshold, if so, and also for the sequence number of described counting unit being adjusted into the next sequence number of using unit.
Described device also comprises: random number module, for generating random number; Described basic data generation module, for calculating formation base data to described random number, described Variable Factors and described hardware sequence number.
Described device also comprises: pseudo random number computing module, for described basic data is calculated to pseudo random number; Pseudo-random number sequence acquiring unit,, triggers described pseudo random number computing module and again calculates as new basic data for described pseudo random number that described pseudo random number computing module is obtained, obtains pseudo-random number sequence.
Described device also comprises: operational module, carries out information security operation for the basic data of using described basic data generation module to generate.
By the present invention, according to the related information generation Variable Factors of storing in memory, guaranteed that the basic data of each generation is all different, so that the fail safe of can ensure information security authentication and session key generation, the reliability of raising information system.
Accompanying drawing explanation
Accompanying drawing described herein is used to provide a further understanding of the present invention, forms the application's a part, and schematic description and description of the present invention is used for explaining the present invention, does not form inappropriate limitation of the present invention.In the accompanying drawings:
Fig. 1 is according to the flow chart of the data creation method in prolongation chip useful life of the embodiment of the present invention one;
Fig. 2 is according to the structured flowchart of the data generating device in prolongation chip useful life of the embodiment of the present invention two;
Fig. 3 extends the chip data creation method flow chart in useful life according to the embodiment of the present invention three by flash;
Fig. 4 (a), (b), (c) and (d) be according to different modes, to read the schematic diagram that flash is used page according to the embodiment of the present invention three;
Fig. 5 be according to the embodiment of the present invention four, provide by flash, extend the block diagram of the data generating device in chip useful life;
Fig. 6 be according to the embodiment of the present invention five, provide by flash, extend the chip data creation method flow chart in useful life;
Fig. 7 be according to the embodiment of the present invention six, provide by eeprom, extend the chip data creation method flow chart in useful life;
Fig. 8 be according to the embodiment of the present invention seven, provide by eeprom, extend the block diagram of the data generating device in chip useful life.
Embodiment
Hereinafter with reference to accompanying drawing, also describe the present invention in detail in conjunction with the embodiments.It should be noted that, in the situation that not conflicting, embodiment and the feature in embodiment in the application can combine mutually.
For the identical problem of basic data that the fixed time solving after chip power produces, the embodiment of the present invention provides and has extended chip data creation method and the device in useful life.
Embodiment mono-
The present embodiment provides a kind of chip data creation method in useful life that extends, and referring to Fig. 1, the method comprises the following steps:
Step S102, obtains Variable Factors according to the related information of storing in storage on chip;
This Variable Factors is to be stored in certain numerical value in can storage medium, or by the numerical value that the numerical value of storage is calculated;
Step S104, reads the hardware sequence number of chip;
Step S106, calculates formation base data to Variable Factors and hardware sequence number.
Wherein, the order interchangeable of the step S102 in the present embodiment and step S104.
Wherein, storage related information in memory in the present embodiment is different from the information that last formation base data are used, can guarantee that so each basic data generating is different, based on this, in step S102, also comprise: the storage related information in memory is modified, use so that the basic data generating is different from the basic data of this generation next time.
The embodiment of the present invention, by a Variable Factors is set, is carried out above-mentioned steps after powering at every turn, and the basic data producing all can be changed, thereby greatly strengthens the fail safe of information systems.
When receiving the information that produces pseudo random number, following steps are carried out in circulation:
The basic data obtaining is calculated, obtained pseudo random number;
The pseudo random number obtaining is calculated again as new basic data at every turn, obtained pseudo-random number sequence.
Memory in the present embodiment can be flash memory (that is, flash memory) or eeprom memory (that is, EEPROM (Electrically Erasable Programmable Read Only Memo)); The generative process of basic data is simply described when memory is flash memory or EEPROM (Electrically Erasable Programmable Read Only Memo) below.
1) memory is flash memory, and this flash memory comprises a counting page and at least one use page; Wherein, counting page, for storing the erasable number of times that uses page corresponding, is used page to comprise a plurality of sections, sequence number of each section of correspondence; Based on this, the above-mentioned storage related information according to memory obtains Variable Factors and comprises: query aim position calculate physical deflection value corresponding to target bit in the use page of flash memory, and read the erasable number of times in counting page; According to physical deflection value and erasable number of times, calculate Variable Factors.
While powering on for convenient definite each flash memory, whether this flash memory was used, and is provided with and uses sign in the flash memory of the present embodiment; Based on this, above-mentioned in the use page of flash memory query aim position and calculate physical deflection value corresponding to target bit before, the method also comprises: according to using sign to judge that whether flash memory is for being used first; If so, by the erasable number of times zero clearing in counting page, and wipe and use page, using the numerical value of all positions in page is designated value, and preferably, designated value is 1, and setup and use is designated and uses (for example, being set to 1), if not, directly performs step S102.
Wherein, in the use page of flash memory, query aim position can comprise: first position that is designated value of numerical value of searching storage according to the lookup method of setting in using page, or last is not the position of designated value, by find for designated value position or for designated value position next bit be defined as target bit, and the value of target bit is revised as to this designated value numerical value in addition, for example zero clearing.Here, by the operation of designated value zero clearing, effectively reduce the erasable number of times of flash use page, extended the useful life of chip; Meanwhile, the lookup method of setting comprises: from low sequence number section, to high sequence number segment search, be not the target phase of designated value entirely, search target bit in described target phase from a high position to low level; From high sequence number section, to low high sequence number segment search, be not the target phase of designated value entirely, in described target phase, from a high position to low level, search target bit; From low sequence number section, to high sequence number segment search, be not the target phase of designated value entirely, in described target phase, from low level to a high position, search target bit; From height sequence number section, to low high sequence number segment search, be not the target phase of designated value entirely, in described target phase, from low level to a high position, search target bit.When not finding the position that the numerical value of storage is designated value in use page, said method also comprises: read the erasable number of times in above-mentioned counting page and add 1, erase count page; The erasable number of times adding after 1 is write to counting page; Described use page is wiped, wiped after described use page, in described use page, the numerical value of all positions is designated value.
When above-mentioned use page is a plurality of, the sequence number of the section in a plurality of use pages is sequential organization successively, and chronological order can be according to the order of above-mentioned setting.
2) memory is EEPROM (Electrically Erasable Programmable Read Only Memo); This EEPROM (Electrically Erasable Programmable Read Only Memo) comprises a counting unit and at least one use unit; Wherein, this counting unit is for storing the sequence number of using unit, and first numerical value writing in this use unit is initial value; Based on this, the related information of storing in above-mentioned memory obtains Variable Factors and is specially: according to the sequence number in counting unit, determine the current use unit reading, read the numerical value in definite use unit, according to numerical generation Variable Factors;
The data of considering eeprom memory storage are conditional, therefore in this manner, after obtaining basic data, said method also comprises the related information of revising storage, is specially: revise the numerical value using in unit, judge whether amended numerical value surpasses setting threshold, if, sequence number in counting unit is adjusted into the next sequence number of using unit, if not, directly performs step S102.
Above-mentionedly Variable Factors and hardware sequence number are calculated to formation base data comprise: Variable Factors and hardware sequence number are carried out to computing, obtain operation values; This operation values is carried out to hashing algorithm, obtain basic data;
In order to strengthen fail safe, above-mentionedly with Variable Factors and hardware sequence number, calculate formation base data and can also adopt following manner: in chip, generate random number, random number and Variable Factors are carried out to computing, obtain a median; Median and hardware sequence number are carried out to computing, obtain operation values; Operation values is carried out to hashing algorithm, obtain basic data;
Above-mentioned operation values is: XOR, splicing computing, combinatorial operation or sum operation;
Said method also comprises: basic data is calculated to pseudo random number; The pseudo random number obtaining is calculated again as new basic data at every turn, obtained pseudo-random number sequence.
The basic data of using the present embodiment to generate is carried out information security operation, can strengthen the fail safe of information operating.
The present embodiment generates Variable Factors in several ways, has guaranteed that the basic data of each generation is all different, and then can ensure information security authentication and the fail safe that session key generates, and improves the reliability of information system.
Embodiment bis-
Method based on Fig. 1 provides in embodiment mono-, the present embodiment provides a kind of chip data generating device in useful life that extends, and referring to Fig. 2, this device comprises:
Memory module 20, for storing the hardware sequence number of related information and chip;
Variable Factors acquisition module 22, is connected with memory module 20, for obtaining from memory module 20 related information of storing storage on chip, and calculates generation Variable Factors;
Sequence number read module 24, is connected with memory module 20, for read the hardware sequence number of chip from memory module 20;
Basic data generation module 26, is connected with sequence number read module 24 with Variable Factors acquisition module 22, and the hardware sequence number reading for Variable Factors that Variable Factors acquisition module 22 is obtained and sequence number read module 24 calculates formation base data.
Above-mentioned memory module is flash memory, comprises a counting page and at least one use page; Wherein, counting page is used erasable number of times corresponding to unit for storing, and uses page to comprise a plurality of sections, and each section comprises a plurality of positions; Accordingly, Variable Factors acquisition module 22 comprises the first Variable Factors acquiring unit and the first updating block, the first Variable Factors acquiring unit is for being used page to search target bit, calculate physical deflection value corresponding to target bit, and read the erasable number of times in counting page, according to the physical deflection value of target bit and erasable number of times, calculate Variable Factors; The first updating block, for upgrading the definite target bit of the first Variable Factors acquiring unit.
Above-mentioned memory module is EEPROM (Electrically Erasable Programmable Read Only Memo), and memory module comprises a counting unit and at least one use unit; Wherein, counting unit is for storing the sequence number of using unit, and using first numerical value writing in unit is initial value; Accordingly, Variable Factors acquisition module 22 comprises the second Variable Factors acquiring unit and the second updating block, the second Variable Factors acquiring unit is for determining the current use unit reading according to the sequence number of counting unit, read the numerical value in definite use unit, according to numerical generation Variable Factors; The second updating block, for revising the numerical value that uses unit, and judges whether amended numerical value surpasses setting threshold, if so, and also for the sequence number of described counting unit being adjusted into the next sequence number of using unit.
Said apparatus also comprises: random number module, for generating random number; Basic data generation module, for calculating formation base data to random number, Variable Factors and hardware sequence number.
Said apparatus also comprises: pseudo random number computing module, for this basic data is calculated to pseudo random number; Pseudo-random number sequence acquiring unit,, triggers pseudo random number computing module and again calculates as new basic data for pseudo random number that pseudo random number computing module is obtained, obtains pseudo-random number sequence.
Said apparatus also comprises: operational module, carries out information security operation for the basic data of using basic data generation module 26 to generate.
Certainly, this device also comprise other operation module, for example power module, is used to this device that power supply is provided, this power module is connected with chip, during work for it provides power supply.
The present embodiment generates Variable Factors in several ways, has guaranteed that the basic data of each generation is all different, and then can ensure information security authentication and the fail safe that session key generates, and improves the reliability of information system.
Below by following embodiment, introduce the generation method of basic data, in information safety system, can be based on these embodiment formation base data.
Embodiment tri-
The present embodiment provides a kind of and has extended the chip data creation method in useful life by flash.In the method, adopt flash (can storage medium, i.e. flash memory) the storage of variables factor, described flash is provided with two flash pages, one of them flash page is counting page, is used for storing the erasable number of times to another flash page, available 32 these numerical value of binary representation; Another flash page is for using page, according to described flash, uses each and the deviant of this physical location in page to calculate Variable Factors.
Referring to Fig. 3, the method comprises the following steps:
Step 301: judgement is used and to be identified whether set, in order to determine whether flash was used, and if so, performed step 305, otherwise, execution step 302;
Step 302: by the erasable number of times zero clearing in flash counting page;
Step 303: wipe flash and use page, and use the primary system one of all positions in page to be set to 1 this flash;
Step 304: will use sign set, and be about to use sign to be set to use;
Step 305: judging that flash is used whether page is zero entirely, is to perform step 306, otherwise execution step 308;
Step 306: read the erasable number of times in flash counting page and add 1, wiping flash counting page, and the erasable number of times adding after 1 is write to flash counting page;
Accordingly, " related information of storing in storage on chip is modified " in embodiment mono-replaces with: read the erasable number of times in flash counting page and add 1, wiping flash counting page, and the erasable number of times adding after 1 is write to flash counting page;
Step 307: wipe flash and use page, and use the value of all positions in page to be all set to 1 flash, order performs step 308;
Step 306 and step 307 interchangeable order;
Step 308: read flash and use first nonzero digit in page;
Described reading adopts segmentation to read, and establishing every 8 is one section, reads every section successively, or to a high position, read every section from low level successively from a high position to low level;
Step 309: the deviant according to present bit, calculate Variable Factors, and by this zero clearing; The detailed process of calculating Variable Factors described in the present embodiment three is: the deviant of Variable Factors=erasable number of times * 512 * 8+ present bit, and 512 is the memory capacity that a flash is used page;
The deviant of present bit is the difference of physical address and the start bit physical address of present bit, or the physical address of present bit and the difference of last physical address; Preferably, the deviant of present bit is the difference of physical address and the start bit physical address of present bit;
More clear for making to obtain the process of Variable Factors, preferably, be exemplified below: referring to Fig. 4, flash is used page to be divided into 512 sections, and every 8 is one section, and the sequence number of every section is for to sort successively to 511 from 0; Segmentation is read flash and is used page, establishes and wipes flash use page for the 1st time;
Referring to Fig. 4, the section that figure (a) is is 0 from sequence number starts to read flash and uses page, and every section for to read successively from a high position to low level;
Concrete, find flash and use first nonzero digit in page, this is arranged in the section of the 10th row the 7th row, by the value 03 of this section and the physical location of this section, calculate the deviant that flash is used first nonzero digit in page, computational process is: the deviant of present bit=(10 * 16+7) * 8+7=1343; Variable Factors=1 * 512 * 8+1343=5439;
Ginseng is by Fig. 4, and the section that figure (b) is is 0 from sequence number starts to read flash and uses page, and every section for to read successively from low level to a high position;
Concrete, find flash and use first nonzero digit in page, this is arranged in the section of the 10th row the 7th row, by the value F0 of this section and the physical location of this section, calculate the deviant that flash is used first nonzero digit in page, computational process is: the deviant of present bit=(10 * 16+7) * 8+5=1341; Variable Factors=1 * 512 * 8+1341=5437;
Referring to Fig. 4, the section that figure (c) is is 511 from sequence number starts to read flash and uses page, and every section for to read successively from a high position to low level;
Concrete, find flash and use first nonzero digit in page, this is arranged in the section of the 10th row the 7th row, by the value 07 of this section and the physical location of this section, calculate the deviant that flash is used first nonzero digit in page, computational process is: the deviant of present bit=(22 * 16+8) * 8+6=2886; Variable Factors=1 * 512 * 8+2886=6982;
Referring to Fig. 4, the section that figure (d) is is 511 from sequence number starts to read flash and uses page, and every section for to read successively from low level to a high position;
Concrete, find flash and use first nonzero digit in page, this is arranged in the section of the 10th row the 7th row, by the value C0 of this section and the physical location of this section, calculate the deviant that flash is used first nonzero digit in page, computational process is: the deviant of present bit=(22 * 16+8) * 8+7=2887; Variable Factors=1 * 512 * 8+2887=6983;
Step 310: read the hardware sequence number of described chip, itself and described Variable Factors are carried out to XOR, obtain an XOR value;
Above-mentioned XOR can replace with splicing, combination or sum operation, but is not limited to this, the concrete XOR that adopts in the present embodiment three;
Above-mentioned steps 310 also available step 310 ' 1 and 310 ' 2 is replaced, and is specially:
Step 310 ' 1: read the data of 32 bytes of chip generation, and the data of these 32 bytes and the Variable Factors obtaining are added, obtain a median;
Step 310 ' 2: read the hardware sequence number of described chip, and itself and median are carried out to XOR, obtain an XOR value;
Step 311: the described XOR value obtaining is carried out to hashing algorithm, obtain a hashed value, i.e. basic data.
This hashing algorithm is irreversible one-way Hash algorithm, can be specifically SHA1, SHA256, SHA384 and MD5, but be not limited to this, the concrete SHA1 that adopts in the present embodiment three.
When receiving the information that produces pseudo random number, following steps are carried out in circulation:
The basic data obtaining is encrypted to algorithm, obtains pseudo random number;
The pseudo random number obtaining is encrypted to algorithm again as pseudo-random number seed at every turn, obtains pseudo-random number sequence.
Above-mentioned cryptographic algorithm can be DES, 3DES, AES and RSA, but is not limited to this, the concrete DES that adopts in the present embodiment three.
It is a plurality of that flash in the present embodiment three is used page also can adopt, and it is example that two flash of take are used page, and corresponding, step 303 replaces with: wipe two flash and use page, use the value of all positions in page to be made as 1 two flash; After step 305, judge two flash are used page whether all to run through, and are to perform step 306, otherwise start to read next flash, use page, and order performs step 308; In step 309, the process of calculating Variable Factors replaces with: the deviant of Variable Factors=erasable number of times * 512 * 2 * 8+ present bit, wherein, 512 is the memory capacity that a flash is used page, the deviant of present bit is to use page as an integral body two flash, the difference of the physical address of present bit and start bit physical address.
Embodiment tetra-
Method based on Fig. 3 provides in embodiment tri-, the present embodiment provides a kind of and has extended the chip data generating device in useful life by flash, referring to Fig. 5, specifically comprise: power module 51, memory module 52, set module 53, read module 54, judge module 55, page operations module 56 and basic data generation module 57; Above-mentioned memory module 52, set module 53, read module 54, judge module 55, page operations module 56 and basic data generation module 57 are all integrated on a chip.Described built-in chip type flash memory, described flash memory comprises that flash counting page and flash are used page, flash counting page is for storing the erasable number of times that flash is used to page; Described chip is for generation of the data of 32 bytes.
Read module 54, specifically comprises: the first reading unit 541, the second reading unit 542;
The first reading unit 541, for reading the value of flash page present bit;
The second reading unit 542, for reading the hardware sequence number of memory module 52 chips, also can be used for reading the data of 32 bytes that chip produces;
The second judging unit 552, for judging that flash is used whether the value of all positions of page is zero entirely;
Read time counting unit 561, for reading erasable numerical value of flash counting page;
Zero clearing unit 562, for by an erasable number of times zero clearing for flash counting page storage, also for the value zero clearing of present bit that the first reading unit 541 is read;
Erase unit 563, for being used page to wipe to flash, also for wiping flash counting page;
Number of times increases unit 564, for adding 1 by reading erasable the numerical value that time counting unit 561 reads;
Write time counting unit 565, for the erasable number of times that described number of times increase unit 564 is added after 1, write in memory module 52;
Basic data generation module 57, for formation base data.Specifically comprise: Variable Factors generation unit 571, arithmetic element 572, algorithm unit 573;
Variable Factors generation unit 571, for by calculating Variable Factors, the detailed process of this calculating Variable Factors is: the deviant of Variable Factors=erasable number of times * 512 * 8+ present bit; 512 is the memory capacity that a flash is used page;
The deviant of present bit is the difference of physical address and the start bit physical address of present bit, or the physical address of present bit and the difference of last physical address; Preferably, the deviant of present bit is the difference of physical address and the start bit physical address of present bit;
Wherein, XOR also can replace with splicing, combination or sum operation, but is not limited to this;
Wherein, this hashing algorithm is irreversible one-way Hash algorithm, can be specifically SHA1, SHA256, SHA384 and MD5, but be not limited to this.
Embodiment five
The present embodiment five provides another kind of and has extended the chip data creation method in useful life by flash.In the method, adopt flash (can storage medium, i.e. flash memory) the storage of variables factor, described flash is provided with three flash pages, and one of them flash page is counting page, and other two flash pages are for being used page; Flash counting page is used for storing the erasable number of times that two flash is used to page, available 32 these numerical value of binary representation; According to described two flash, use the deviant of the physical location of each and this in page to calculate Variable Factors.
Referring to Fig. 6, the method comprises:
Step 601: judgement is used and to be identified whether set, in order to determine whether flash was used, and if so, performed step 605, otherwise, execution step 602;
Step 602: by the erasable number of times zero clearing in flash counting page;
Step 603: wipe two flash and use page, and use the primary system one of all positions in page to be set to 1 two flash;
Step 604: will use sign set;
Step 605: read current flash and use first nonzero digit in page;
Step 606: the deviant according to present bit, calculate Variable Factors, and by this zero clearing;
The detailed process of calculating Variable Factors described in the present embodiment six is: the deviant of Variable Factors=erasable number of times * 1024 * 8+ present bit, and 512 is the memory capacity that a flash is used page;
The deviant of present bit is the difference of physical address and the start bit physical address of present bit, or the physical address of present bit and the difference of last physical address; Preferably, the deviant of present bit is the difference of physical address and the start bit physical address of present bit;
In step 606, obtain in the mode of deviant of present bit and embodiment tri-step 309 similar, variation, running through after a flash uses page, retrieves next flash and uses page, continues the deviant of searching nonzero digit and obtaining current nonzero digit.
Step 607: judge that current flash is used whether the value of all positions in page is zero entirely, if so, perform step 608, otherwise execution step 610;
Step 608: judge two flash are used page whether all to run through, and if so, perform step 609, otherwise execution step 610;
Step 609: start to read next flash and use page;
Step 610: read the erasable number of times in flash counting page and add 1, wiping flash counting page, and the erasable number of times adding after 1 is write to flash counting page;
Step 611: wipe two flash and use page, and use the value of all positions in page to be made as 1 two flash;
Step 612: read the hardware sequence number of chip, and itself and described Variable Factors are carried out to computing, obtain an operation values; Described computing can be XOR, splicing, combination or addition, but is not limited to this;
Step 613: the operation values obtaining is carried out to hashing algorithm, obtain a hashed value, i.e. basic data.
Described hashing algorithm can be SHA1, SHA256, SHA384 and MD5, but is not limited to this.
When receiving the information that produces pseudo random number, following steps are carried out in circulation:
The basic data obtaining is encrypted to algorithm, obtains pseudo random number;
The pseudo random number obtaining is encrypted to algorithm again as pseudo-random number seed at every turn, obtains pseudo random sequence.
Described cryptographic algorithm can be DES, 3DES, AES and RSA, but is not limited to this, the concrete DES that adopts in the present embodiment three.
Described in the present embodiment five, flash page also can adopt more multipage, and wherein one page is as counting page, and other remaining pages are as being used page, and while making the every variation of erasable number of times one time, the random seed of generation is more.
Embodiment six
The present embodiment provides a kind of and has extended the chip data creation method in useful life by eeprom.In the method, adopt eeprom (can storage medium, i.e. EEPROM (Electrically Erasable Programmable Read Only Memo)) the storage of variables factor, described eeprom is to there being unique hardware sequence number.Preferably, be provided with three eeprom unit in described eeprom, one of them eeprom unit is counting unit, is used for recording the sequence number that eeprom is used unit, and other two eeprom unit are use unit, is used for the storage of variables factor.Described eeprom adopts 8,16,32 or 64 binary storage numerical value, sets in advance a described maximum times that eeprom unit can write repeatedly, and in the present embodiment, maximum times is preset as 500,000 times.
Referring to Fig. 7, the method comprises the following steps:
Step 701: judgement is used and to be identified whether set, in order to determine whether eeprom was used, and if so, performed step 705, otherwise, execution step 702;
Step 702: write preset value in eeprom counting unit, preferably, preset value is 0, brings into use first eeprom to use unit;
Step 703: use in unit and write initial value at eeprom, preferably, initial value is 0;
Step 704: will use sign set;
Step 705: judge eeprom is used the numerical value in unit whether to be greater than default maximum times with the first difference of initial value, and if so, order performs step 706, otherwise performs step 709;
The first difference is the difference that the numerical value in eeprom use unit deducts initial value, or initial value deducts the difference that eeprom is used the numerical value in unit; In the present embodiment, preferably, the first difference is the difference that the numerical value in eeprom use unit deducts initial value;
Step 706: judge whether the second difference of numerical value in eeprom counting unit and preset value is less than the value of setting, and preferably, the value of the described setting specifically individual numerical value of eeprom counting unit subtracts 1, if not, finishes, if so, order performs step 707;
In the present embodiment, it is example that two eeprom of take are used unit, and the value of described setting is 1;
The second difference is the difference that the numerical value in eeprom counting unit deducts preset value, or preset value deducts the difference of the numerical value in eeprom counting unit; In this enforcement, preferably, the second difference is the difference that the difference in eeprom counting unit deducts preset value;
Step 707: the numerical value in eeprom counting unit is added to 1, start to carry out next eeprom to use the use of unit;
Step 708: use in unit and write initial value at this eeprom, preferably, initial value is 0;
Step 709: read eeprom and use the numerical value of storing in unit;
Step 710: calculate Variable Factors: the numerical value of the maximum times of the numerical value in Variable Factors=described counting unit * default+read, is used eeprom the numerical value of storing in unit to change according to default operation rule, and again writes; In the present embodiment, preferably, default operation rule is to use the numerical value of storing in unit to add 1 eeprom, and again writes;
Accordingly, in embodiment mono-, " related information of storing in storage on chip is modified " and replace with: use the numerical value of storing in unit to add 1 eeprom, and again write;
Step 711: whether the numerical value that judgement is used unit to read from eeprom equals to write the numerical value that eeprom is used unit, is to perform step 712, otherwise return to execution step 706;
Step 712: the hardware sequence number that reads eeprom storage chip;
Step 713: this Variable Factors and this hardware sequence number are carried out to computing, obtain an operation values;
This computing can be XOR, splicing, combination or addition, but is not limited to this;
Step 714: operation values is carried out to hashing algorithm, obtain basic data.
This hashing algorithm can be SHA1, SHA256, SHA384 and MD5, but is not limited to this.
When receiving the information that produces pseudo random number, following steps are carried out in circulation:
The basic data obtaining is encrypted to algorithm, obtains pseudo random number;
The pseudo random number obtaining is encrypted to algorithm again as pseudo-random number seed at every turn, obtains pseudo-random number sequence.
Described cryptographic algorithm can be DES, 3DES, AES and RSA, but is not limited to this, the concrete DES that adopts in the present embodiment three.
In the present embodiment six, eeprom unit also can adopt more.Preferably, take that to be provided with nine eeprom unit in eeprom chip be example, one of them eeprom unit is counting unit, and other eight for using unit.Accordingly, in step 706, the value of described setting becomes 7.
Embodiment seven
Method based on Fig. 7 provides in embodiment six, the present embodiment provides a kind of and has extended the chip data generating device in useful life by eeprom, referring to Fig. 8, comprising: power module 80, judge module 81, set module 82, memory module 83, read module 84, calculating Variable Factors module 85, numerical value change module 86, computing module 87 and algoritic module 88; Above-mentioned judge module 81, set module 82, memory module 83, read module 84, calculating Variable Factors module 85, numerical value change module 86, computing module 87 and algoritic module 88 are all integrated on a chip.Described built-in chip type eeprom memory, described eeprom memory comprises that eeprom counting unit and eeprom are used unit, wherein, eeprom counting unit is used the sequence number of unit for storing described eeprom, eeprom is used unit to be used for storing numerical value, and the numerical value using for the first time writes in advance.
Read module 84, for reading the hardware sequence number of described chip and the described numerical value of its storage;
Calculate Variable Factors module 85, for according to described numerical value, by calculating Variable Factors, the detailed process of calculating Variable Factors is: the numerical value of the maximum times of the numerical value in Variable Factors=described counting unit * default+read;
Numerical value change module 86, for according to the operation rule of making an appointment, is used the numerical value of storing in unit to change to described eeprom, as adds 1 or subtract 1; Also for revising the numerical value of eeprom counting unit;
Algoritic module 88, for described operation values is carried out to hashing algorithm, obtains basic data.
As can be seen from the above description, above embodiment generates Variable Factors in several ways, has guaranteed that the basic data of each generation is all different, and then can ensure information security authentication and the fail safe that session key generates, and improves the reliability of information system.
Obviously, those skilled in the art should be understood that, above-mentioned each module of the present invention or each step can realize with general calculation element, they can concentrate on single calculation element, or be distributed on the network that a plurality of calculation elements form, alternatively, they can be realized with the executable program code of calculation element, thereby, they can be stored in storage device and be carried out by calculation element, and in some cases, can carry out shown or described step with the order being different from herein, or they are made into respectively to each integrated circuit modules, or a plurality of modules in them or step are made into single integrated circuit module to be realized.Like this, the present invention is not restricted to any specific hardware and software combination.
The foregoing is only the preferred embodiments of the present invention, be not limited to the present invention, for a person skilled in the art, the present invention can have various modifications and variations.Within the spirit and principles in the present invention all, any modification of doing, be equal to replacement, improvement etc., within all should being included in protection scope of the present invention.
Claims (16)
1. extend the chip data creation method in useful life, it is characterized in that, comprising:
Steps A: obtain Variable Factors according to the related information of storing in storage on chip;
Step B: the hardware sequence number that reads described chip;
Step C: described Variable Factors and described hardware sequence number are calculated to formation base data;
In steps A, also comprise the related information of revising described storage;
Wherein, describedly described Variable Factors and described hardware sequence number are calculated to formation base data comprise: described Variable Factors and described hardware sequence number are carried out to computing, obtain operation values; Described operation values is carried out to hashing algorithm, obtain basic data;
Or, describedly described Variable Factors and described hardware sequence number calculated to formation base data comprise: in described chip, generate random number, described random number and described Variable Factors are carried out to computing, obtain a median; Described median and described hardware sequence number are carried out to computing, obtain operation values; Described operation values is carried out to hashing algorithm, obtain basic data;
Wherein, described memory is flash memory, and described flash memory comprises a counting page and at least one use page; Wherein, described counting page is for storing the described erasable number of times that page is corresponding that uses, and described use page comprises a plurality of sections, and every section comprises a plurality of positions; Describedly according to the related information of storing in memory, obtain Variable Factors and comprise: query aim position calculate physical deflection value corresponding to described target bit in the use page of described flash memory, and read the erasable number of times in described counting page; According to described physical deflection value and described erasable number of times, calculate Variable Factors;
Or described memory is EEPROM (Electrically Erasable Programmable Read Only Memo); Described memory comprises a counting unit and at least one use unit; Wherein, the sequence number of described counting unit for storing described use unit, first numerical value writing in described use unit is initial value; Describedly according to the related information of storing in memory, obtain Variable Factors, be specially: according to the sequence number in described counting unit, determine the current use unit reading, read the numerical value in definite described use unit, according to described numerical generation Variable Factors; The related information of the described storage of described modification, is specially: revise the numerical value in described use unit, judge whether amended numerical value surpasses setting threshold, if so, the sequence number in described counting unit is adjusted into the next sequence number of using unit; If not, directly perform step A.
2. method according to claim 1, is characterized in that, is provided with and uses sign in described flash memory;
Described in the use page of described flash memory query aim position and calculate physical deflection value corresponding to described target bit before, described method also comprises:
According to described use sign, judge that whether described flash memory is for being used first;
If so, by the erasable number of times zero clearing in described counting page, and wipe described uses page, wipe after described uses page, in described use page, the numerical value of all is designated value, described use is set and is designated and uses;
If not, directly perform step A.
3. method according to claim 1, is characterized in that, described in the use page of described flash memory query aim position comprise:
According to the lookup method of setting, in described first position that is designated value of numerical value of searching storage in using page, the position for described designated value finding is defined as to target bit, and the value of target bit is revised as to the value beyond described designated value.
4. method according to claim 1, is characterized in that, described in the use page of described flash memory query aim position comprise:
According to the lookup method of setting, at the described numerical value of searching storage in using page, last is not the position of designated value, the next bit that is not the position of described designated value by last finding is defined as target bit, and the value of described target bit is revised as to described designated value value in addition.
5. according to the method described in claim 3 or 4, it is characterized in that, described designated value is 1, described target bit is revised as to described designated value value in addition and comprises: by described target bit zero clearing.
6. according to the method described in claim 3 or 4, it is characterized in that sequence number of described every section of correspondence;
The lookup method of described setting comprises:
From low sequence number section, to high sequence number segment search, be not the target phase of described designated value entirely, in described target phase, from a high position to low level, search target bit;
Or, from high sequence number section, to low high sequence number segment search, be not the target phase of described designated value entirely, in described target phase, from a high position to low level, search target bit;
Or, from low sequence number section, to high sequence number segment search, be not the target phase of described designated value entirely, in described target phase, from low level to a high position, search target bit;
Or, from height sequence number section, to low high sequence number segment search, be not the target phase of described designated value entirely, in described target phase, from low level to a high position, search target bit.
7. method according to claim 1, is characterized in that, when not finding the position that the numerical value of storage is designated value in described use page, described method also comprises:
Read the erasable number of times in described counting page and add 1, wiping described counting page;
The described erasable number of times adding after 1 is write to described counting page;
Described use page is wiped, wiped after described use page, in described use page, the numerical value of all positions is described designated value.
8. method according to claim 1, is characterized in that,
When described use page is while be a plurality of, described a plurality of use in page section sequence number be sequential organization successively.
9. method according to claim 1, is characterized in that, described memory is provided with and uses sign; Described according to the sequence number in described counting unit, determine the current use unit reading before, described method also comprises:
According to described use sign, judge that whether described memory is for using first;
If so, in described counting unit, write preset value, in described use unit, write described initial value, and described use is set is designated and uses;
If not, directly perform step A.
10. method according to claim 1, is characterized in that,
Numerical value in the described use of described modification unit comprises: the numerical value in described use unit is added to 1.
11. methods according to claim 1, is characterized in that, described computing is: XOR, splicing computing, combinatorial operation or sum operation.
12. methods according to claim 1, is characterized in that, described method also comprises:
Described basic data is calculated to pseudo random number;
The described pseudo random number obtaining is calculated again as new basic data at every turn, obtained pseudo-random number sequence.
13. methods according to claim 1, is characterized in that, described method also comprises: use described basic data to carry out information security operation.
14. 1 kinds extend the chip data generating device in useful life, it is characterized in that, comprising:
Memory module, for storing the hardware sequence number of related information and chip;
Variable Factors acquisition module, for obtaining described related information from described memory module, calculates Variable Factors according to described related information, also for upgrading described related information;
Sequence number read module, for reading the hardware sequence number of described chip from described memory module;
Basic data generation module, for calculating formation base data to described Variable Factors and described hardware sequence number;
Wherein, described device also comprises: random number module, for generating random number; Described basic data generation module, for calculating formation base data to described random number, described Variable Factors and described hardware sequence number;
Wherein, described memory module is flash memory, comprises a counting page and at least one use page, and described counting page is for storing an erasable number of times corresponding to described use page, and described use page comprises a plurality of sections, and each section comprises a plurality of positions; Described Variable Factors acquisition module comprises the first Variable Factors acquiring unit and the first updating block; Described the first Variable Factors acquiring unit, for searching target bit and calculate physical deflection value corresponding to described target bit at described use page, and read the erasable number of times in described counting page, according to described physical deflection value and described erasable number of times, calculate Variable Factors; Described the first updating block, for upgrading the definite target bit of described the first Variable Factors acquiring unit;
Or described memory module is EEPROM (Electrically Erasable Programmable Read Only Memo), described memory module comprises a counting unit and at least one use unit; Wherein, the sequence number of described counting unit for storing described use unit, first numerical value writing in described use unit is initial value; Described Variable Factors acquisition module comprises the second Variable Factors acquiring unit and the second updating block; Described the second Variable Factors acquiring unit, for determine the current use unit reading according to the sequence number of described counting unit, reads the numerical value in definite described use unit, according to described numerical generation Variable Factors; Described the second updating block, for revising the numerical value of described use unit, and judges whether amended described numerical value surpasses setting threshold, if so, and also for the sequence number of described counting unit being adjusted into the next sequence number of using unit.
15. devices according to claim 14, is characterized in that, described device also comprises:
Pseudo random number computing module, for calculating pseudo random number to described basic data;
Pseudo-random number sequence acquiring unit,, triggers described pseudo random number computing module and again calculates as new basic data for described pseudo random number that described pseudo random number computing module is obtained, obtains pseudo-random number sequence.
16. devices according to claim 14, is characterized in that, described device also comprises:
Operational module, carries out information security operation for the basic data of using described basic data generation module to generate.
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1540582A (en) * | 2003-04-22 | 2004-10-27 | 上海华园微电子技术有限公司 | Random number generator in IC circuit card and method for creating random initial value |
| CN1553349A (en) * | 2003-05-29 | 2004-12-08 | 联想(北京)有限公司 | Safety chip and information safety processor and processing method |
| CN102111265A (en) * | 2011-01-13 | 2011-06-29 | 中国电力科学研究院 | Method for encrypting embedded secure access module (ESAM) of power system acquisition terminal |
-
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1540582A (en) * | 2003-04-22 | 2004-10-27 | 上海华园微电子技术有限公司 | Random number generator in IC circuit card and method for creating random initial value |
| CN1553349A (en) * | 2003-05-29 | 2004-12-08 | 联想(北京)有限公司 | Safety chip and information safety processor and processing method |
| CN102111265A (en) * | 2011-01-13 | 2011-06-29 | 中国电力科学研究院 | Method for encrypting embedded secure access module (ESAM) of power system acquisition terminal |
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Effective date of registration: 20230712 Address after: Room 1505, Building B, Huizhi Building, No. 9 Xueqing Road, Haidian District, Beijing, 100085 Patentee after: BEIJING HONGSI ELECTRONIC TECHNOLOGY Co.,Ltd. Address before: 100085 17th floor, block B, Huizhi building, No.9 Xueqing Road, Haidian District, Beijing Patentee before: Feitian Technologies Co.,Ltd. |