CN102306706A - Multi-resistance-state resistance random access memory and method for implementing multiple resistance states utilizing same - Google Patents
Multi-resistance-state resistance random access memory and method for implementing multiple resistance states utilizing same Download PDFInfo
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- CN102306706A CN102306706A CN201110279718A CN201110279718A CN102306706A CN 102306706 A CN102306706 A CN 102306706A CN 201110279718 A CN201110279718 A CN 201110279718A CN 201110279718 A CN201110279718 A CN 201110279718A CN 102306706 A CN102306706 A CN 102306706A
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Abstract
The invention relates to the technical field of semiconductor manufacturing, and discloses a multi-resistance-state resistance random access memory. The memory comprises a top electrode, a resistance change layer and a bottom electrode from top to bottom, wherein the resistance change layer is an oxide. The invention also provides a method for implementing multiple resistance states by utilizing the memory. The multi-resistance-state resistance random access memory provided by the invention is a device in an MIM (metal-insulator-metal) structure based on a SiO2 material. Under an appropriate operation method, the device can generate multi-stage resistance states, multi-bit memory can be realized in a unit, and the memory density of the memory can be improved; and the material based on SiO2 is adopted for the resistance change layer of the multi-resistance-state resistance random access memory, the memory and the method provided by the invention have the advantages of simple technology and good processing compatibility with the CMOS (complementary metal-oxide-semiconductor transistor) technology.
Description
Technical field
The present invention relates to technical field of manufacturing semiconductors, be specifically related to a kind of many resistance states resistance-variable storing device and utilize it to realize the method for many resistance states.
Background technology
Traditional memory all utilizes binary system to accomplish information stores, and is promptly usually said 0 and 1, and along with the development of IC industry, market is also increasingly high for the performance requirement of memory---low-power consumption, high-speed, easy of integration and many-valued storage etc.In many-valued storage; Require each node can produce multiple (such as 4 kinds) stable state (being a plurality of resistance states) in resistance-variable storing device; Thereby it is corresponding one by one with different storing values; The application of many-valued memory technology can improve storage density, improves memory capacity, for the development of memory huge impetus is arranged.
Resistance-variable storing device is an a kind of new technology utilizing the material resistance value to change to carry out storage, and resistance state changes and can realize through applying bias.Resistance-variable storing device has advantages such as power consumption is little, operating voltage is low, read or write speed is fast, and resistance cashes to resemble simultaneously almost all has discovery in various types of materials, so resistance-variable storing device is considered to the strong competitor of novel memory of future generation.
The state exchange of resistance-variable storing device can be divided into Set and two processes of Reset; Set is meant the device process that (such as applying bias) got into low resistance state by high-impedance state under dynamic excitation; On the contrary, Reset is meant the device process that (such as applying bias) got into high-impedance state by low resistance state under dynamic excitation.Can be divided into one pole resistance-variable storing device and bipolar resistive random memory two big classes to resistance-variable storing device according to the direction that applies bias voltage; For the one pole resistance-variable storing device; Two bias voltage directions that apply among Set and the Reset are identical, and two bias voltages that for the bipolar resistive random memory, apply among Set and the Reset are in the opposite direction.
Based on SiO
2Resistance-variable storing device shown good bipolar resistive random characteristic, have low in energy consumption and the good advantage of processing compatibility, but fully research of its application aspect multivalued storage.
Summary of the invention
The technical problem that (one) will solve
Technical problem to be solved by this invention is: how to provide a kind of and can produce the multilevel resistance attitude, can in a unit, realize the multidigit storage, improve many resistance states resistance-variable storing device of the storage density of memory.
(2) technical scheme
For solving the problems of the technologies described above, the invention provides a kind of many resistance states resistance-variable storing device, comprise from top to bottom: top electrode, change resistance layer and hearth electrode, wherein said change resistance layer are oxide.
Preferably, said change resistance layer is SiO
2
Preferably, said top electrode is an active electrode, and said hearth electrode is the inert metal material.
Preferably, said top electrode is a metal material.
Preferably, said memory also comprises the substrate that is positioned at hearth electrode lower floor.
The present invention also provides a kind of method of utilizing described memory to realize many resistance states, may further comprise the steps:
S1, utilize the current scanning of big current limliting to accomplish Forming operation to memory device;
S2, carry out the operation of multistage resistance state, the operation of this multistage resistance state comprises two kinds of methods, and first kind of method of operation is: with said memory Reset is high-impedance state, and the Set scanning of then said memory being carried out different current limlitings is to obtain different low resistance states; Second kind of method of operation is: with said memory Set is low resistance state, and the Reset scanning of then said memory being carried out different pressure limitings is to obtain different high-impedance states.
Preferably, step S2 is specially:
In first kind of method of operation: utilize voltage scanning that device R eset is high-impedance state, the forward current through different current limlitings scans and obtains different low resistance states then; In second kind of method of operation; Utilize current scanning that said memory Set is low resistance state; Adopt different voltage limiting values that said memory is carried out voltage scanning then and obtain different high-impedance states, perhaps adopt the mode that said memory is carried out pulse scanning to obtain different high-impedance states.
(3) beneficial effect
Many resistance states of the present invention resistance-variable storing device is a kind of based on SiO
2The device of the mim structure of material, this device can produce the multilevel resistance attitude under suitable method of operation, can in a unit, realize the multidigit storage, and can improve the storage density of memory.The change resistance layer of many resistance states resistance-variable storing device adopts based on SiO
2Material, it is simple to have technology, the advantage good with the CMOS processing compatibility.
Description of drawings
Fig. 1 is the structural representation of many resistance states resistance-variable storing device of the embodiment of the invention;
Fig. 2 utilizes direct current scanning for the embodiment of the invention and realizes the test result figure of different low resistance states in the Set process;
Fig. 3 utilizes dc voltage sweep to realize the test result figure of different high-impedance states in the Reset process for the embodiment of the invention;
Fig. 4 utilizes potential pulse to realize the test result figure of different high-impedance states in the Reset process for the embodiment of the invention;
Fig. 5 is the test result figure of retention performance of the multilevel resistance attitude of the embodiment of the invention.
Embodiment
Regard to a kind of many resistance states resistance-variable storing device (also becoming multistage resistance-variable storing device) proposed by the invention down, specify in conjunction with accompanying drawing and embodiment.
Many resistance states resistance-variable storing device of the present invention is mim structure (MIM is meant the sandwich structure of being made up of metal, insulator, metal three-layer thin-film), comprises top electrode (TE), change resistance layer (for oxide) and hearth electrode (BE).The metal of top electrode and hearth electrode is by sputter, evaporation or the preparation of MOCVD methods such as (metallo-organic compound chemical gaseous phase depositions), SiO
2The chemical gaseous phase depositing process that is strengthened by plasma prepares.As shown in Figure 1, embodiments of the invention are Ag/SiO
2/ Pt/Ti/SiO
2The multistage resistance state resistance-change memory device of/Si structure.Utilize the bipolar resistive random characteristic of device, this resistance-variable storing device can produce four kinds of resistance states.In the preparation process, at first at SiO
2Utilize sputtering method to prepare the thick Ti adhesion layer of 20nm on the/Si substrate, the Pt that sputter 100nm is thick on it adopts plasma-reinforced chemical vapor deposition thick SiO of deposit 80nm on Pt then as hearth electrode
2Layer, the Ag that sputter 1000nm is thick afterwards carries out photoetching to top electrode at last as top electrode, forms 50 * 50um
2Device cell.
Resistance-variable storing device of the present invention realizes that the method for operation of many resistance states is following:
Mode of operation is divided into direct current scanning and pulse scans two kinds.At first utilize the direct current scanning (0.5mA) of big current limliting that original resistance-variable storing device is carried out the Forming operation.Next carry out the operation of multistage resistance state; Comprise two kinds of methods, in first kind of method of operation, device is in high-impedance state; Utilize forward scan to make device get into low resistance state (Set); Obtain different device low resistance states through applying different Set restriction electric currents, Set restriction electric current is big more in the certain limit, and the Resistance states that reaches is low more; In second kind of method of operation; Device is in low resistance state, utilizes reverse voltage scanning to make it get into high-impedance state (Reset), can make device get into different high-impedance states through the voltage limiting value that changes reverse voltage scanning; Within the specific limits, the resistance positive correlation of device behind voltage limiting value size and the Reset.Also can utilize potential pulse scanning to carry out.Device is in low resistance state, makes device get into high-impedance state through applying negative-going pulse voltage, and the different pulse amplitude can obtain different high-impedance states with width.
Concrete operation method is following:
For original resistance-variable storing device, carrying out need carrying out electric Forming process before the resistance state conversion, the condition of Forming is a current scanning, current limitation is 0.5mA.
First kind of method of operation is many resistance states realizations of Set process: be high-impedance state (2V voltage scanning) with device R eset, scan through different forward currents then and obtain three grades of different low resistance states that current limliting is respectively 500nA, 10uA, 100uA, sees accompanying drawing 2 earlier.Second kind of method of operation is many resistance states realizations of Reset process; Be low resistance state (adopting the 0.5mA current scanning) with device Set earlier; Then device is carried out the Reset operation, adopt three different negative bias values, be respectively-0.7V ,-1.2V ,-2.0V; Obtain three grades of different high-impedance states, see accompanying drawing 3.Also can utilize pulse scanning in the Reset process, to realize many resistance states: in the Reset process; Apply the pulse signal of different amplitudes; Pulsewidth is 500ms; Amplitude is respectively-1V ,-2V and-3V, obtained three different high-impedance states equally, resistance state distributes and sees accompanying drawing 4 (each pulse amplitude has been carried out 5 tests).Through aforesaid operations, based on SiO
2Memory can realize four Resistance states, the retention performance of each Resistance states is good, the result sees shown in the accompanying drawing 5.Above result is obtained with Agilent 4156c testing of equipment by Agilent 4200.
Can find out that by above embodiment through applying dynamic excitation, resistance of the present invention can saltus step between different resistance states, therefore can be used for realizing the many-valued storage of memory.
Above execution mode only is used to explain the present invention; And be not limitation of the present invention; The those of ordinary skill in relevant technologies field under the situation that does not break away from the spirit and scope of the present invention, can also be made various variations and modification; Therefore all technical schemes that are equal to also belong to category of the present invention, and scope of patent protection of the present invention should be defined by the claims.
Claims (7)
1. resistance state resistance-variable storing device more than a kind is characterized in that, comprises from top to bottom: top electrode, change resistance layer and hearth electrode, wherein said change resistance layer are oxide.
2. memory as claimed in claim 1 is characterized in that, said change resistance layer is SiO
2
3. memory as claimed in claim 1 is characterized in that, said top electrode is an active electrode, and said hearth electrode is the inert metal material.
4. memory as claimed in claim 3 is characterized in that, said top electrode is a metal material.
5. memory as claimed in claim 1 is characterized in that said memory also comprises the substrate that is positioned at hearth electrode lower floor.
6. a method of utilizing each described memory in the claim 1～5 to realize many resistance states is characterized in that, may further comprise the steps:
S1, utilize the direct current scanning of big current limliting that memory device is accomplished the Forming operation;
S2, carry out the operation of multistage resistance state, the operation of this multistage resistance state comprises two kinds of methods, and first kind of method of operation is: with said memory Reset is high-impedance state, and the Set scanning of then said memory being carried out different current limlitings is to obtain different low resistance states; Second kind of method of operation is: with said memory Set low resistance state, the Reset scanning of then said memory being carried out different pressure limitings is to obtain different high-impedance states.
7. method as claimed in claim 6 is characterized in that step S2 is specially:
In first kind of method of operation: utilize voltage scanning that device R eset is high-impedance state, the forward current through different current limlitings scans and obtains different low resistance states then; In second kind of method of operation; Utilize current scanning that said memory Set is low resistance state; Adopt different voltage limiting values that said memory is carried out voltage scanning then and obtain different high-impedance states, perhaps adopt the mode that said memory is carried out pulse scanning to obtain different high-impedance states.
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| CN102683586A (en) * | 2012-04-10 | 2012-09-19 | 北京大学 | Multiple-value resistance random access memory applicable to neural circuit and control method of resistance random access memory |
| CN103050623A (en) * | 2012-12-25 | 2013-04-17 | 华中科技大学 | Second-order memristor with multi-resistance state characteristic and modulation method thereof |
| CN103257848A (en) * | 2013-05-29 | 2013-08-21 | 北京大学 | Encoding method and encoder based on resistance random access memory |
| CN103337253A (en) * | 2013-05-29 | 2013-10-02 | 北京大学 | Cascade system and method of RRAM logic device |
| CN103579499A (en) * | 2012-08-10 | 2014-02-12 | 中国科学院微电子研究所 | Resistive random access memory device with rectification characteristic and manufacturing method thereof |
| CN103996790A (en) * | 2014-05-28 | 2014-08-20 | 河北大学 | Nanoscale three-state resistive random access memory and preparation method thereof |
| CN104103756A (en) * | 2014-07-25 | 2014-10-15 | 福州大学 | Resistive random access memory and method for realizing multi-value storage through the same |
| CN105552220A (en) * | 2015-12-15 | 2016-05-04 | 中国人民解放军国防科学技术大学 | Silicon oxide thin film based low power consumption resistive random access memory and preparation method therefor |
| CN107293642A (en) * | 2017-06-07 | 2017-10-24 | 华中科技大学 | One kind is based on HfO2‑xTwo-value and multivalue memristor, preparation method and applications |
| CN111462796A (en) * | 2020-05-07 | 2020-07-28 | 天津理工大学 | Multi-stage resistance state voltage regulation and control method for oxide thin film resistive random access memory |
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Cited By (14)
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| CN102683586B (en) * | 2012-04-10 | 2014-02-19 | 北京大学 | Multiple-value resistance random access memory applicable to neural circuit and control method of resistance random access memory |
| CN102683586A (en) * | 2012-04-10 | 2012-09-19 | 北京大学 | Multiple-value resistance random access memory applicable to neural circuit and control method of resistance random access memory |
| CN103579499A (en) * | 2012-08-10 | 2014-02-12 | 中国科学院微电子研究所 | Resistive random access memory device with rectification characteristic and manufacturing method thereof |
| CN103050623A (en) * | 2012-12-25 | 2013-04-17 | 华中科技大学 | Second-order memristor with multi-resistance state characteristic and modulation method thereof |
| CN103337253B (en) * | 2013-05-29 | 2016-02-03 | 北京大学 | A kind of cascade system of RRAM logical device and method |
| CN103257848A (en) * | 2013-05-29 | 2013-08-21 | 北京大学 | Encoding method and encoder based on resistance random access memory |
| CN103337253A (en) * | 2013-05-29 | 2013-10-02 | 北京大学 | Cascade system and method of RRAM logic device |
| CN103996790A (en) * | 2014-05-28 | 2014-08-20 | 河北大学 | Nanoscale three-state resistive random access memory and preparation method thereof |
| CN103996790B (en) * | 2014-05-28 | 2016-10-05 | 河北大学 | A kind of nanoscale tri-state resistance-variable storing device and preparation method thereof |
| CN104103756A (en) * | 2014-07-25 | 2014-10-15 | 福州大学 | Resistive random access memory and method for realizing multi-value storage through the same |
| CN104103756B (en) * | 2014-07-25 | 2018-05-04 | 福州大学 | A kind of resistance-variable storing device and the method that multilevel storage is realized using it |
| CN105552220A (en) * | 2015-12-15 | 2016-05-04 | 中国人民解放军国防科学技术大学 | Silicon oxide thin film based low power consumption resistive random access memory and preparation method therefor |
| CN107293642A (en) * | 2017-06-07 | 2017-10-24 | 华中科技大学 | One kind is based on HfO2‑xTwo-value and multivalue memristor, preparation method and applications |
| CN111462796A (en) * | 2020-05-07 | 2020-07-28 | 天津理工大学 | Multi-stage resistance state voltage regulation and control method for oxide thin film resistive random access memory |
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Application publication date: 20120104 |