CN102290371A - Method for removing optical resistance in contact hole preparation process - Google Patents
Method for removing optical resistance in contact hole preparation process Download PDFInfo
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- CN102290371A CN102290371A CN2011102574825A CN201110257482A CN102290371A CN 102290371 A CN102290371 A CN 102290371A CN 2011102574825 A CN2011102574825 A CN 2011102574825A CN 201110257482 A CN201110257482 A CN 201110257482A CN 102290371 A CN102290371 A CN 102290371A
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- contact hole
- insulating medium
- preparation process
- layer
- semiconductor device
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Abstract
The invention relates to a method for removing optical resistance in contact hole preparation process, which comprises the following steps: forming a conductive area of a semiconductor device; forming an insulating medium layer on the surface of the conductive area; forming an optical resistance layer with a contact hole pattern on the surface of the insulating medium layer; etching the insulating medium layer with the optical resistance layer as a covering film to form a contact hole communicated with the conductive area; and removing the optical resistance layer with mixture of oxygen and H2N2. By adopting the method, the CP2 yield of the semiconductor device can be improved effectively, and the rate of data storage failure can be decreased.
Description
Technical field
The present invention relates to a kind of contact hole (contact hole, CT) the removal method of photoresistance in the preparation process.
Background technology
The manufacturing process of semiconductor integrated circuit is extremely complicated, need on the silicon chip of a small size, produce the needed various electronic building bricks of particular electrical circuit, and need make suitable internal connecting line formation electric connection, the function of its desired realization of competence exertion at each inter-module.Wherein, (Contact Hole, CT), the quality of these contact hole performances is to the overall performance important influence of circuit in order to realize on the silicon chip electrical connection between multilayer circuit also needing to make a large amount of contact holes.
Along with the making of integrated circuit development to very lagre scale integrated circuit (VLSIC), the density of its internal circuit is increasing, number of elements constantly increases, device size constantly dwindles, when device dimensions shrink during to time micron dimension, correspondingly can produce many new problems, not not good as because of contact hole preparation technology, and cause semiconductor storage (data retention) performance for preparing not good.
The preparation method of the contact hole of prior art comprises the steps: to form the conduction region of semiconductor device; Surface at described conduction region forms insulating medium layer; Form on the surface of described insulating medium layer photoresist layer with contact hole pattern (Photo Resistor, PR); With described photoresist layer is mask, and the described insulating medium layer of etching forms the contact hole that is communicated with described conduction region; Aerating oxygen is removed the residual polymer (polymer) in (strip) described photoresist layer and described contact hole bottom.
Yet, in the large-scale semiconductive device, particularly in the microcontroller (MCU), adopt oxygen can not well remove the residual polymer of photoresist layer and contact hole bottom, cause CP2 yield (Yield) decline of semiconductor device and the rising of storage mortality.The A018 microcontroller of producing with GSMC company is an example, adopts the method for prior art, the CP2 yield tendency chart that records as shown in Figure 1, the storage mortality is as shown in Figure 2.As shown in Figure 1, adopt prior art to remove the method for contact hole photoresist layer, the mean value of the CP2 yield of the semiconductor device that records is 89.31%, and standard deviation is 12.05.As shown in Figure 2, adopt the method for prior art, the storage mortality of the semiconductor device that records is 7.70%, and standard deviation is 12.00.
Summary of the invention
The object of the present invention is to provide a kind of removal method that can improve the CP2 yield and reduce photoresistance in the contact hole preparation process of storage mortality.
The removal method of photoresistance in a kind of contact hole preparation process comprises the steps: to form the conduction region of semiconductor device; Surface at described conduction region forms insulating medium layer; Surface at described insulating medium layer forms the photoresist layer with contact hole pattern; With described photoresist layer is mask, and the described insulating medium layer of etching forms the contact hole that is communicated with described conduction region; Utilize oxygen and H
2N
2Mist remove described photoresist layer.
The preferred a kind of technical scheme of said method, described insulating medium layer is a silicon dioxide layer.
The preferred a kind of technical scheme of said method, described conduction region are source region or the drain region or the gate electrode of described semiconductor device.
Compared with prior art, method of the present invention adopts oxygen and H
2N
2Mist remove described photoresist layer, thereby can be good at removing the residual polymer of photoresist layer and contact hole bottom, can effectively improve in the semiconductor device preparation process CP2 yield and reduce the storage mortality.
Description of drawings
Fig. 1 is the CP2 yield tendency chart that adopts the semiconductor device that the method for prior art records.
Fig. 2 is the tendency chart that adopts the storage mortality of the semiconductor device that the method for prior art records.
Fig. 3 is the flow chart of the removal method of photoresistance in the contact hole preparation process of the present invention.
Fig. 4 is the CP2 yield tendency chart that adopts the semiconductor device that method of the present invention records.
Fig. 5 is the tendency chart that adopts the storage mortality of the semiconductor device that method of the present invention records.
Embodiment
For making the purpose, technical solutions and advantages of the present invention clearer, the present invention is described in further detail below in conjunction with accompanying drawing.
See also Fig. 3, Fig. 3 is the flow chart of the removal method of photoresistance in the contact hole preparation process of the present invention.The removal method of photoresistance comprises the steps: in the contact hole preparation process of the present invention
Form the conduction region of semiconductor device.Preferably, described conduction region can be source region or the drain region or the gate electrode of described semiconductor device, also can need contact hole to realize interconnected conductive layer for the interconnected conductor wire of described semiconductor device or other.
Surface at described conduction region forms insulating medium layer.Preferably, described insulating medium layer can be silicon dioxide layer, the perhaps dielectric layer of other types.Preferably, described insulating medium layer can be one deck, also can be the composite bed of multilayer.
Surface at described insulating medium layer forms the photoresist layer with contact hole pattern.This step can adopt the method for prior art photoetching photoresist layer to form, and does not repeat them here.
With described photoresist layer is mask, and the described insulating medium layer of etching forms the contact hole that is communicated with described conduction region.The method that this step can adopt prior art to form contact hole forms, and does not repeat them here.
Utilize oxygen and H
2N
2Mist remove described photoresist layer.
Compared with prior art, method of the present invention adopts oxygen and H
2N
2Mist remove described photoresist layer, thereby can be good at removing the residual polymer of photoresist layer and contact hole bottom.The A018 microcontroller of producing with GSMC company is an example, adopts method of the present invention, the CP2 yield tendency chart that records as shown in Figure 4, the storage mortality is as shown in Figure 5.As shown in Figure 4, adopt method of the present invention, the mean value of the CP2 yield of the semiconductor device that records is 96.44%, and standard deviation is 1.09.As shown in Figure 5, adopt method of the present invention, the storage mortality of the semiconductor device that records is 0.37%, and standard deviation is 0.47.
Under situation without departing from the spirit and scope of the present invention, can also constitute many very embodiment of big difference that have.Should be appreciated that except as defined by the appended claims, the present invention is not limited at the specific embodiment described in the specification.
Claims (3)
1. the removal method of photoresistance in the contact hole preparation process is characterized in that, comprises the steps:
Form the conduction region of semiconductor device;
Surface at described conduction region forms insulating medium layer;
Surface at described insulating medium layer forms the photoresist layer with contact hole pattern;
With described photoresist layer is mask, and the described insulating medium layer of etching forms the contact hole that is communicated with described conduction region;
Utilize oxygen and H
2N
2Mist remove described photoresist layer.
2. the removal method of photoresistance is characterized in that in the contact hole preparation process as claimed in claim 1, and described insulating medium layer is a silicon dioxide layer.
3. the removal method of photoresistance is characterized in that in the contact hole preparation process as claimed in claim 1, and described conduction region is source region or the drain region or the gate electrode of described semiconductor device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011102574825A CN102290371A (en) | 2011-09-01 | 2011-09-01 | Method for removing optical resistance in contact hole preparation process |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011102574825A CN102290371A (en) | 2011-09-01 | 2011-09-01 | Method for removing optical resistance in contact hole preparation process |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN102290371A true CN102290371A (en) | 2011-12-21 |
Family
ID=45336661
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2011102574825A Pending CN102290371A (en) | 2011-09-01 | 2011-09-01 | Method for removing optical resistance in contact hole preparation process |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN102290371A (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20020074012A (en) * | 2001-03-19 | 2002-09-28 | 삼성전자 주식회사 | An ashing process for forming via contact |
| CN1625800A (en) * | 2002-04-19 | 2005-06-08 | Psk有限公司 | Method for ashing |
| CN101777491A (en) * | 2009-01-09 | 2010-07-14 | 中芯国际集成电路制造(上海)有限公司 | Method for opening contact hole |
-
2011
- 2011-09-01 CN CN2011102574825A patent/CN102290371A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20020074012A (en) * | 2001-03-19 | 2002-09-28 | 삼성전자 주식회사 | An ashing process for forming via contact |
| CN1625800A (en) * | 2002-04-19 | 2005-06-08 | Psk有限公司 | Method for ashing |
| CN101777491A (en) * | 2009-01-09 | 2010-07-14 | 中芯国际集成电路制造(上海)有限公司 | Method for opening contact hole |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| ASS | Succession or assignment of patent right |
Owner name: SHANGHAI HUAHONG GRACE SEMICONDUCTOR MANUFACTURING Free format text: FORMER OWNER: HONGLI SEMICONDUCTOR MANUFACTURE CO LTD, SHANGHAI Effective date: 20140430 |
|
| C10 | Entry into substantive examination | ||
| C41 | Transfer of patent application or patent right or utility model | ||
| SE01 | Entry into force of request for substantive examination | ||
| TA01 | Transfer of patent application right |
Effective date of registration: 20140430 Address after: 201203 Shanghai Zhangjiang hi tech park Zuchongzhi Road No. 1399 Applicant after: Shanghai Huahong Grace Semiconductor Manufacturing Corporation Address before: 201203 Shanghai Guo Shou Jing Road, Pudong New Area Zhangjiang hi tech Park No. 818 Applicant before: Hongli Semiconductor Manufacture Co., Ltd., Shanghai |
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| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20111221 |