CN102281818B - Ultrasonic probe manufacturing method and ultrasonic probe - Google Patents
Ultrasonic probe manufacturing method and ultrasonic probe Download PDFInfo
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B06—GENERATING OR TRANSMITTING MECHANICAL VIBRATIONS IN GENERAL
- B06B—METHODS OR APPARATUS FOR GENERATING OR TRANSMITTING MECHANICAL VIBRATIONS OF INFRASONIC, SONIC, OR ULTRASONIC FREQUENCY, e.g. FOR PERFORMING MECHANICAL WORK IN GENERAL
- B06B1/00—Methods or apparatus for generating mechanical vibrations of infrasonic, sonic, or ultrasonic frequency
- B06B1/02—Methods or apparatus for generating mechanical vibrations of infrasonic, sonic, or ultrasonic frequency making use of electrical energy
- B06B1/0292—Electrostatic transducers, e.g. electret-type
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- Transducers For Ultrasonic Waves (AREA)
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Abstract
The manufacturing yield of semiconductor devices (CMUT) is improved. Before a polyimide film, which serves as a protection film, is formed, a membrane is caused to vibrate repetitively, thereby evaluating the withstand voltage between upper and lower electrodes. The upper electrode of any faulty CMUT cell, in which degradation in the withstand voltage between the upper and lower electrodes occurs due to the repetitive vibration of the membrane, is removed in advance, thereby electrically disconnecting the faulty CMUT from the other normal CMUT cells. As a result, in a block (RB) or a channel (RCH) including the CMUT cells (RC) as repaired, the degradation in the withstand voltage between the upper and lower electrodes is prevented from occurring after the repetitive vibration of the membrane.
Description
Technical field
The present invention relates to for example be applicable to manufacture method and ultrasound probe and the effective technology of ultrasound probe (ultrasonic transducer).
Background technology
Ultrasonic transducer such as the diagnostic equipment that is used for the tumor in human body etc.Up to now, mainly used the ultrasonic transducer of the vibration that utilizes piezoelectrics.Yet, be accompanied by the progress of MEMS (Micro Electro Mechanical System) technology in recent years, developing at present a kind of capacitance detecting type ultrasonic transducer (CMUT:CapacitiveMicromachined Ultrasonic Transducer) that has formed the vibration section on silicon substrate, wherein, this vibration section has the structure that sandwiches the hole between the two-layer electrode in up and down.
Compare with the ultrasonic transducer that has utilized piezoelectrics, CMUT has the advantages such as spendable hyperacoustic bandwidth or high-resolution.Have, CMUT is because can utilize LSI (LargeScale Integration) process technology to make, so can carry out microfabrication again.Therefore, be particularly useful for a ultrasonic element is arranged in array-like, control respectively the situation of row or column or control the two situation of row and column.Also have, identical with common LSI, can form ultrasonic element on silicon (Silicon) substrate, be also the advantage that CMUT possesses so can mix the signal processing circuit that year ultrasonic transmission/reception uses in a semiconductor chip.
About the technology of CMUT, for example disclosed by United States Patent (USP) 6271620B1 description (patent documentation 1).
In addition, following methods is disclosed in JP 2006-333952 communique (patent documentation 2): when detecting the CMUT unit of short circuit, the upper electrode raceway groove that comprises this bad CMUT unit can be connected to the signal input-output line, but only the upper electrode raceway groove of normal CMUT unit group be connected to the signal input-output line.
In addition, in JP 2006-343315 communique (patent documentation 3), following methods being disclosed: will connect the upper electrode part (spoke between adjacent CMUT unit, spoke) as fuse (fuse), the large electric current that flows through during by the short circuit of CMUT unit switches fuse, to stop the electrical connection of the CMUT unit after the short circuit, only remove thus the CMUT unit of this short circuit.
Patent documentation 1: United States Patent (USP) 6271620B1 description
Patent documentation 2: JP 2006-333952 communique
Patent documentation 3: JP 2006-343315 communique
By the inventor's research, understood that CMUT exists the various technical tasks of following explanation.
Utilize Figure 14～Figure 17 that basic structure and the action of the CMUT that the inventor studies are described.Figure 14 is the major part cutaway view of a ultrasonic element consisting of the CMUT of inventor's research (below be designated as CMUT unit), Figure 15 means the major part top view of the semiconductor chip integral body of the CMUT that has carried inventor's research, and Figure 16 and Figure 17 amplify the part of the CMUT cell array region of the inventor's research major part top view of laggard line display.
As shown in figure 14, on the top of lip-deep the first dielectric film 12 that is formed at semiconductor substrate 11, be formed with the lower electrode M1 of CMUT unit.Across the second dielectric film 14, be formed with hole section 15 on the top of lower electrode M1.Have again, be formed with the 3rd dielectric film 16 according to the mode of surrounding hole section 15, and be formed with upper electrode M2 on the top of the 3rd dielectric film 16.Also have, be formed with successively the 4th dielectric film 18, pentasyllabic quatrain velum 19 and polyimide film 21 on the top of upper electrode M2.
In addition, be formed with the bonding pad opening section of arriving at lower electrode M1 (omitting diagram) on the second dielectric film 14, the 3rd dielectric film 16, the 4th dielectric film 18, pentasyllabic quatrain velum 19 and the polyimide film 21 in the zone that does not form hole section 15 and upper electrode M2, can provide voltage to lower electrode M1 via this bonding pad opening section.In addition, be formed with the bonding pad opening section of arriving at upper electrode M2 (omitting diagram) on the 4th dielectric film 18, pentasyllabic quatrain velum 19 and polyimide film 21, can provide voltage to upper electrode M2 via this bonding pad opening section.Thin film (membrane) M of vibration is made of the 3rd dielectric film 16, upper electrode M2 and the 4th dielectric film 18 and the pentasyllabic quatrain velum 19 that are positioned at upper electrode M2 top when CMUT drives.
Then, the action of launching hyperacoustic action and transmission is described.If stack alternating voltage and DC voltage between upper electrode M2 and lower electrode M1, electrostatic force is between upper electrode M2 and lower electrode M1, and thin film M launches ultrasound wave because the frequency of the alternating voltage that applies produces vibration.
On the contrary, receiving in hyperacoustic situation, because arrive hyperacoustic pressure on the surface of thin film M, thin film M vibration.By this vibration, the distance between upper electrode M2 and lower electrode M1 changes, and therefore as the variation of the electric capacity between upper electrode M2 and lower electrode M1, can detect ultrasound wave.That is, the variation of the distance between upper electrode M2 and lower electrode M1 causes the capacitance variations between upper electrode M2 and lower electrode M1, current flowing thus.By detecting this electric current, thereby can detect ultrasound wave.
As Figure 15 and shown in Figure 16, in CMUT, first direction X and with the second direction Y of first direction quadrature on the CMUT unit C of specified quantity is configured to array-like, consist of thus the unit that is called as piece B.And then the piece B with specified quantity on first direction X and second direction Y is configured to array-like (CMUT cell array region CA), consists of a semiconductor chip 1.The length of the longitudinally of semiconductor chip 1 (second direction Y) is that the spacing d by the quantity of upper electrode M2 and piece B decides.Spacing d be for example CMUT unit C transmission sound wavelength X pact half.
Have again, for must be less with the area control of semiconductor chip 1 on the basis of guaranteeing enough transmission acoustic pressures, the flat shape of CMUT unit C is hexagon, also need CMUT unit C is configured to high-density, so CMUT unit C is configured to cellular (honeycomb).When the diagnosis that CMUT for example is used for carotid artery or the equidistant body surface of thyroid nearer position, for example use the frequency field of 5～10MHz left and right.In this situation, the inscribe diameter of a circle of hexagonal CMUT unit C for example is made as 50 μ m left and right.This CMUT unit C 4 of longitudinally (second direction Y) configurations, 8 of short direction (first direction X) configurations, thereby is consisted of 1 piece B (in Figure 16, for the purpose of simplifying the description, the unit number in 1 piece B being expressed as 4 * 4).This piece B is configured 192 on second direction Y, configuration is 16 on first direction X, to consist of semiconductor chip 1.Wherein, the unit that sometimes will arrange 16 piece B on first direction X is called the upper electrode raceway groove, and the unit that will arrange 192 piece B on second direction Y is called the lower electrode raceway groove.Exist 4 * 8 * 16=512 CMUT unit C in the upper electrode raceway groove.The area of semiconductor chip 1 is for example 4cm * 1cm.
In CMUT, expect that hyperacoustic transmitting-receiving is highly sensitive.In order to improve hyperacoustic transmitting-receiving sensitivity, from the vibration of transmission aspect needs increase thin film M, to obtain high transmission acoustic pressure.In the above-mentioned thin film M that vibrates by the voltage that applies between upper electrode M2 shown in Figure 14 and lower electrode M1, increase along with applying voltage, sending acoustic pressure can raise.That is to say, for example, be inscribed within the hexagon of the circle of diameter 50 μ m being shaped as of thin film M, and the thickness of the second dielectric film 14 and the 3rd dielectric film 16 is 0.2 μ m, the thickness of hole section 15 is in the situation of 0.1 μ m, in order to improve the transmission acoustic pressure, need to apply the high voltage more than 100V between upper electrode M2 and lower electrode M1.
Yet, the second dielectric film 14 of the clamping hole section 15 when having applied voltage between upper electrode M2 and lower electrode M1 and the distance (interval) of the 3rd dielectric film 16 are if become the second dielectric film 14 of the clamping hole section 15 when not applying voltage between upper electrode M2 and lower electrode M1 and 2/3 left and right of the distance (interval) of the 3rd dielectric film 16, the second dielectric film 14 contacts with the 3rd dielectric film 16, and thin film M moves.This phenomenon is called collapse (collapse), and the voltage that this contact is caused is called breakdown voltage.
According to the inventor's research as can be known, if the action that the second dielectric film 14 is contacted with the 3rd dielectric film 16, in a part of CMUT unit C, the dielectric voltage withstand of the second dielectric film 14 or the 3rd dielectric film 16 is deteriorated.Think that the reason that this dielectric voltage withstand reduces is: the injection from lower electrode M1 or upper electrode M2 to the electric charge of the second dielectric film 14 or the 3rd dielectric film 16, the second dielectric film 14 that the mechanical shock that perhaps causes because of the second dielectric film 14 and contacting of the 3rd dielectric film 16 causes or the formation of the fine structure defective in the 3rd dielectric film 16, perhaps the two combination etc.This second dielectric film 14 results from the 3rd contacting of dielectric film 16: the deviation of the thickness of the hole section 15 between each CMUT unit C; The deviation of the physical quantitys such as each thickness of the 3rd dielectric film 16 that perhaps consists of thin film M and upper electrode M2, the 4th dielectric film 18 that is positioned at upper electrode M2 top and pentasyllabic quatrain velum dielectric film 19 and polyimide film 21 or each internal stress, produce because breakdown voltage change, easily produce in than the low CMUT unit C of other CMUT unit C at breakdown voltage.
If the dielectric voltage withstand of the second dielectric film 14 or the 3rd dielectric film 16 is lower than the operation voltage of ultrasonic transducer, CMUT unit C produces insulation breakdown, in having produced the CMUT unit of insulation breakdown, becomes short-circuit condition between upper electrode M2 and lower electrode M.For example in the situation that produced destruction in CMUT unit Cb shown in Figure 17, in comprising the upper electrode raceway groove CHA of CMUT unit Cb, apply the desired voltage difficulty that becomes between upper electrode M2 and lower electrode M1, make diagnostic image deteriorated.The ultrasonic transducer that the medical ultrasound ripple diagnostic equipment is used needs the life-span of about several years, for example, must guarantee 5 * 10
11The palikinesia of the thin film M of inferior left and right.Therefore, be in need of relief comprise produced insulation breakdown CMUT unit Cb at interior upper electrode raceway groove CHA, perhaps detect the CMUT unit Cb of the probability that has the generation insulation breakdown and with its removal before reality is used.
In the CMUT of above-mentioned patent documentation 2 records, do not connect and comprise bad CMUT unit at interior upper electrode raceway groove and signal input-output line, but only connect upper electrode raceway groove and the signal input-output line of normal CMUT unit group.Yet, comprise bad CMUT unit and can not move at interior upper electrode raceway groove, can not carry out hyperacoustic transmitting-receiving at bad CMUT cell mesh.
Have, in the CMUT of above-mentioned patent documentation 3 records, the large electric current that flows through when utilizing the short circuit of CMUT unit cuts off spoke again, to stop the electrical connection of the CMUT unit after the short circuit, only removes thus the CMUT unit of this short circuit.Yet, exist the resistance of spoke to raise, impedance increases and the probability that causes receiving and dispatching sensitivity.Also have; when having produced the insulation breakdown of CMUT unit; not only produce spoke; also consider following unfavorable condition: consist of the CMUT unit thin film upper electrode or be located thereon dielectric film ejection, the distortion of section; the sound lens of CMUT or the shielding that is disposed on sound face protective layer contact with upper electrode with metal level; can produce new short circuit paths, perhaps produce the disengaging of bonding interface etc.
Summary of the invention
The object of the invention is to, a kind of technology that can improve the fabrication yield of semiconductor device (CMUT) is provided.
Can understand above-mentioned purpose of the present invention and other purposes and new feature according to description and the accompanying drawing of this description.
If the typical embodiment among simple declaration the application invention disclosed is as described below.
this embodiment is a kind of manufacture method that semiconductor device forms the ultrasound probe of ultrasound probe of installing, wherein, this semiconductor device is by providing potential difference between the upper electrode that configures across hole section and lower electrode, thereby with the element of upper electrode mechanical type action as a unit, has the piece that has configured the unit of specified quantity along first direction and with the second direction of first direction quadrature and formed on the first type surface of semiconductor substrate, upper electrode along a plurality of unit of the formation piece of first direction configuration is electrically connected, lower electrode along a plurality of unit of the formation piece of second direction configuration is electrically connected, on first direction and second direction with the rectangular piece that configured, the manufacture method of this ultrasound probe has: (a) after making the upper electrode action, measure the operation of the dielectric voltage withstand between upper electrode and lower electrode, (b) remove the operation that is judged as the upper electrode of bad unit in described (a) operation, (c) after described (b) operation, form the operation of protecting film on the first type surface of semiconductor substrate.
If simple declaration is as described below by the typical effect that embodiment obtains among the application's invention disclosed.
Can improve the fabrication yield of semiconductor device (CMUT).
Description of drawings
Fig. 1 means the major part top view of integral body of the semiconductor chip of the CMUT that carries embodiments of the present invention 1.
Fig. 2 amplifies with the part of the CMUT cell array region of embodiments of the present invention 1 the major part top view that represents afterwards.
Fig. 3 amplifies with the part of the piece of embodiments of the present invention 1 the major part top view that represents afterwards.
Fig. 4 is the major part cutaway view along the A-A ' line of Fig. 3 of embodiments of the present invention 1.
Fig. 5 is the major part cutaway view of CMUT unit of manufacturing process of the CMUT of explanation embodiments of the present invention 1.
Fig. 6 is the major part cutaway view of CMUT unit of manufacturing process of the CMUT of explanation embodiments of the present invention 1.
Fig. 7 is the major part cutaway view of CMUT unit of manufacturing process of the CMUT of explanation embodiments of the present invention 1.
The curve chart of one example of the upper electrode of measuring in Fig. 8 means in embodiments of the present invention 1 CMUT unit and the destruction characteristic of the dielectric film between lower electrode.
Fig. 9 means the major part top view of the CMUT unit of visual examination result after the thin film repetitive vibrations test of capacitance detecting type ultrasonic transducer.
Figure 10 is the major part cutaway view of CMUT unit of manufacturing process of the CMUT of explanation embodiments of the present invention 1.
Figure 11 is the major part cutaway view of CMUT unit of manufacturing process of the CMUT of explanation embodiments of the present invention 1.
Figure 12 be the explanation CMUT that carries present embodiment 2 semiconductor chip normal/flow chart of bad differentiation test and relief order.
Figure 13 is the key diagram of probe of diagnostic ultrasound equipment that has utilized the CMUT of embodiments of the present invention 2.
Figure 14 is the major part cutaway view of a CMUT unit that consists of the CMUT of inventor's research.
Figure 15 means the major part top view of integral body of the semiconductor chip of the CMUT that carries inventor's research.
Figure 16 amplifies with the part of the CMUT cell array region of the inventor's research major part top view that represents afterwards.
Figure 17 amplifies with the part of the CMUT cell array region of the inventor's research major part top view that represents afterwards.
Symbol description: 1-semiconductor chip; The 11-semiconductor substrate; 12-the first dielectric film; The 13-electrically conductive film; 14-the second dielectric film; 15-hole section; 15A-expendable film pattern; 16-the 3rd dielectric film; The 17-electrically conductive film; 18-the 4th dielectric film; 19-pentasyllabic quatrain velum; 20-hole (peristome); The 21-polyimide film; The 22-recess; The 51-probe; The 52-probing shell; 53-sound lens (sound face protective layer); The 54-cable; 55-electric screen layer; The B-piece; C-CMUT unit (ultrasonic element, oscillator, sensor element); The CA-CMUT cell array region; The Cb-CMUT unit; CHA-upper electrode raceway groove; The M-thin film; The M1-lower electrode; The M2-upper electrode; P1, P2-pad; RB-comprises the piece of the CMUT unit after reparation; CMUT unit after RC-repairs (reparation CMUT unit); RCH-comprises the upper electrode raceway groove of the CMUT unit after reparation; The SP-spoke; The bad CMUT of XC-unit; The XM-thin film.
The specific embodiment
In the following embodiments, the explanation convenience aspect whenever necessary, be divided into multistage or a plurality of embodiment describes, but except situation about expressing especially, these are not that it doesn't matter mutually, and having a side is the opposing party's part or all the relation of variation, details, supplementary notes etc.
In addition, in the following embodiments, in the situation that mention (the comprising number, numerical value, amount, scope etc.) such as quantity of key element, except situation about expressing especially or situation that clearly is defined as specific quantity on principle etc., being not limited to this specific quantity, can be below the above or specific quantity of specific quantity.And then in the following embodiments, its element (yet comprising key element step etc.) is not to be necessary except situation about expressing especially or clearly thinking on principle necessary situation etc.Equally, in the following embodiments, when mentioning the shape of element etc., position relationship etc., except situation about expressing especially or clearly thinking on principle the situation that is not such, also comprise in fact or similarly situation approximate with this shape etc.For above-mentioned numerical value and scope, this fact is also same.
Also have, in the accompanying drawing that following embodiment uses, even top view, the also additional shadow sometimes in order easily to observe accompanying drawing.Have again, in the following embodiments, when mentioning wafer, mainly refer to silicon (Silicon) monocrystal wafer, but be not only so, also mean SOI (Silicon On Insulator) wafer, be used for forming the insulating film substrate of integrated circuit etc. thereon.Its shape is not only also circle or is similar to circle, also comprises square, rectangle etc.
In addition, at the institute's drawings attached that is used for the following embodiment of explanation, give identical labelling to the key element with identical function in principle, and the repetitive description thereof will be omitted.Below, describe embodiments of the present invention in detail based on accompanying drawing.
(embodiment 1)
Utilize Fig. 1～Fig. 4 that the semiconductor device of present embodiment 1 is described.In present embodiment 1, be applicable to utilize for the invention that the inventor is carried out become the use of its background field, be that MEMS technology and the situation of the CMUT that produces describe.
Fig. 1 means the major part top view of the integral body of the semiconductor chip that carries CMUT, Fig. 2 amplifies with the part of CMUT cell array region the major part top view that represents afterwards, Fig. 3 amplifies with the part of piece the major part top view that represents afterwards, and Fig. 4 is the major part cutaway view along the A-A ' line of Fig. 3.
As shown in Figure 1, the flat shape of semiconductor chip 1 for example forms rectangle.The length of the longitudinally of semiconductor chip 1 (second direction Y) is for example the 4cm left and right, and the length of the width of semiconductor chip 1 (first direction X) is for example the 1cm left and right.Wherein, the planar dimension of semiconductor chip 1 is not limited to this, can carry out various changes, and for example the length of longitudinally (second direction Y) can be the 8cm left and right, and the length of width (first direction X) can be the 1.5cm left and right.
Dispose in CMUT cell array region CA a plurality of lower electrode M1, with a plurality of upper electrode M2, a plurality of CMUT unit (ultrasonic element, oscillator, sensor unit) C of lower electrode M1 quadrature.
A plurality of lower electrode M1 form respectively along the longitudinally (second direction Y) of semiconductor chip 1 and extend, alignment arrangements 16 roads (channel: the following ch that also is designated as) for example on the width (first direction X) of semiconductor chip 1.
Have, a plurality of lower electrode M1 are electrically connected to pad P1 respectively again.In the periphery of CMUT cell array region CA, be near the two ends of longitudinally (second direction Y) of semiconductor chip 1, according to the mode corresponding with lower electrode M1, along a plurality of pad P1 of width (first direction X) alignment arrangements of semiconductor chip 1.
A plurality of upper electrode M2 form respectively along the width (first direction X) of semiconductor chip 1 and extend, and for example alignment arrangements has 192ch on the longitudinally (second direction Y) of semiconductor chip 1.
Wherein, a plurality of upper electrode M2 are electrically connected to pad P2 respectively.In the periphery of CMUT cell array region CA, be near the two ends of width (first direction X) of semiconductor chip 1, according to the mode corresponding with upper electrode M2, along a plurality of pad P2 of longitudinally (second direction Y) alignment arrangements of semiconductor chip 1.
CMUT unit C for example is made of the electrostatic variable capacitance, is disposed at the intersection point place of lower electrode M1 and upper electrode M2.That is, a plurality of CMUT unit C are become rectangular (matrix, array) by alignment arrangements regularly in CMUT cell array region CA.In CMUT cell array region CA, at the intersection point place of lower electrode M1 and upper electrode M2, for example alignment arrangements has 32 CMUT unit C.The unit of these 32 CMUT unit C is called piece B.Therefore, CMUT cell array region CA is the zone that has formed a plurality of CMUT unit C, and semiconductor chip 1 is the semiconductor device that has the CMUT cell array region CA that has formed a plurality of CMUT unit C on first type surface.
In the present invention, purpose is: differentiate the bad CMUT unit in CMUT cell array region CA, upper electrode M2 by removing this bad CMUT unit also carries out electricity with remaining normal CMUT unit and separates, thereby make the whole regular event of CMUT cell array region CA, that is to say to make semiconductor chip 1 finished products.The labelling RC of Fig. 1 has represented to remove the upper electrode of bad CMUT unit, i.e. CMUT unit after repairing, and labelling RB represents to comprise the piece of the CMUT unit after reparation, and labelling RCH represents to comprise the upper electrode raceway groove of the CMUT unit after reparation.
Fig. 2 is the major part top view that represents after amplifying comprising near the CMUT cell array region CA of CMUT unit R C interior piece RB after reparation, and Fig. 3 is the major part top view that the CMUT unit R C after reparation represents after interior piece RB rejecting that comprises with Fig. 2.The upper electrode M2 of bad CMUT unit is removed the spoke SP's that arranges in order to be connected with adjacent CMUT unit C midway, and becoming disappears fully.That is to say, in the CMUT unit R C after reparation, the part of having removed the formation thin film in upper electrode M2 fully.
Fig. 4 is with the major part top view after A-A ' the section amplification of Fig. 3.Remove the upper electrode M2 of the formation thin film M that exists in above-mentioned common CMUT unit C shown in Figure 14, be positioned in addition the 4th dielectric film 18 and pentasyllabic quatrain velum 19 of upper electrode M2 top, filled polyimide film 21 in the recess of having removed these key elements.
Then, utilize Fig. 5～Figure 11, by the manufacture method of the CMUT unit of the order of operation explanation present embodiment 1.Fig. 5～Fig. 7 is the major part cutaway view of CMUT unit, Fig. 8 means the curve chart of an example of the destruction characteristic of the upper electrode measured and the dielectric film between lower electrode in the CMUT unit, Fig. 9 is the major part top view of bad CMUT unit, and Figure 10 and Figure 11 are the major part cutaway views of bad CMUT unit.
At first, as shown in Figure 5, prepare semiconductor substrate (being rounded semiconductor thin plate roughly when being called the overlooking of semiconductor wafer in this stage) 11.Semiconductor substrate 11 for example is made of monocrystal silicon.Then, form the first dielectric film 12 that is consisted of by silicon oxide film on whole of the first type surface of semiconductor substrate 11.The thickness of the first dielectric film 12 for example can be made as 0.8 μ m.
Then, form the electrically conductive film 13 that lower electrode forms use on the first dielectric film 12.Electrically conductive film 13 is formed on whole of first type surface of semiconductor substrate 11.Electrically conductive film 13 is made of the film of metal film or expression metallicity electric conductance, and for example the stacked film by the titanium nitride film that begins to form in order from the below, aluminum film and titanium nitride film consists of.This aluminum film is made of electric conductor films take aluminum as main component such as aluminum monomer film or aluminium alloy films.Electrically conductive film 13 for example can utilize sputtering method to form.Have again, in the situation that electrically conductive film 13 is made as the stacked film of titanium nitride film, aluminum film and titanium nitride film, because the aluminum film is the leading body film of lower electrode M1, after so the thickness of the Thickness Ratio titanium nitride film of aluminum film is also wanted, for example the thickness of aluminum film can be made as 0.6 about μ m, the thickness of each titanium nitride film of aluminum film up and down is made as 0.05 μ m left and right.Also have, also can replace titanium nitride film and use the stacked film of titanium film and titanium nitride film or tungsten film etc.
Then, for example utilize photoetching process and dry etching method to carry out patterning to electrically conductive film 13.Form lower electrode M1 by the electrically conductive film 13 after patterning.Then, on whole of the first type surface of semiconductor substrate 11 according to the mode that covers lower electrode M1, such as utilizing plasma CVD (Chemical Vapor Deposition) method to form such as the dielectric films such as silicon oxide film (omitting diagram).The thickness of fully being filled by above-mentioned dielectric film with the space of adjacent lower electrode M1 at this moment, is piled up dielectric film.Then, for example utilize CMP (Chemical Mechanical Polishing) method or deep etch (etch back) method, remove the lip-deep dielectric film of lower electrode M1, thereby the surface of lower electrode M1 is exposed, and dielectric film is remained between adjacent lower electrode M1.
Then, form the second dielectric film 14 at (that is, on the dielectric film between lower electrode M1 and adjacent lower electrode M1) on whole of the first type surface of semiconductor substrate 11.As the second dielectric film 14, for example adopt the silicon oxide film or silicon nitride film or its stacked film that form by plasma CVD method.In the situation that adopt the refractory metals such as tungsten or polysilicon film etc. as lower electrode M1, also can utilize the LPCVD method that can form the film finer and close than plasma CVD method.
Then, for example utilize plasma CVD method, (namely on the second dielectric film 14) forms the expendable film (omitting diagram) that for example is made of amorphous silicon film on whole of the first type surface of semiconductor substrate 11.By adopting for example photoetching (lithography) method and dry etching method to carry out patterning to this expendable film, thereby form expendable film pattern (hole section forms the expendable film pattern of use) 15A.Expendable film pattern 15A is formed on the top of lower electrode M1 across the second dielectric film 14.Expendable film pattern 15A is the pattern that is used to form hole section 15, and the flat shape of expendable film pattern 15A forms the flat shape identical with hole section 15.Therefore, form expendable film pattern 15A in the presumptive area that forms hole section 15.
Then, according to the mode that covers expendable film pattern 15A, form the 3rd dielectric film 16 on whole of the first type surface of semiconductor substrate 11.The 3rd dielectric film 16 is identical with the second dielectric film 14, for example can adopt the silicon oxide film or silicon nitride film or its stacked film that form by plasma CVD method.
Then, as shown in Figure 6, form the electrically conductive film 17 that upper electrode forms use on the 3rd dielectric film 16.Electrically conductive film 17 is formed on whole of first type surface of semiconductor substrate 11.Electrically conductive film 17 is made of the film of metal film or expression metallicity electric conductance, and for example the stacked film by the titanium nitride film that begins to form in order from the below, aluminum film and titanium nitride film consists of.This aluminum film is made of electric conductor films take aluminum as main component such as aluminum monomer film or aluminium alloy films.Electrically conductive film 17 for example can utilize sputtering method to form.Have, the thickness of the electrically conductive film 13 of the Thickness Ratio lower electrode formation use of the electrically conductive film 17 of upper electrode formation use is also thin, for example can be made as about 0.4 μ m again.Also have, in the situation that electrically conductive film 17 is made as the stacked film of titanium nitride film, aluminum film and titanium nitride film, because the aluminum film is the leading body film of upper electrode M2, after so the thickness of the Thickness Ratio titanium nitride film of aluminum film is also wanted, for example the thickness of aluminum film can be made as 0.3 about μ m, the thickness of each titanium nitride film of aluminum film up and down is made as 0.05 μ m left and right.Also have, also can replace titanium nitride film and use the stacked film of titanium film and titanium nitride film or tungsten film etc.
Then, for example utilize photoetching process and dry etching method to carry out patterning to electrically conductive film 17.Form upper electrode M2 by the electrically conductive film 17 after patterning.Then, according to the mode that covers upper electrode M2, form the 4th dielectric film 18 on whole of the first type surface of semiconductor substrate 11.The 4th dielectric film 18 for example can using plasma CVD method form such as being made of silicon nitride film etc.In addition, the thickness of the 4th dielectric film 18 for example can be made as about 0.5 μ m.
Then, for example adopt photoetching process and dry etching method, the hole (peristome) 20 that form to arrive expendable film pattern 15A and the part of expendable film pattern 15A is exposed on the 3rd dielectric film 16 and the 4th dielectric film 18.The position that hole 20 is formed on when overlooking and expendable film pattern 15A is overlapping, the part of expendable film pattern 15A is exposed in 20 bottom in the hole.
Then, as shown in Figure 7, by hole 20, utilize the dry etching method of xenon fluoride (XeF2) etc. such as employing, optionally expendable film pattern 15A has been carried out etching.Thus, optionally remove expendable film pattern 15A, the zone that expendable film pattern 15A existed becomes hole section 15, forms hole section 15 between the second dielectric film 14 and the 3rd expendable film 16.Except the dry etching method that has utilized xenon fluoride (XeF2), also can adopt dry etching method that has utilized ClF3 etc., remove expendable film pattern 15A and form hole section 15.Thus, hole section 15 is formed on the top of lower electrode M1 according to from top observe the time with the overlapping mode of lower electrode M1, upper electrode M2 according to from top observation the time and the overlapping mode of hole section 15 be formed on the top of hole section 15.
Then, (namely on the 4th dielectric film 18) forms pentasyllabic quatrain velum 19 on whole of the first type surface of semiconductor substrate 11.Thus, the part of pentasyllabic quatrain velum 19 can be imbedded the inside in hole 20, can plugging hole 20.Pentasyllabic quatrain velum 19 for example is made of silicon nitride film, can using plasma CVD method etc. formation.Have, the thickness of pentasyllabic quatrain velum 19 for example can be made as about 0.8 μ m again.Be formed in the thin film M that vibrates when CMUT drives by the 3rd dielectric film 16, upper electrode M2, the 4th dielectric film 18 and the pentasyllabic quatrain velum 19 that is positioned at hole section 15 tops.
Then; take the relief of the waste product that causes because of the insulation breakdown that makes upper electrode M2 after the palikinesia of CMUT chip and the second dielectric film 14 between lower electrode M1 and the 3rd dielectric film 16 as main purpose; before the polyimide film that forms as protecting film, carry out the removing of upper electrode M2 of the detection of bad CMUT unit and detected bad CMUT unit.Below, the method for removing of the upper electrode M2 of the detection method of bad CMUT unit and bad CMUT unit is described.
At first, make after thin film M vibrates repeatedly according to the rules condition, measure the second dielectric film 14 between upper electrode M2 and lower electrode M1 and the dielectric voltage withstand of the 3rd dielectric film 16.
Fig. 8 means the curve chart of an example of the destruction characteristic of the upper electrode M2 that measures and the dielectric film between lower electrode M1 (the second dielectric film 14 and the 3rd dielectric film 16) in above-mentioned CMUT unit C shown in Figure 7.The longitudinal axis of Fig. 8 represents the relative accumulative total number of degrees of insulation breakdown, and transverse axis represents dielectric voltage withstand.
Apply for example DC voltage of 100V to lower electrode M1, for example apply the alternating voltage of 60V (peak value to peak value as 120V) take amplitude to upper electrode M2, make thin film M repeatedly vibrate 1 * 10
10Inferior.Then, lower electrode M1 is set as earthing potential, M2 applies DC voltage to upper electrode, according to the dielectric voltage withstand (this test is called AC pressure (stress) test) of the second dielectric film 14 between each piece B measurement upper electrode M2 and lower electrode M1 and the 3rd dielectric film 16.Wherein, before the vibration repeatedly of carrying out thin film M, between upper electrode M2 and lower electrode M1, apply DC voltage between 10 seconds with 200V, confirm not leakage in the second dielectric film 14 between upper electrode M2 and lower electrode M1 and the 3rd dielectric film 16.
As shown in Figure 8, in measured nearly all piece B, the dielectric voltage withstand between upper electrode M2 and lower electrode M1 is more than 270V, but in 1 piece B, dielectric voltage withstand drops to 170V.The piece B that this species specific dielectric voltage withstand descends has the more tendencies that just more can increase of vibration number, but 1 * 10
10Inferior reaching capacity be not even the above number of times of this numerical value of repetitive vibrations has to find larger difference yet aspect percent defective.
Make thin film M repeatedly vibrate after (after the AC pressure test), the piece B that descends of dielectric voltage withstand that utilized observation by light microscope, thereby confirm: produce insulation breakdown and short circuit between upper electrode M2 and lower electrode M1, and as shown in Figure 9, the part of the thin film XM of bad CMUT unit XC produces physical property destruction.
Then, by removing the thin film of bad CMUT unit, from around normal CMUT unit electric malsegregation CMUT unit, relief comprise produced insulation breakdown bad CMUT unit at interior piece.
At first, as shown in figure 10, for example to the bad CMUT unit illumination wavelength 355nm that has produced insulation breakdown, the ultraviolet light pulse laser of pulse width 3ns, remove the 4th dielectric film 18 and the pentasyllabic quatrain velum 19 that is present on upper electrode M2.At this moment, make laser focusing and shine than upper electrode M2 also the zone of a large circle (zone of the dotted line of above-mentioned Fig. 3, the recess of labelling 22 expression of Figure 10).Although the heat time heating time based on this laser irradiation is short, its power density reaches hundreds of MW/cm
2, the part of illuminated laser is the situation evaporation with outburst in the heated while.Because heat time heating time is short, so heat can not be delivered to by beyond the part of laser irradiation, can not evaporate.
Then, as shown in figure 11, utilize the ultraviolet light pulse laser of identical wavelength, remove after making the upper electrode M2 evaporation with the part almost identical zone of before having removed.At this moment, remove all or part of of the spoke that is connected with the upper electrode M2 of bad CMUT unit.Upper electrode M2 remove end before, because laser sees through the 3rd dielectric film 16, hole section 15, the second dielectric film 14 that is present under upper electrode M2, so the lower electrode M1 of hole section 15 belows melts a little sometimes, but because the area that sees through of laser is little, so can not exert an influence to other normal CMUT unit.
Then, as shown in Figure 4 above, on whole of the first type surface of semiconductor substrate 11 coating have insulating properties protecting film, be polyimide film 21, with filling removed upper electrode M2, the 4th dielectric film 18 and pentasyllabic quatrain velum 19 part, be recess 22.
, when applying DC voltage between 10 seconds with 200V carrying out test for short-circuit between upper electrode M2 and lower electrode M1, find to leak for the interior piece for the CMUT unit R C after comprising reparation.Then, again apply for example DC voltage of 100V to lower electrode M1, for example apply the alternating voltage of 60V (peak value to peak value as 120V) take amplitude to upper electrode M2, make thin film M repeatedly vibrate 1 * 10
10Inferior, when the second dielectric film 14 between evaluation upper electrode M2 and lower electrode M1 and the dielectric voltage withstand of the 3rd dielectric film 16, become 270V, obtained the dielectric voltage withstand equal with other pieces B.
like this, according to present embodiment 1, before the polyimide film 21 that forms as protecting film, make thin film M repeatedly vibrate to estimate dielectric voltage withstand between upper electrode M2 and lower electrode M1, remove in advance vibration repeatedly because of thin film M has produced the bad CMUT unit of dielectric voltage withstand reduction between upper electrode M2 and lower electrode M1 upper electrode M2, disconnection is electrically connected to other normal CMUT unit, thereby in the piece B or raceway groove that comprise bad CMUT unit, can prevent that upper electrode M2 and the dielectric voltage withstand between lower electrode M1 after thin film M repetitive vibrations from reducing.Thus, can improve the fabrication yield of CMUT.
(embodiment 2)
In present embodiment 2, a series of orders of removing of the upper electrode M2 of the differentiation of the bad CMUT unit that has produced between upper electrode M2 and lower electrode M1 for thin film M is vibrated repeatedly that dielectric voltage withstand reduces and this bad CMUT unit are described.Figure 12 represent to illustrate the CMUT that carries present embodiment 2 semiconductor chip normal/flow chart of bad differentiation test and relief order.
At first, in protecting film (for example, the above-mentioned polyimide film 21 shown in Figure 7) operation before that forms the CMUT unit, finish wafer technique.Then, for example apply the DC voltage (DC pressure applies (1)) between 10 seconds between upper electrode M2 and lower electrode M1 with 200V, then for example apply the voltage of 20V between upper electrode M2 and lower electrode M1, thereby check the short circuit between upper electrode M2 and lower electrode M1.In the situation that there is short circuit, use the outward appearance of the observation location of short circuit (bad address) such as optical microscope.As a result, in the situation that the difference of height section of lower electrode M1 observes location of short circuit, because produced insulation breakdown in a plurality of adjacent B, so relief is more difficult, therefore will confirm that the semiconductor chip of short circuit is judged as defective products.Have again, even in the situation that observe location of short circuit in thin film M, when having confirmed insulation breakdown in a plurality of CMUT unit, if carry out removing of upper electrode M2 based on laser irradiation, exist when diagnostic imaging and produce the probability that image is omitted, so will confirm that the semiconductor chip of short circuit is judged as defective products.Observe location of short circuit in thin film M, and in the situation that confirmed insulation breakdown in 1 CMUT unit, by removing upper electrode M2, comprise this bad CMUT unit in the probability of interior raceway groove thereby exist to relieve, therefore enter next operation, be the Laser Processing operation.
Then, embodiment 1 described above is described, to the bad CMUT unit irradiated with pulse laser of insulation breakdown, remove the upper electrode M2 that consists of bad CMUT unit and the dielectric film (for example, above-mentioned the 4th dielectric film 18 and pentasyllabic quatrain velum 19 shown in Figure 7) on its top.
Then, apply DC voltage between upper electrode M2 and lower electrode M1, in the situation that there is short circuit, semiconductor chip is judged as the defective products that to repair, in the situation that enter next operation, be that AC pressure applies operation without short circuit.
In AC pressure applies operation, as described in above-mentioned embodiment 1, apply for example DC voltage of 100V to lower electrode M1, for example apply the alternating voltage of 60V (peak value to peak value as 120V) take amplitude to upper electrode M2, make thin film M repeatedly vibrate 1 * 10
10Inferior.This test is carried out take raceway groove or piece as unit.
After AC pressure applies, again for example apply the DC voltage (DC pressure applies (2)) between 10 seconds with 200V between upper electrode M2 and lower electrode M1, then for example apply the voltage of 20V between upper electrode M2 and lower electrode M1, check thus the short circuit between upper electrode M2 and lower electrode M1.When AC pressure applies, comparing with other CMUT unit, in the situation that the upper electrode M2 of thin film M and lower electrode M1 vibrate byer force, apply in (2) at DC pressure and cause insulation breakdown, perhaps compare with other CMUT unit in test for short-circuit and measure large leakage.
In the situation that AC pressure has produced insulation breakdown in applying, perhaps in the situation that applying (2), DC pressure has afterwards short circuit, utilize the outward appearance of the observation location of short circuit (bad address) such as optical microscope.As a result, in the situation that the difference of height section of lower electrode M1 observes location of short circuit, because produced insulation breakdown in a plurality of adjacent B, so relief is more difficult, therefore will confirm that the semiconductor chip of short circuit is judged as defective products.Have again, even in the situation that observe location of short circuit in thin film M, when having confirmed insulation breakdown in a plurality of CMUT unit, if carry out removing of upper electrode M2 based on laser irradiation, exist when diagnostic imaging and produce the probability that image is omitted, so will confirm that the semiconductor chip of short circuit is judged as defective products.Observe location of short circuit in thin film M, and in the situation that confirmed insulation breakdown in 1 CMUT unit, existence can be relieved and comprises this bad CMUT unit in the probability of interior raceway groove by being removed upper electrode M2, therefore enters next operation, is the Laser Processing operation.
Then, embodiment 1 described above is described, to the bad CMUT unit irradiated with pulse laser of insulation breakdown, remove the upper electrode M2 that consists of bad CMUT unit and the dielectric film (for example, above-mentioned the 4th dielectric film 18 and pentasyllabic quatrain velum 19 shown in Figure 7) on its top.
Then; apply DC voltage between upper electrode M2 and lower electrode M1, in the situation that there is short circuit, semiconductor chip is judged as defective products; in the situation that without short circuit, semiconductor chip is judged as finished product, enters next operation, be accumulation and the patterning operation of protecting film.By above operation, the CMUT unit of having removed upper electrode M2 by laser irradiation becomes the section shape shown in above-mentioned Fig. 4.
Like this, according to present embodiment 2, because utilize the test step of wafer to detect because of the upper electrode M2 that repeatedly vibrates generation specifically of thin film M and the bad CMUT unit of the reduction of the dielectric voltage withstand between lower electrode M1, and can repair so bad CMUT unit, so can improve the fabrication yield of the semiconductor device that has carried CMUT.
Then, the explanation CMUT that will pass through the test of present embodiment 2 is applicable to the situation in diagnostic ultrasound equipment for example.
Diagnostic ultrasound equipment is the permeability that utilizes sound wave, and utilizes the ultrasound wave surpassed the audible sound scope, and the organism inside that can't see is from the outside carried out image conversion in real time, thus medical-diagnosis device that can be visual.The outside drawing of the probe of this diagnostic ultrasound equipment shown in Figure 13 (probe).
In the present invention, make after thin film vibrates repeatedly, removing the upper electrode of the CMUT unit that has produced insulation breakdown in thin film fully, forming dielectric film in the part after removing.Therefore, be insulated in the CMUT unit of destruction at thin film, upper electrode and electric screen layer 55 can short circuits.
When carrying out ultrasonic diagnosis, be placed on body surface (surface of health) afterwards at 51 the front end (sound lens 53 sides) of popping one's head in, scan when making this probe slowly be offset a little position.At this moment, launch the ultrasonic pulse of several MHz from the probe 51 that is placed on body surface in organism, and receive the echo from the different tissue of acoustic impedance.Thus, obtain the tomograph of bio-tissue, therefore can know the information relevant to the object position.According to from the emission ultrasound wave to the interval that receives till sound wave, can obtain the range information of reflector.Have again, can be according to level or the profile of echo, obtain the information relevant to the existence of reflector or quality.
As mentioned above, understand specifically based on embodiment the invention that the inventor completes, but the present invention is not limited to above-mentioned embodiment, certainly can carry out without departing from the spirit and scope of the present invention various changes.
For example, in above-mentioned embodiment 1, after forming pentasyllabic quatrain velum 19, carry out the vibration test repeatedly of thin film M, the lowered CMUT of dielectric voltage withstand unit to the second dielectric film 14 between upper electrode M2 and lower electrode M1 or the 3rd dielectric film 16, carry out removing of upper electrode M2, the 4th dielectric film 18 and pentasyllabic quatrain velum 19, then formed polyimide film 21, but also can carry out the vibration test repeatedly of thin film M after forming polyimide film 21.At this moment, in the lowered CMUT of the dielectric voltage withstand unit of the second dielectric film 14 between upper electrode M2 and lower electrode M1 or the 3rd dielectric film 16, at first need to utilize laser irradiation to remove the polyimide film that is positioned on pentasyllabic quatrain velum 19.And then; because need to form the protecting film with insulating properties in the part after removing; so will again form polyimide film, but need adjust the thickness of 2 strata acid imide films, so that the vibration of the thin film M of the CMUT unit of not removing reaches desired value.
Have, in above-mentioned embodiment 1, the superiors in the CMUT unit have formed polyimide film 21 again, but so long as have insulating properties and can play the film of the effect of protecting film, just are not limited to this.As the material that replaces polyimide film 21, such as enumerating silicon oxide film, silicon nitride film or parylene film etc.
Also have, formation and the material of the CMUT unit shown in above-mentioned embodiment 1 show a kind of of its combination.For example, the shape of the CMUT unit shown in above-mentioned embodiment 1 is hexagon, but shape is not limited to this, can be for example circular, can be also quadrangle.In addition, all configured dielectric film (the second dielectric film 14 and the 3rd dielectric film 16) at lower electrode M1 and hole section 15, upper electrode M2 and hole section 15, but dielectric film can be also either party wherein.
In addition, in above-mentioned embodiment 1, cut apart by first direction X take lower electrode M1 and be illustrated along the so-called 1.5D type array that extends with the second direction Y of first direction X quadrature as example, but be not limited to this, for example, can be also lower electrode M1 not divided 1D type cell array in semiconductor chip 1.In this situation, in lower electrode M1, can replace conducting film and adopt silicon substrate.Having, can be also cut apart lower electrode M1 and can independently execute alive 2D type cell array according to each piece B again.In addition, also can replace the up and down of the layer of M1, M2.
Have again, in above-mentioned embodiment 2, when the test of selecting the semiconductor chip that has carried CMUT and finished product/defective products, in test for short-circuit, when having found destruction in a plurality of CMUT unit, semiconductor chip is judged as defective products, but so long as for diagnostic image no problem level, even the destruction of a plurality of CMUT unit also can be with semiconductor chip as finished product.
In addition, in above-mentioned embodiment 2, carried out the vibration test repeatedly of thin film M with the state of wafer, and checked the dielectric voltage withstand of the dielectric film between upper electrode M2 and lower electrode M1, carry out thus the reparation of the lowered CMUT of dielectric voltage withstand unit, but also can implement a series of test, reparing process with the state of the chip after cutting or the state that is installed in the probe (probe) of diagnostic ultrasound equipment.In the situation that implement a series of test, reparing process with the state in the probe (probe) that is installed to diagnostic ultrasound equipment, the outward appearance of carrying out bad position after bonding sound lens is observed or is more difficult based on the reparation of laser irradiation, therefore wishes it is operations before bonding sound lens.
In addition, in above-mentioned embodiment 1 and 2, the lowered CMUT of dielectric voltage withstand unit irradiated with pulse laser to the second dielectric film 14 between upper electrode M2 and lower electrode M1 or the 3rd dielectric film 16 is removed, but also can replace laser, but utilize focus ion beam (FIB) to remove.
In addition, in above-mentioned embodiment 1 and 2, illustration will carry CMUT semiconductor chip 1 be applicable to situation in the probe of the medical ultrasonic diagnostic equipment.Therefore, the CMUT unit has hyperacoustic transmission and receives two kinds of functions.But the present application is not limited to this, and the CMUT unit also can only have a function in sending or receiving.Have, the semiconductor chip 1 that has carried CMUT is not limited to medical, also goes for the sending and receivings such as non-destructive testing apparatus or ultrasonic microscope, ultrasonic flowmeter or receives and dispatches in hyperacoustic other equipment again.
The present invention can be used in the inner flaw detection apparatus of the various medical diagnostic equipments, the machinery that adopt ultrasound probe, based on hyperacoustic various imaging device systems (detection of barrier etc.), position detecting system, temperature distribution measuring system, Flow Measuring System etc.
Claims (14)
1. the manufacture method of a ultrasound probe, that the manufacture method that semiconductor device forms the ultrasound probe of ultrasound probe is installed, wherein, this semiconductor device is made of a plurality of semiconductor units, each semiconductor unit has lip-deep the 1st dielectric film (12) that is formed on semiconductor substrate, be formed on the lower electrode on the top of described the 1st dielectric film (12), be formed on the hole section on the top of described lower electrode, the 2nd dielectric film (16) that forms according to the mode of surrounding described hole section, be formed on the upper electrode on the top of the 2nd dielectric film (16), and described upper electrode top the 3rd dielectric film (18) and the 4th dielectric film (19) that form successively, by providing potential difference between the described upper electrode of described hole section configuration and described lower electrode, thereby described upper electrode mechanical type is moved, by described the 2nd dielectric film (16), described upper electrode, the element that described the 3rd dielectric film (18) and described the 4th dielectric film (19) consist of is as a thin film, has the piece that has configured the described semiconductor unit of specified quantity along first direction and with the second direction of described first direction quadrature and formed on the first type surface of described semiconductor substrate, described upper electrode along a plurality of semiconductor units of described of the formation of described first direction configuration is electrically connected by spoke, described lower electrode along a plurality of semiconductor units of described of the formation of described second direction configuration is electrically connected, configured described with rectangular on described first direction and described second direction, the manufacture method of this ultrasound probe is characterised in that, have:
(a) form described the 3rd dielectric film (18) of the described upper electrode of covering and the operation of described the 4th dielectric film (19) on the first type surface of described semiconductor substrate;
(b) after making described upper electrode action, measure the operation of the dielectric voltage withstand between described upper electrode and described lower electrode;
(c) remove the operation that is judged as the described upper electrode of bad described semiconductor unit in described (b) operation; With
(d) after described (c) operation, form the operation of protecting film on the first type surface of described semiconductor substrate.
2. the manufacture method of ultrasound probe according to claim 1, is characterized in that,
Described hole section forms with described lower electrode overlapping above described lower electrode,
Described upper electrode forms with described hole section overlapping above the section of described hole.
3. the manufacture method of ultrasound probe according to claim 1, is characterized in that,
Be formed with the 2nd ' dielectric film (14) between described lower electrode and described hole section.
4. the manufacture method of ultrasound probe according to claim 1, is characterized in that,
In described (c) operation, remove the whole or a part of of the described spoke that is connected with the described upper electrode that is judged as described bad described semiconductor unit.
5. the manufacture method of ultrasound probe according to claim 1, is characterized in that,
In described (c) operation, removed described the 3rd dielectric film (18) that forms and described the 4th dielectric film (19) afterwards in described (a) operation, removed with the described upper electrode that is judged as described bad described semiconductor unit and be judged as the whole or a part of of described spoke that the described upper electrode of described bad described semiconductor unit is connected.
6. the manufacture method of ultrasound probe according to claim 1, is characterized in that,
In described (c) operation, utilize any of pulse laser or focus ion beam, remove the described upper electrode that is judged as described bad described semiconductor unit.
7. the manufacture method of ultrasound probe according to claim 1, is characterized in that,
With wafer state, chip status or be installed to the state of the probe of diagnostic ultrasound equipment, carry out the removing of the described upper electrode that is judged as described bad described semiconductor unit in described (c) operation.
8. the manufacture method of ultrasound probe according to claim 1, is characterized in that,
In described (b) operation, apply DC voltage to described lower electrode, apply alternating voltage to described upper electrode, thereby make after described upper electrode vibrates repeatedly, apply DC voltage between described upper electrode and described lower electrode, measure the dielectric voltage withstand between described upper electrode and described lower electrode.
9. the manufacture method of ultrasound probe according to claim 1, is characterized in that,
Also have (e) and apply DC voltage after described (d) operation between described upper electrode and described lower electrode, thereby inspection has or not the operation of short circuit between described upper electrode and described lower electrode.
10. the manufacture method of ultrasound probe according to claim 1, is characterized in that,
Described protecting film is polyimide film, silicon oxide film, silicon nitride film or parylene film.
11. the manufacture method of ultrasound probe according to claim 1 is characterized in that,
Described protecting film is by 1 layer or 2 layers of dielectric film that consists of.
12. the manufacture method of ultrasound probe according to claim 1 is characterized in that,
Consist of the array that a plurality of semiconductor units of described consist of at least one party's who carries out hyperacoustic transmission or reception ultrasonic transducer.
13. ultrasound probe, it is equipped with semiconductor device, wherein, this semiconductor device is made of a plurality of semiconductor units, each semiconductor unit has lip-deep the 1st dielectric film (12) that is formed on semiconductor substrate, be formed on the lower electrode on the top of described the 1st dielectric film (12), be formed on the hole section on the top of described lower electrode, the 2nd dielectric film (16) that forms according to the mode of surrounding described hole section, be formed on the upper electrode on the top of the 2nd dielectric film (16), and described upper electrode top the 3rd dielectric film (18) and the 4th dielectric film (19) that form successively, by providing potential difference between the described upper electrode of described hole section configuration and described lower electrode, thereby described upper electrode mechanical type is moved, by described the 2nd dielectric film (16), described upper electrode, the element that described the 3rd dielectric film (18) and described the 4th dielectric film (19) consist of is as a thin film, has the piece that has configured the described semiconductor unit of specified quantity along first direction and with the second direction of described first direction quadrature and formed on the first type surface of described semiconductor substrate, described upper electrode along a plurality of semiconductor units of described of the formation of described first direction configuration is electrically connected by spoke, described lower electrode along a plurality of semiconductor units of described of the formation of described second direction configuration is electrically connected, configured described with rectangular on described first direction and described second direction, this ultrasound probe is characterised in that,
Remove and described lower electrode between become the described upper electrode of defective insulation, and possess the protecting film on the first type surface that is formed on the described semiconductor substrate of having removed described upper electrode.
14. ultrasound probe according to claim 13 is characterized in that,
Between described upper electrode and described lower electrode, according to configuring described hole section with described upper electrode and the overlapping mode of described lower electrode.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2009007568 | 2009-01-16 | ||
| JP2009-007568 | 2009-01-16 | ||
| PCT/JP2010/050068 WO2010082519A1 (en) | 2009-01-16 | 2010-01-06 | Ultrasonic probe manufacturing method and ultrasonic probe |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102281818A CN102281818A (en) | 2011-12-14 |
| CN102281818B true CN102281818B (en) | 2013-11-06 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2010800045623A Expired - Fee Related CN102281818B (en) | 2009-01-16 | 2010-01-06 | Ultrasonic probe manufacturing method and ultrasonic probe |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US8431420B2 (en) |
| JP (1) | JP5286369B2 (en) |
| CN (1) | CN102281818B (en) |
| WO (1) | WO2010082519A1 (en) |
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| US9242275B2 (en) | 2013-03-15 | 2016-01-26 | Butterfly Networks, Inc. | Complementary metal oxide semiconductor (CMOS) ultrasonic transducers and methods for forming the same |
| US9667889B2 (en) | 2013-04-03 | 2017-05-30 | Butterfly Network, Inc. | Portable electronic devices with integrated imaging capabilities |
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| CA2946133A1 (en) | 2014-04-18 | 2015-10-22 | Butterfly Network, Inc. | Ultrasonic transducers in complementary metal oxide semiconductor (cmos) wafers and related apparatus and methods |
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| CN107710787B (en) * | 2015-05-29 | 2019-12-06 | 株式会社日立制作所 | Ultrasonic transducer and ultrasonic inspection apparatus |
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| JP6767474B2 (en) * | 2015-08-11 | 2020-10-14 | コーニンクレッカ フィリップス エヌ ヴェＫｏｎｉｎｋｌｉｊｋｅ Ｐｈｉｌｉｐｓ Ｎ．Ｖ． | Capacitive Micromachine Ultrasonic Transducer with Increased Life |
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Also Published As
| Publication number | Publication date |
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| WO2010082519A1 (en) | 2010-07-22 |
| US8431420B2 (en) | 2013-04-30 |
| JPWO2010082519A1 (en) | 2012-07-05 |
| CN102281818A (en) | 2011-12-14 |
| US20110272693A1 (en) | 2011-11-10 |
| JP5286369B2 (en) | 2013-09-11 |
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