CN102279836A - Timing control method of physical multi-partition computer architecture - Google Patents

Timing control method of physical multi-partition computer architecture Download PDF

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CN102279836A
CN102279836A CN2011102473010A CN201110247301A CN102279836A CN 102279836 A CN102279836 A CN 102279836A CN 2011102473010 A CN2011102473010 A CN 2011102473010A CN 201110247301 A CN201110247301 A CN 201110247301A CN 102279836 A CN102279836 A CN 102279836A
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subregion
legacy
controller
clock
unit
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CN102279836B (en
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李博乐
林楷智
叶丰华
王欢
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Yantai Inspur Cloud Computing Co ltd
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Inspur Electronic Information Industry Co Ltd
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Abstract

The invention discloses a novel timing control method of a computer architecture based on NUMA (non-uniform memory access). In a computer with multiple physical layer partitions, each hardware platform is provided with an independent power system and a clock system; and the input/output unit of each partition is provided with a LegacyIO controller, and the power sequence, clock enable and resetting system of the partition are controlled by the LegacyIO controller. Therefore, when certain partition fails, other partitions can work normally as each partition is provided with the independent timing control system, power system, clock system and resetting system, so that the system reliability is fully ensured; and simultaneously, the computer of each partition can be turned on and off independently without influencing the normall work of other partitions, thus online maintenance of the system is possible.

Description

A kind of sequential control method of physics multi partition Computer Architecture
 
Technical field
The present invention relates to a kind of Computer Applied Technology field, specifically a kind of sequential control method of physics multi partition Computer Architecture.
Background technology
Common NUMA or SMP multiprocessor architecture have only unified sequential, clock, power supply, the resetting system of a cover usually.Even if utilize Intel Virtualization Technology, realize that each system utilizes a hardware platform in the architecture of multisystem, have only fixing sequential, clock, power supply, the resetting system of a cover.In case any one group of clock signal, timing control signal, DC power supply or reset signal go wrong in the hardware platform, a plurality of systems of operation will all lose efficacy on it, influence the reliability of total system greatly.Common NUMA or SMP multiprocessor system assumption diagram are as shown in Figure 1.
Summary of the invention
The sequential control method that the purpose of this invention is to provide a kind of physics multi partition Computer Architecture.
The objective of the invention is to realize in the following manner, a plurality of processors of computer system and IO resource are carried out division on the Physical layer, thereby a multiprocessor computer system is divided into a plurality of independently multicomputer systems, or a plurality of independently multicomputer systems that these are divided are coupled as a complete computer system, in many Physical layers partitioned computer, set up and overlap independently power-supply system and clock system more; Promptly in many Physical layers partitioned computer, each hardware platform all has independently power-supply system and clock system; Is furnished with Legacy IO controller at the input-output unit of each subregion, the electrifying timing sequence of each subregion, clock enables, resetting system all is to be controlled by Legacy IO controller, even certain subregion breaks down like this, other each subregions have independently sequential control, power-supply system, clock system and resetting system, equally can operate as normal, fully guaranteed the reliability of system; Simultaneously each subregion has independent switch machine function, and does not influence other subregion operate as normal, but for the on-line maintenance of system provides may;
System is divided into a plurality of independently multicomputer systems or a plurality of independently multicomputer system when being coupled as a complete computer, and Legacy IO controller adopts different sequential control methods; In multi-partitioned systems, sequential is controlled by the Legacy IO controller of each subregion; Be coupled in the computer system at multi partition, system has and has only a Legacy IO controller effective, is responsible for the sequential control of control total system.
When system was divided into a plurality of independently multicomputer systems or is coupled as a complete computer, Legacy IO controller adopted two kinds of different sequential control methods: concrete controlled step is as follows:
1) sequential control of multicomputer system:
(1) the Legacy IO controller of subregion is set by System Management Unit, activates the Legacy IO controller of each subregion;
(2) but the equal independent switch machine of each subregion, after certain subregion receives start-up command, Legacy IO controller sends enable signal to the DC of this subregion power pack, this power supply computing unit in subregion, storage unit, the input-output unit power supply, and feedback Power good signal is given Legacy IO controller;
(3) Legacy IO controller sends enable signal to this subregion clock unit, this clock unit computing unit in subregion, and storage unit, input-output unit provides clock;
(4) after Legacy IO controller waits until that system clock is stable, the computing unit in the subregion that resets, storage unit, input-output unit, this subregion sequential control is finished;
2) be coupled as the sequential control of a complete computer:
(1) choose the unique Legacy IO controller of system by System Management Unit, it is invalid that other Legacy IO controllers all are set to;
(2) after system receives start-up command, Legacy IO controller all DC power pack in system are sent enable signal, and power supply is to the computing unit of subregion separately, storage unit, the input-output unit power supply, and feedback Power good signal is given Legacy IO controller;
(3) Legacy IO controller is determining that all Power good signals effectively send enable signal to all clock units of system in the back, and clock unit is to the computing unit of subregion separately, storage unit, and input-output unit provides clock;
(4) after Legacy IO controller waits until that system clock is stable, the computing unit that resetting system is all, storage unit, input-output unit, the sequential control of total system is finished.
The present invention proposes a kind of sequential control of new Computer Architecture based on NUMA, each hardware platform all has independently power-supply system and clock system in many Physical layers partitioned computer; The input-output unit of each subregion is furnished with Legacy IO controller, the electrifying timing sequence of this subregion, and clock enables, and resetting system all is to be controlled by Legacy IO controller.Even certain subregion breaks down like this, other each subregions have independently sequential control, power-supply system, clock system and resetting system, equally can operate as normal, fully guaranteed the reliability of system; Simultaneously each subregion can the independent switch machine, and does not influence other subregion operate as normal, but for the on-line maintenance of system provides may.
Description of drawings
Fig. 1 is common NUMA or SMP multiprocessor system assumption diagram:
Fig. 2 is a physics multi partition Computer Architecture synoptic diagram;
Fig. 3 is the time sequence control logic figure of multicomputer system;
Fig. 4 is the time sequence control logic figure that multisystem is coupled as a complete computer.
Embodiment
With reference to explaining below the sequential control method work of Figure of description to physics multi partition Computer Architecture of the present invention.
The sequential control method of physics multi partition Computer Architecture of the present invention is that each hardware platform all has independently power-supply system and clock system in many Physical layers partitioned computer; The input-output unit of each subregion is furnished with Legacy IO controller, the electrifying timing sequence of this subregion, and clock enables, and resetting system all is to be controlled by Legacy IO controller.Even certain subregion breaks down like this, other each subregions have independently sequential control, power-supply system, clock system and resetting system, equally can operate as normal, fully guaranteed the reliability of system; Simultaneously each subregion can the independent switch machine, and does not influence other subregion operate as normal, but for the on-line maintenance of system provides may.
Be divided into a plurality of independently multicomputer systems or be coupled as a complete computer according to system, Legacy IO controller adopts different sequential control methods; In multi-partitioned systems, sequential is controlled by the Legacy IO controller of each subregion; Be coupled in the computer system at multi partition, system has and has only a Legacy IO controller effective, is responsible for the sequential control of control total system.
Physics multi partition Computer Architecture of the present invention as shown in Figure 2.
Embodiment
When system was divided into a plurality of independently multicomputer systems or is coupled as a complete computer, Legacy IO controller adopted two kinds of different sequential control methods:
The sequential control of multicomputer system:
1. the Legacy IO controller of subregion is set by System Management Unit, activates the Legacy IO controller of each subregion;
2. but the equal independent switch machine of each subregion, after certain subregion receives start-up command, Legacy IO controller sends enable signal to the DC of this subregion power pack, this power supply computing unit in subregion, storage unit, the input-output unit power supply, and feedback Power good signal is given Legacy IO controller;
3. Legacy IO controller sends enable signal to this subregion clock unit, this clock unit computing unit in subregion, and storage unit, input-output unit provides clock;
4. after Legacy IO controller waits until that system clock is stable, the computing unit in the subregion that resets, storage unit, input-output unit, this subregion sequential control is finished;
The time sequence control logic figure of following multicomputer system is as shown in Figure 3:
Be coupled as the sequential control of a complete computer:
1. choose the unique Legacy IO controller of system by System Management Unit, it is invalid that other Legacy IO controllers all are set to;
2. after system receives start-up command, Legacy IO controller all DC power pack in system are sent enable signal, and power supply is to the computing unit of subregion separately, storage unit, the input-output unit power supply, and feedback Power good signal is given Legacy IO controller;
3. Legacy IO controller is determining that all Power good signals effectively send enable signal to all clock units of system in the back, and clock unit is to the computing unit of subregion separately, storage unit, and input-output unit provides clock
4. after Legacy IO controller waits until that system clock is stable, the computing unit that resetting system is all, storage unit, input-output unit, the sequential control of total system is finished
The time sequence control logic figure that multisystem is coupled as a complete computer is as shown in Figure 4:
Except that the described technical characterictic of instructions, be the known technology of those skilled in the art.

Claims (1)

1. the sequential control method of a physics multi partition Computer Architecture, it is characterized in that a plurality of processors of computer system and IO resource are carried out division on the Physical layer, thereby a multiprocessor computer system is divided into a plurality of independently multicomputer systems, or a plurality of independently multicomputer systems that these are divided are coupled as a complete computer system, in many Physical layers partitioned computer, set up and overlap independently power-supply system and clock system more; Promptly in many Physical layers partitioned computer, each hardware platform all has independently power-supply system and clock system; Is furnished with Legacy IO controller at the input-output unit of each subregion, the electrifying timing sequence of each subregion, clock enables, resetting system all is to be controlled by Legacy IO controller, even certain subregion breaks down like this, other each subregions have independently sequential control, power-supply system, clock system and resetting system, equally can operate as normal, fully guaranteed the reliability of system; Simultaneously each subregion has independent switch machine function, and does not influence other subregion operate as normal, but for the on-line maintenance of system provides may;
System is divided into a plurality of independently multicomputer systems or a plurality of independently multicomputer system when being coupled as a complete computer, and Legacy IO controller adopts different sequential control methods; In multi-partitioned systems, sequential is controlled by the Legacy IO controller of each subregion; Be coupled in the computer system at multi partition, system has and has only a Legacy IO controller effective, is responsible for the sequential control of control total system;
When system was divided into a plurality of independently multicomputer systems or is coupled as a complete computer, Legacy IO controller adopted two kinds of different sequential control methods: concrete controlled step is as follows:
1) sequential control of multicomputer system:
(1) the Legacy IO controller of subregion is set by System Management Unit, activates the Legacy IO controller of each subregion;
(2) but the equal independent switch machine of each subregion, after certain subregion receives start-up command, Legacy IO controller sends enable signal to the DC of this subregion power pack, this power supply computing unit in subregion, storage unit, the input-output unit power supply, and feedback Power good signal is given Legacy IO controller;
(3) Legacy IO controller sends enable signal to this subregion clock unit, this clock unit computing unit in subregion, and storage unit, input-output unit provides clock;
(4) after Legacy IO controller waits until that system clock is stable, the computing unit in the subregion that resets, storage unit, input-output unit, this subregion sequential control is finished;
2) be coupled as the sequential control of a complete computer:
(1) choose the unique Legacy IO controller of system by System Management Unit, it is invalid that other Legacy IO controllers all are set to;
(2) after system receives start-up command, Legacy IO controller all DC power pack in system are sent enable signal, and power supply is to the computing unit of subregion separately, storage unit, the input-output unit power supply, and feedback Power good signal is given Legacy IO controller;
(3) Legacy IO controller is determining that all Power good signals effectively send enable signal to all clock units of system in the back, and clock unit is to the computing unit of subregion separately, storage unit, and input-output unit provides clock;
(4) after Legacy IO controller waits until that system clock is stable, the computing unit that resetting system is all, storage unit, input-output unit, the sequential control of total system is finished.
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102521199A (en) * 2011-12-16 2012-06-27 浪潮电子信息产业股份有限公司 Timing sequence control method for NUMA (non-uniform memory access)-based physical multi-partition computer architecture
CN104656741A (en) * 2015-03-13 2015-05-27 浪潮集团有限公司 Sequential control method for different partitions of server system based on nios II
CN105005547A (en) * 2015-06-25 2015-10-28 浪潮电子信息产业股份有限公司 NUMA based complete physical partition method for multi-channel server

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CN1292529A (en) * 1999-09-28 2001-04-25 国际商业机器公司 Method of partition block for managing computational environment, system and program product
US20040168170A1 (en) * 2003-02-20 2004-08-26 International Business Machines Corporation Dynamic processor redistribution between partitions in a computing system
US20050182922A1 (en) * 2004-02-18 2005-08-18 International Business Machines Corporation Computer systems with several operating systems coexisting thereon and swapping between these operating systems
CN101149692A (en) * 2006-09-20 2008-03-26 国际商业机器公司 Method and device for re-distributing resource between subareas
US20080168202A1 (en) * 2007-01-05 2008-07-10 International Business Machines Corporation Directly initiating by external adapters the setting of interruption initiatives
CN101283333A (en) * 2005-11-14 2008-10-08 英特尔公司 Method and apparatus for maintaining a partition when booting another partition

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1292529A (en) * 1999-09-28 2001-04-25 国际商业机器公司 Method of partition block for managing computational environment, system and program product
US20040168170A1 (en) * 2003-02-20 2004-08-26 International Business Machines Corporation Dynamic processor redistribution between partitions in a computing system
US20050182922A1 (en) * 2004-02-18 2005-08-18 International Business Machines Corporation Computer systems with several operating systems coexisting thereon and swapping between these operating systems
CN101283333A (en) * 2005-11-14 2008-10-08 英特尔公司 Method and apparatus for maintaining a partition when booting another partition
CN101149692A (en) * 2006-09-20 2008-03-26 国际商业机器公司 Method and device for re-distributing resource between subareas
US20080168202A1 (en) * 2007-01-05 2008-07-10 International Business Machines Corporation Directly initiating by external adapters the setting of interruption initiatives

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102521199A (en) * 2011-12-16 2012-06-27 浪潮电子信息产业股份有限公司 Timing sequence control method for NUMA (non-uniform memory access)-based physical multi-partition computer architecture
CN104656741A (en) * 2015-03-13 2015-05-27 浪潮集团有限公司 Sequential control method for different partitions of server system based on nios II
CN104656741B (en) * 2015-03-13 2017-05-31 浪潮集团有限公司 A kind of sequential control method of the server system different subregions based on nios II
CN105005547A (en) * 2015-06-25 2015-10-28 浪潮电子信息产业股份有限公司 NUMA based complete physical partition method for multi-channel server
CN105005547B (en) * 2015-06-25 2017-08-25 浪潮电子信息产业股份有限公司 A kind of complete Physical Extents method of multipath server based on NUMA

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