CN102262602A - Data reading device and method for advanced high-performance bus (AHB) - Google Patents
Data reading device and method for advanced high-performance bus (AHB) Download PDFInfo
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- CN102262602A CN102262602A CN2010101892629A CN201010189262A CN102262602A CN 102262602 A CN102262602 A CN 102262602A CN 2010101892629 A CN2010101892629 A CN 2010101892629A CN 201010189262 A CN201010189262 A CN 201010189262A CN 102262602 A CN102262602 A CN 102262602A
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Abstract
The invention provides a data reading device and a data reading method for an advanced high-performance bus (AHB), and belongs to the field of data pre-fetching. The device comprises a host, a temporary register, a controller and a memory, wherein the host reads data from the temporary register under the control of the controller; the temporary register pre-fetches and stores data from the memory under the control of the controller so that the host can read the data on the AHB; the controller controls the temporary register to pre-fetch the data from the memory and also controls the host on the AHB to read the data from the temporary register; and the memory connected with the controller is used for storing data. In the invention, the temporary register is added at the end of the memory and serves as a data pre-fetching device, the data of the memory is read and temporarily stored in the temporary register in the data processing interval of the host, and then the host directly reads data from the temporary register, so that the host waiting time is reduced and the host access speed is increased.
Description
Technical field
The invention belongs to the data pre-fetching field, relate in particular to a kind of data fetch device and method that is used for ahb bus (Advanced HighPerformance Bus, high performance bus).
Background technology
Along with the continuous development of semiconductor process techniques and improving constantly of the market demand, the complexity of SoC (System On aChip, SOC (system on a chip) is hereinafter to be referred as SoC) also improves constantly thereupon.
Improving constantly of processor frequencies can reach between 50MHZ～100MHZ at present, and the frequency of operation that flash memory (Flash Memory) is supported is limited, and be general only between 20MHZ～30MHZ.The reading speed of flash memory (Flash Memory) is not often caught up with the access speed of processor, and processor must satisfy accessing operation to flash memory (Flash Memory) through the stand-by period.
Therefore, how in advance prefetched instruction effectively avoids the problem of host waits to need to be resolved hurrily.
Summary of the invention
The present invention provides a kind of data fetch device and method that is used for ahb bus for solving the technical matters that the processor access storer need be waited for.
A kind of data fetch device comprises:
Main frame reads data in the working storage under the control of controller;
Working storage is looked ahead, is stored the data in the storer under the control of controller, reads for main frame on the ahb bus;
Main frame reading data in the working storage on the ahb bus looked ahead, controlled to controller, control working storage to data in the storer;
Storer is connected with controller, is used for store data.
A kind of method for reading data that is used for ahb bus comprises:
(a), the initial address of looking ahead is set, working storage is looked ahead and is enabled;
(b), each memory buffer prefetch data from storer of working storage;
(c), judge whether main frame reads; Not, redirect forwards step (b) to; Be to jump to step (d);
(d), judge whether to hit memory buffer, be to jump to step (f); , do not jump to step (e);
(e), all memory buffer of working storage are emptied, working storage is prefetch data from storer, jumps to step (c) then;
(f), select the memory buffer hit;
(g), main frame reading of data from the memory buffer of hitting on the ahb bus.
The present invention adds a working storage as the data pre-fetching device at the storer end, in the host process data slit data read of storer is kept in working storage, main frame is reading of data from working storage directly, has reduced the stand-by period of main frame, has improved host access speed.
Description of drawings
Fig. 1 is the data fetch device synoptic diagram that is used for ahb bus that the embodiment of the invention provides;
Fig. 2 is the buffer memory structure synoptic diagram that the embodiment of the invention provides;
Fig. 3 is that the controller that the embodiment of the invention provides is controlled the synoptic diagram that working storage is realized data pre-fetching;
The process flow diagram of the method for reading data that is used for ahb bus that Fig. 4 embodiment of the invention 1 provides;
The segmentation process flow diagram of the method for reading data that is used for ahb bus that Fig. 5 embodiment of the invention 1 provides.
Embodiment
In order to make technical matters solved by the invention, technical scheme and beneficial effect clearer,, the present invention is further elaborated below in conjunction with drawings and Examples.Should be appreciated that specific embodiment described herein only in order to explanation the present invention, and be not used in qualification the present invention.
As shown in Figure 1, be the data fetch device synoptic diagram that is used for ahb bus provided by the invention.Comprise: main frame 11, controller 12, storer 13, working storage 14.
Working storage 14 is looked ahead, is stored the data in the storer 13 under the control of controller 12, reads for main frame on the ahb bus 11.
Data looks ahead, controls on the ahb bus reading of data in 11 pairs of working storages 14 of main frame in 14 pairs of storeies 13 of controller 12 control working storages.
Main frame can be directly under the control of controller from storer reading of data, but because the access speed of storer is limited, and the reading speed of main frame is very fast, main frame needs to wait in reading process.
Preferred version, described working storage 14 is a memory buffer.
Preferred version, described memory buffer data bit width is consistent with storer 13 data bit widths.
Based on main frame on the ahb bus is the continuation address visit, and the bit wide of storer is considered with efficient several respects that storer is read in raising, the quantity of memory buffer is four, is respectively: first memory buffer, second memory buffer, the 3rd memory buffer, the 4th memory buffer.The bit wide of each memory buffer is the same with the bit wide of storer, is 64.The priority level of first memory buffer is the highest, and other memory buffer priority reduce successively.
Preferred version, as shown in Figure 2, described first memory buffer, second memory buffer, the 3rd memory buffer, the 4th memory buffer include: address register, empty full scale will, hit in tag, prefetch request, memory bank.
Address register, address register are 29, and this address register is used for showing the address of the current storage data of memory buffer; When main frame 11 need conduct interviews to memory buffer, can whether mate by the address and judge whether to hit; If the host access address value is identical with address in the address register, then expression is hit, otherwise, miss.
Empty full scale will, empty marking signal represents that the data of storing in the memory buffer are read out, current can the renewal this memory buffer; On behalf of the data in the memory buffer, full scale will signal be not read out as yet, and main frame can conduct interviews to this memory buffer, reads data wherein.
Hit in tag comprises that prefetch hit and visit hit, and prefetch hit is represented to choose this memory buffer prefetch data according to the priority principle, and the data storage of looking ahead from storer is in this memory buffer; Visit hits that the expression main frame reading of data address of sending is identical with the storage data address of this memory buffer, and the data storage of host access is in this memory buffer, and main frame reads data wherein.
Prefetch request wants the data of prefetch memory the inside, all needs to initiate corresponding prefetch request signal; Prefetch request is the request that produces when looking ahead, and does not contact directly with the request of reading that main frame is initiated.
Memory bank, the data of storage appropriate address.
Be the control that controller is realized the working storage prefetch data as shown in Figure 3.Working storage is between ahb bus and storer, data in the spontaneous prefetch memory of working storage read in order to main frame on the ahb bus, if controller selects working storage to enable, the address that main frame will send or send on the ahb bus is through working storage, if the address of storage data and the address correspondence that main frame needs data in the working storage, main frame is reading of data from working storage directly; If working storage in the address and the address that main frame needs data of storage data not corresponding, working storage read for main frame, but main frame need be waited for the clock period of peripheral hardware reading of data equally with address prefetch data in storer that main frame sends.If controller is selected the working storage forbidden energy, storer is directly given without the control of working storage in the address that main frame sends on the ahb bus, and same data of reading from storer are directly given main frame on the ahb bus also without working storage.Look ahead by working storage and can improve the speed that host side reads, shorten and read latent period, if hit any one memory buffer in the working storage, just directly sense data does not need the additional wait time to main frame; If do not hit any one memory buffer in the working storage, main frame need wait for that equally the working storage data of having looked ahead just can read.
Data fetch device of the present invention adds a working storage as the data pre-fetching device at the storer end, in the host process data slit data read of storer is kept in working storage, main frame is reading of data in working storage directly, reduce the stand-by period of main frame, improved host access speed.
The present invention also provides a kind of method for reading data that is used for ahb bus, as shown in Figure 4.Comprise:
(a), the initial address of looking ahead is set, working storage is looked ahead and is enabled;
(b), each memory buffer prefetch data from storer of working storage;
(c), judge whether main frame reads; Not, redirect forwards step (b) to; Be that redirect forwards step (d) to;
(d), judge whether to hit memory buffer, be to jump to step (f); , do not jump to step (e);
(e), all memory buffer of working storage are emptied, working storage is prefetch data from storer, jumps to step (c) then;
(f), select the memory buffer hit;
(g), main frame reading of data from the memory buffer of hitting on the ahb bus.
Preferred version, as shown in Figure 5, described step (e) comprising:
(e1), all memory buffer with working storage empty;
(e2), prefetch data is left in first memory buffer;
(e3), on the ahb bus main frame by the data in the controller read buffer memory;
(e4), prefetch data fills all memory buffer, finishes data pre-fetching.
Described step (b) comprising:
(b1), from storer, read the data of prefetch address;
(b2), judge which buffer memory stores prefetch data of working storage;
(b3), to next continuation address prefetch data;
(b4), prefetch data fills all memory buffer, finishes data pre-fetching.
Enable signal enables as long as look ahead, and working storage just begins to carry out looking ahead of continuation address in the step (a), and no matter whether main frame has real request of access, up to filling four memory buffer, just stops to look ahead.And which address the first address of looking ahead can be selected to look ahead from by the configuration relevant register.On this initial address basis, four memory buffer are carried out continuation address from adding.For example, initial address is 0h, and after first memory buffer obtained 0 address date, second memory buffer just can then obtain the 8h address date so, be exactly the data that the second memory buffer correspondence is got the 10h address successively, the look ahead data of 18h address of the 3rd memory buffer correspondence.
Secondly, after setting was looked ahead and enabled, working storage just began prefetch data.Because the memory buffer of four 64bit is arranged, the deposit data of the 64bit size of will considering to look ahead is in which memory buffer.The present invention compares by the address register and the prefetch address of each memory buffer, determines the concrete memory buffer that prefetch data is deposited.The variation of address register in the memory buffer is decided by the empty full scale will signal of memory buffer.If it is empty that memory buffer is wherein arranged, then the address register of this memory buffer just adds new prefetch address, and the new data of looking ahead; If wherein memory buffer is for full, then the value of the address register of this memory buffer just remains unchanged.Memory buffer is empty to expire whether sense data determines by main frame, read then to be sky, on the contrary then full.If an above memory buffer is arranged for empty, the priority of first memory buffer is the highest so, and other memory buffer are taken second place successively.
Once more, controller is sense data from storer, and memory buffer is carried out after data write, and main frame just can be read the data in the memory buffer of hitting.Whether whether memory buffer hits, and is to require the address to compare by address register and main frame to each memory buffer, decide current memory buffer to hit.Be hit if a certain memory buffer is current, then data can directly be read by main frame in the memory buffer, and main frame does not need the extra stand-by period; If current do not have memory buffer to hit, then working storage can empty the prefetch data of all memory buffer, carrying out continuation address with the first address for the host requests address looks ahead, read for main frame, promptly when main frame did not hit any one memory buffer, main frame still needed to spend with directly reading the identical stand-by period reading of data of storer.
Data fetch device of the present invention and method are suitable for and the continuation address accessing operation of main frame to peripheral hardware, to save the time of host access storer.
Simultaneously, method for reading data described in the invention is under the situation of sky at working storage, can carry out prefetch operation always.After previous prefetch address is carried out prefetch operation and is finished, will enter looking ahead of next continuation address automatically, fill up in the working storage after all memory buffer the time-out of looking ahead.
Method for reading data of the present invention is kept in the data read of storer in the host process data slit in working storage, main frame directly reads the data that need from working storage, reduced the stand-by period of main frame, has improved host access speed.
The above only is preferred embodiment of the present invention, not in order to restriction the present invention, all any modifications of being done within the spirit and principles in the present invention, is equal to and replaces and improvement etc., all should be included within protection scope of the present invention.
Claims (8)
1. data fetch device that is used for ahb bus is characterized in that: comprising:
Main frame reads data in the working storage under the control of controller;
Working storage is looked ahead, is stored the data in the storer under the control of controller, reads for main frame on the ahb bus;
Main frame reading data in the working storage on the ahb bus looked ahead, controlled to controller, control working storage to data in the storer;
Storer is connected with controller, is used for store data.
2. data fetch device as claimed in claim 1 is characterized in that: described working storage comprises memory buffer.
3. data fetch device as claimed in claim 2 is characterized in that: described memory buffer data bit width is consistent with the memory data bit wide.
4. as claim 2 or 3 described data fetch devices, it is characterized in that: described memory buffer has four, be respectively: first memory buffer, second memory buffer, the 3rd memory buffer, the 4th memory buffer, the described first memory buffer priority is the highest, and other memory buffer priority reduce successively.
5. data fetch device as claimed in claim 4 is characterized in that: described first memory buffer, second memory buffer, the 3rd memory buffer, the 4th memory buffer include:
Address register is used to store data corresponding address information, is used for main frame and by the address memory buffer is conducted interviews;
Empty full scale will, empty marking signal represents that the data of storing in the memory buffer are read out, current can the renewal this memory buffer; Data in the full scale will signal indication memory buffer are not read out as yet, and main frame can conduct interviews to memory buffer, reads data wherein;
Hit in tag comprises that prefetch hit and visit hit, and prefetch hit is represented to choose this memory buffer prefetch data according to the priority principle, and the data storage of looking ahead from storer is in this memory buffer; Visit hits that the expression main frame reading of data address of sending is identical with the storage data address of this memory buffer, and the data storage of host access is in this memory buffer, and main frame reads data wherein;
Prefetch request is initiated corresponding prefetch request signal to storer;
Memory bank, the data of storage appropriate address.
6. method for reading data that is used for ahb bus is characterized in that: comprising:
(a), the initial address of looking ahead is set, working storage is looked ahead and is enabled;
(b), each memory buffer prefetch data from storer of working storage;
(c), judge whether main frame reads; Not, redirect forwards step (b) to; Be to jump to step (d);
(d), judge whether to hit memory buffer, be to jump to step (f); , do not jump to step (e);
(e), all memory buffer of working storage are emptied, working storage is prefetch data from storer, jumps to step (c) then;
(f), select the memory buffer hit;
(g), main frame reading of data from the memory buffer of hitting on the ahb bus.
7. method for reading data as claimed in claim 6 is characterized in that: described step (e) comprising:
(e1), all memory buffer with working storage empty;
(e2), prefetch data is left in first memory buffer;
(e3), on the ahb bus main frame by the data in the controller read buffer memory;
(e4), prefetch data fills all memory buffer, finishes data pre-fetching.
8. method for reading data as claimed in claim 6 is characterized in that: described step (b) comprising:
(b1), from storer, read the data of prefetch address;
(b2), judge which buffer memory stores prefetch data of working storage;
(b3), to next continuation address prefetch data;
(b4), prefetch data fills all memory buffer, finishes data pre-fetching.
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| Application Number | Priority Date | Filing Date | Title |
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| CN2010101892629A CN102262602A (en) | 2010-05-26 | 2010-05-26 | Data reading device and method for advanced high-performance bus (AHB) |
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| CN2010101892629A CN102262602A (en) | 2010-05-26 | 2010-05-26 | Data reading device and method for advanced high-performance bus (AHB) |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN105512054A (en) * | 2015-12-09 | 2016-04-20 | 上海兆芯集成电路有限公司 | Host interface controller and control method for storage device |
| CN107807888A (en) * | 2017-09-04 | 2018-03-16 | 东莞市爱协生智能科技有限公司 | A kind of data pre-fetching system and its method for SOC frameworks |
| CN108091366A (en) * | 2017-12-29 | 2018-05-29 | 中国电子科技集团公司第五十八研究所 | Flash reading circuits and read method |
| CN116661695A (en) * | 2023-06-02 | 2023-08-29 | 灵动微电子(苏州)有限公司 | Bus acceleration method and device |
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| CN1484157A (en) * | 2002-09-20 | 2004-03-24 | 联发科技股份有限公司 | Embedding system and instruction prefetching device and method thereof |
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| US5732406A (en) * | 1990-01-31 | 1998-03-24 | Hewlett-Packard Company | Microprocessor burst mode with external system memory |
| CN1484157A (en) * | 2002-09-20 | 2004-03-24 | 联发科技股份有限公司 | Embedding system and instruction prefetching device and method thereof |
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Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105512054A (en) * | 2015-12-09 | 2016-04-20 | 上海兆芯集成电路有限公司 | Host interface controller and control method for storage device |
| CN105512054B (en) * | 2015-12-09 | 2018-11-09 | 上海兆芯集成电路有限公司 | Host interface controller and storage device control method |
| CN107807888A (en) * | 2017-09-04 | 2018-03-16 | 东莞市爱协生智能科技有限公司 | A kind of data pre-fetching system and its method for SOC frameworks |
| CN107807888B (en) * | 2017-09-04 | 2021-03-02 | 深圳市爱协生科技有限公司 | Data prefetching system and method for SOC architecture |
| CN108091366A (en) * | 2017-12-29 | 2018-05-29 | 中国电子科技集团公司第五十八研究所 | Flash reading circuits and read method |
| CN108091366B (en) * | 2017-12-29 | 2021-01-29 | 中国电子科技集团公司第五十八研究所 | Flash reading circuit and reading method |
| CN116661695A (en) * | 2023-06-02 | 2023-08-29 | 灵动微电子(苏州)有限公司 | Bus acceleration method and device |
| CN116661695B (en) * | 2023-06-02 | 2024-03-15 | 灵动微电子(苏州)有限公司 | Bus acceleration method and device |
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Application publication date: 20111130 |