CN102254921A - Photoelectric conversion device and camera - Google Patents

Photoelectric conversion device and camera Download PDF

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CN102254921A
CN102254921A CN2011101235354A CN201110123535A CN102254921A CN 102254921 A CN102254921 A CN 102254921A CN 2011101235354 A CN2011101235354 A CN 2011101235354A CN 201110123535 A CN201110123535 A CN 201110123535A CN 102254921 A CN102254921 A CN 102254921A
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dielectric film
mos transistor
gate electrode
contact plug
optical
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CN102254921B (en
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板桥政次
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Canon Inc
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Canon Inc
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/1462Coatings
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03BAPPARATUS OR ARRANGEMENTS FOR TAKING PHOTOGRAPHS OR FOR PROJECTING OR VIEWING THEM; APPARATUS OR ARRANGEMENTS EMPLOYING ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ACCESSORIES THEREFOR
    • G03B17/00Details of cameras or camera bodies; Accessories therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/14609Pixel-elements with integrated switching, control, storage or amplification elements

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Light Receiving Elements (AREA)

Abstract

The present invention relates to a photoelectric conversion device and a camera.The photoelectric conversion device including a pixel region having a photoelectric converter, and a transfer MOS transistor for transferring charges in the photoelectric converter to a floating diffusion, comprises a first insulating film continuously arranged to cover the photoelectric converter, and a first side surface and a first region of an upper surface of a gate electrode of the transfer MOS transistor while not arranged on a second region of the upper surface, the first insulating film being configured to function as an antireflection film, a contact plug connected with the floating diffusion, and a second insulating film continuously arranged to cover a periphery of the contact plug on the floating diffusion, and the second side surface and the second region while not arranged on the first region, the second insulating film being configured to function as an etching stopper in forming the contact plug.

Description

Photoelectric conversion device and camera
Technical field
The present invention relates to photoelectric conversion device and the camera that comprises this photoelectric conversion device.
Background technology
In many digital still life cameras and digital mobile video camera (camcorder), CCD type or cmos type photoelectric conversion device have been used.Particularly, CMOS type photoelectric conversion device power consumption and multi-functional aspect be better than CCD type photoelectric conversion device, and its range of application broadens recently.
Photoelectric conversion device uses the dielectric film that has a middle refractive index between the refractive index of the dielectric film that is used for converting light the optical-electrical converter of the signal of telecommunication to and arranges on it by formation to improve sensitivity of method as anti-reflective film.
Along with the quantity increase of pixel, the size of pixel is littler.This has produced the demand of the size of the size that reduces the optical-electrical converter in the photoelectric conversion region and the MOS transistor in photoelectric conversion region or the peripheral circuit region.Become more hour at element, the nargin of layout designs (margin) also becomes littler.Therefore, if it is low to be used for aligning (alignment) precision of the contact hole of diffusion region or gate electrode, then during being used to form the etching of contact hole penetrating of element isolation zone may appear.In this case, in the operation of photoelectric conversion device, electric current may the diffusion region that contacts with contact plug (plug) and with trap that the diffusion region contacts between flow.
In order to address the above problem known a kind of so-called self aligned contact technique.Element isolation zone penetrated after the dielectric film that this technology has an etching stopping body function that can obtain to select ratio when being formed for forming the contact hole of contact plug by etching by formation prevented from opening contact hole.This technology is applied to requiring the CMOS type photoelectric conversion device of the little Pixel Dimensions of having of thin contact hole.
In the open No.2004-228425 of Japan Patent, in the disclosed photoelectric conversion device, except anti-reflective film, also forming etching stopping body film on the optical-electrical converter.In this arrangement, anti-reflective film and etching stopping body film are stacked on the gate electrode of the transmission that is used for controlling the electric charge that optical-electrical converter accumulates.This has increased the layer thickness of structure on the optical-electrical converter, has reduced sensitivity thus and F counts proportionality.
Summary of the invention
The invention provides the technology of the height of the layer structure that helps reducing photoelectric conversion device.
A first aspect of the present invention provides a kind of photoelectric conversion device that comprises pixel region, the electric charge that described pixel region has optical-electrical converter and is used for being produced by described optical-electrical converter is sent to the transmission MOS transistor of the diffusion of floating, described device comprises: first dielectric film, described first dielectric film is arranged as continuously covers described optical-electrical converter, first side surface of the gate electrode of described transmission MOS transistor, and the first area of the upper surface of described gate electrode, and be not disposed on the second area of upper surface of described gate electrode, described first dielectric film is configured to as anti-reflective film; The contact plug that is connected with the described diffusion of floating; And second dielectric film, described second dielectric film is arranged as continuously covers the described periphery of the contact plug on spreading and second side surface and the second area of described gate electrode floated, and be not disposed on the first area, described second dielectric film is configured to be used as the etching stopping body in forming described contact plug.
A second aspect of the present invention provides a kind of photoelectric conversion device that comprises pixel region and peripheral circuit region, the electric charge that described pixel region has optical-electrical converter and is used for being produced by described optical-electrical converter is sent to the transmission MOS transistor of the diffusion of floating, described peripheral circuit region has a plurality of MOS transistor and from described pixel region read output signal, described device comprises: first contact plug that is connected with the described diffusion of floating; First dielectric film, described first dielectric film cover the gate electrode of periphery, described optical-electrical converter and the described transmission MOS transistor of first contact plug in the described diffusion of floating; The impurity diffusion zone of at least one MOS transistor in second contact plug, described second contact plug and described a plurality of MOS transistor is connected; And second dielectric film, described second dielectric film covers the periphery of second contact plug on the described impurity diffusion zone and the gate electrode of described at least one MOS transistor, and wherein said second dielectric film is not disposed on the gate electrode of described transmission MOS transistor.
A third aspect of the present invention provides a kind of camera, and it comprises: as the photoelectric conversion device that limits in a first aspect of the present invention or second aspect; And processing unit, described processing unit is configured to handle the signal from described photoelectric conversion device output.
From becoming clear below with reference to the more feature of the present invention the description of the exemplary embodiment of accompanying drawing.
Description of drawings
Figure 1A and Figure 1B are the figure that the layout of photoelectric conversion device is shown;
Fig. 2 A and Fig. 2 B are the sectional views that illustrates according to the layout of the photoelectric conversion device of first embodiment;
Fig. 3 A and Fig. 3 B are the sectional views that illustrates according to the layout of the photoelectric conversion device of second embodiment;
Fig. 4 A and Fig. 4 B are the sectional views that illustrates according to the layout of the photoelectric conversion device of the 3rd embodiment; And
Fig. 5 A and Fig. 5 B are the sectional views that illustrates according to the layout of the photoelectric conversion device of the 4th embodiment.
Embodiment
Photoelectric conversion device according to the embodiment of the invention comprises pixel region, and this pixel region comprises that optical-electrical converter and the electric charge that is used for being produced by optical-electrical converter are sent to the transmission MOS transistor of the diffusion of floating.Pixel region typically can comprise one dimension or a plurality of pixels of arranging two-dimensionally.Each pixel can comprise optical-electrical converter at least and transmit MOS transistor.Each pixel can also comprise the amplifier MOS transistor that is used to read the signal corresponding with the electric charge that is sent to the diffusion of floating.The amplifier MOS transistor can be shared by a plurality of pixels.In addition, each pixel can comprise and is used to make the reset mos transistor that resets of electromotive force of diffusion of floating.Reset mos transistor also can be shared by a plurality of pixels.
The layout of the pixel PIX of photoelectric conversion device will be described illustratively with reference to Figure 1A.Pixel 101 comprises optical-electrical converter 1 at least and transmits MOS transistor 2.In the shown example of Figure 1A, pixel 101 also comprises reset mos transistor 4 and amplifier MOS transistor 6.Optical-electrical converter 1 works as for example photodiode, and it converts incident light to electric charge.Transmit MOS transistor 2 and will be sent to the diffusion 3 of floating by the electric charge that optical-electrical converter 1 produces.Electric charge is sent to the diffusion 3 of floating has changed the electromotive force of diffusion 3 of floating.The gate electrode of amplifier MOS transistor 6 is electrically connected with the diffusion 3 of floating.Amplifier MOS transistor 6 is to the variation corresponding signal of holding wire 7 outputs with the electromotive force of the diffusion 3 of floating.
Source follower circuit as amplifier circuit can be formed by power supply (power line) Vdd, amplifier MOS transistor 6, holding wire 7 and constant-current source 8.Select MOS transistor 5 to be disposed between power line Vdd and the amplifier MOS transistor 6 or between amplifier MOS transistor 6 and holding wire 7, and be switched on so that selects to select the affiliated pixel 101 of MOS transistor 5.Can omit and select MOS transistor 5, and can select pixel by the reset potential of the diffusion of floating by reset mos transistor 4 controls.
The layout of photoelectric conversion device will be described illustratively with reference to Figure 1B.Photoelectric conversion device comprises pixel region 601 and the peripheral circuit region 602 with at least one pixel 101.Typically, a plurality of pixels 101 can be arranged in the pixel region 601.Peripheral circuit region 602 is the zones except that pixel region 601.Peripheral circuit region 602 can comprise the scanning circuit 603 of the pixel that will transmit signal 101 that is used for selecting pixel region 601 and be used to handle from the Signal Processing circuit (reading circuit) 604 of selected pixel 101 outputs.
Fig. 2 A and Fig. 2 B are the sectional views that illustrates according to the layout of the photoelectric conversion device of first embodiment.Fig. 2 A is the sectional view of a part that the pixel 101 of pixel region 601 is shown.Fig. 2 B is the sectional view that the part of peripheral circuit region 602 is shown.Reference numeral 31 expressions transmit the gate electrode of MOS transistor 2; The gate electrode of 32 expression reset mos transistors 4; 30 expressions are used for the gate insulating film of MOS transistor; And the semiconductor region of first conduction type of a semiconductor region of 33 expression formation optical-electrical converters 1.Notice that first conduction type has electric charge as signal as majority carrier, and if be electronics then first conduction type is the n type as the electric charge of signal.On the contrary, be the hole if be used as the electric charge of signal, then first conduction type is the p type.At hypothesis first conduction type is under the situation of n type present embodiment to be described.
Reference numeral 39 expression as with the trap of the semiconductor region of second conduction type of first conductivity type opposite; 38 expression Semiconductor substrate; And the semiconductor region of 35 second conduction types that are expressed as follows, promptly the semiconductor region of this second conduction type is used to make the semiconductor region 33 of first conduction type of a semiconductor region that forms optical-electrical converter 1 to have the structure of imbedding.The diffusion 3 of floating is formed in the trap 39.Reference numeral 34 expressions are applied with the semiconductor region of first conduction type of reset potential, and it is as the drain electrode (impurity diffusion zone) of reset mos transistor 4.
Reference numeral 45 expression element-isolating films (Si oxide).The element separation method comprises LOCOS, STI and table top (mesa) type method, and can use any method in them.Diffusion is isolated can be used as the element separation method.Reference numeral 36a represents silicon nitride; And 37a represents to cover the Si oxide of silicon nitride 36a.The combination of silicon nitride 36a and Si oxide 37a has the effect of the lip-deep reflection that reduces optical-electrical converter 1.On the second side surface SS2 of gate electrode 31, silicon nitride 36a forms the side distance piece that contacts with the second side surface SS2 of gate electrode 31 with Si oxide 37a.For example, the thickness of silicon nitride 36a can be set at 15~85nm, and the thickness of Si oxide 37a is set at 250nm or littler.First dielectric film 10 that is formed by silicon nitride 36a and Si oxide 37a is arranged as covering optical-electrical converter 1 continuously, is transmitted the first side surface SS1 and the first area US1 on the upper surface of the gate electrode 31 that transmits MOS transistor 2 of the gate electrode 31 of MOS transistor 2.Notice that first dielectric film 10 is not limited to the combination of silicon nitride 36a and Si oxide 37a, and can be formed by for example monolayer silicon nitride.The gate insulating film 30b that gate insulating film 30 extends is set at first dielectric film, 10 belows.
The source electrode that transmits MOS transistor 2 is common with the semiconductor region 33 of a semiconductor region that forms optical-electrical converter 1.Float diffusion 3 also as the drain electrode that transmits MOS transistor 2 or the source electrode of reset mos transistor 4.The diffusion 3 of floating is connected with the gate electrode of amplifier MOS transistor 6 via contact plug 41a1.In addition, semiconductor region 34 is connected with reset voltage line VRES (not shown) via contact plug 41a2.
Fig. 2 B illustrates the layout of at least one MOS transistor in a plurality of MOS transistor of peripheral circuit region 602.The gate electrode of the MOS transistor of Reference numeral 42 expression peripheral circuit regions 602; 43 expressions have the semiconductor region (impurity diffusion zone) of first conduction type of high impurity concentration, and it is used separately as source electrode and drain electrode; And 44 expressions have the semiconductor region of first conduction type of the low impurity concentration lower than the impurity concentration of semiconductor region 43, are used to provide the LDD structure.Silicon nitride 36b forms the side distance piece that contacts with the side surface of gate electrode 42 with Si oxide 37b.
In same depositing step, utilize same material to come deposit silicon nitride 36a and 36b.In same depositing step, utilize same material to come deposit silicon oxide 37a and 37b.In this case, can determine material and the thickness of silicon nitride 36a and 36b and Si oxide 37a and 37b, make obtain the suitable size of the side distance piece that contacts with the gate electrode of MOS transistor and the anti-reflection effect of optical-electrical converter 1.In this example, use silicon nitride 36a and 36b and Si oxide 37a and 37b.Yet, can form first dielectric film 10 by the monolayer silicon nitride.
The reset mos transistor 4 of illustrative pixel region 601 has and the similar LDD structure of the MOS transistor of peripheral circuit region 602 among Fig. 2 A.That is, the diffusion of floating 3 comprises the semiconductor region with low impurity concentration (n-) that is used to provide the LDD structure.Though not shown in Fig. 2 A, the MOS transistor except that the reset mos transistor 4 of pixel 101 (for example, amplifier MOS transistor and selection MOS transistor) also can have the LDD structure.In first embodiment, can form silicon nitride 36a and 36b simultaneously.Can also form Si oxide 37a and 37b simultaneously.This provides the advantage that reduces manufacturing cost.
In the dry etching that is used to form the side distance piece, on optical-electrical converter 1, there is first dielectric film 10.This has protection optical-electrical converter 1 and avoids effect by the caused damage of etching.In order to protect optical-electrical converter 1, even expectation also is formed on the optical-electrical converter 1 when first dielectric film 10 is designed to misalignment occur in forming figure.For this reason, first dielectric film 10 covers the first side surface SS1 and first area US1 so that be pressed on the part (first area) of upper surface of the gate electrode 31 that transmits MOS transistor 2.First dielectric film 10 can partly be pressed on the element-isolating film.
Can use first dielectric film 10 (36a and 37a) on the optical-electrical converter 1 as the impurity diffusion zone 34 and the mask of diffusion 3 of floating of reset mos transistor 4 that is used for inject forming impurity diffusion zone (high impurity concentration district) 43, the pixel 101 of the MOS transistor of peripheral circuit region 602 by ion.
Reference numeral 11 is illustrated in second dielectric film that is used for being used as the etching stopping body in interlayer dielectric 40 is formed for forming the anisotropic dry etch of contact hole of contact plug 41a1 and 41a2 and contact plug 41b.Second dielectric film 11 can be a silicon nitride for example.The resist figure that is used to form the contact hole of contact plug may enter the zone of element-isolating film 45 owing to misalignment.Owing to there is second dielectric film 11 that has high etching selection ratio with respect to interlayer dielectric 40, therefore the bottom of contact hole (contact plug) does not contact with trap 39 on the side surface with the bottom of element-isolating film 45 when etching interlayer dielectric 40.Therefore, can suppress the impurity diffusion zone (source electrode or drain electrode) of MOS transistor and flowing of the electric current between the trap 39 in operation.This effect is as described at the open No.2004-228425 of Japan Patent.Similarly, can suppress owing to penetrating that the misalignment that is used to form the contact hole that is designed to the contact plug that is connected with gate electrode causes.As mentioned above, can use second dielectric film 11 to realize wherein realizing meticulous dot structure thus in the little layout of covering nargin between contact plug and the diffusion layer or between contact plug and gate electrode.
First dielectric film 10 is not disposed on the second area US2 of upper surface of the gate electrode 31 that transmits MOS transistor 2.Second dielectric film 11 is arranged as the periphery that covers the contact plug 41a1 in the diffusion 3 of floating and the second area US2 and the second side surface SS2 of gate electrode 31 continuously, but is not disposed on the US1 of first area.That is, first dielectric film 10 and second dielectric film 11 are transmitting on the gate electrode 31 of MOS transistor 2 each other not crossover.In other words, the upper surface of first dielectric film 10 on the gate electrode 31 that transmits MOS transistor 2 contacts with the interlayer dielectric 40 that wherein is formed with contact plug.In other words, first dielectric film only is disposed on the first area of upper surface of gate electrode, and second dielectric film only is disposed on the second area different with the first area of upper surface of gate electrode.Utilize this structure, with first dielectric film 10 wherein and second dielectric film 11 on gate electrode 31 each other the layout of crossover compare, can reduce the section poor (step) of photoelectric conversion device, improve sensitivity thus and F counts proportionality.The first side surface SS1 of the gate electrode 31 of transmission MOS transistor is as the side surface of optical-electrical converter 1 side of the gate electrode that transmits MOS transistor.The second side surface SS2 that transmits the gate electrode 31 of MOS transistor spreads the side surface of 3 sides as floating of the gate electrode that transmits MOS transistor.The first area US1 of the upper surface of gate electrode 31 is zones of 1 side of the optical-electrical converter on the upper surface of gate electrode 31 compared with second area US2.
Interlayer dielectric 40 is formed on second dielectric film 11.Interlayer dielectric 40 can be for example NSG film, bpsg film or HDP-SiO film, but can be other film.Use makes the flattening surface of interlayer dielectric 40 such as the flattening method of CMP technology.Polished amount in the CMP technology (minimizing of the thickness that is caused by CMP technology) depends on that the section on surface of the interlayer dielectric 40 before CMP technology is poor.Along with the increase of section difference, it is bigger that polished amount becomes.If it is bigger that polished amount becomes, then the variation in the face of polished amount correspondingly increases.Consider the interior variation of face of polished amount, the thickness of the interlayer dielectric 40 after CMP technology is set to for the enough thickness of stable management.Therefore, along with the section difference that was close to before CMP technology is more little, can after CMP technology, obtain thin more interlayer dielectric 40.In pixel 101, the height that the aspect ratio apart from trap 39 or Semiconductor substrate in zone that wherein is furnished with the gate electrode of the MOS transistor such as transmitting MOS transistor 2 wherein is furnished with the zone of optical-electrical converter 1 has exceeded the thickness of gate electrode.Therefore, by using wherein first dielectric film 10 and second dielectric film 11 in MOS transistor, particularly transmit on the gate electrode 31 of MOS transistor 2 each other the not structure of crossover, can form thin interlayer dielectric 40.This can improve sensitivity and F counts proportionality.As mentioned above, expectation be, as first dielectric film 10 of anti-reflective film be pressed in as inevitably with the part (first area US1) of the gate electrode 31 of the transmission MOS transistor 2 of the contiguous MOS transistor of optical-electrical converter 1 on.Transmit the diffusion 3 of floating that MOS transistor 2 has a main electrode of conduct (impurity diffusion zone) that is connected with contact plug 41a1.Be arranged as the periphery that covers the contact plug 41a1 in the diffusion 3 of floating and the second area US2 and the second side surface SS2 of gate electrode 31 continuously as second dielectric film 11 of etching stopping body.This be because, be used to form contact plug contact hole the resist figure may since misalignment be disposed on the part that spreads except that floating 3.That is, but first dielectric film 10 and second dielectric film, 11 boths are pressed on the gate electrode 31 their crossovers not each other on gate electrode 31.This provides the thickness that reduces interlayer dielectric 40, has been the advantage of the thickness of structure on the optical-electrical converter 1.
In the present embodiment, illustration CMP is as flattening method.Yet, even adopt other flattening method also can obtain same effect.Though not shown, if exist gate electrode 31 wherein to be pressed in part on the element-isolating film 45, and first dielectric film 10 exists thereon, hope bigger effect then in advance.Yet, the invention is not restricted to this layout.
In Fig. 2 A and Fig. 2 B, omitted the structure such as wiring layer, colour filter and lenticule.Yet photoelectric conversion device has wiring layer naturally, and can comprise colour filter and/or lenticule.
Fig. 3 A and Fig. 3 B are the sectional views that illustrates according to the layout of the photoelectric conversion device of second embodiment.Fig. 3 A is the sectional view of a part that the pixel 101 of pixel region 601 is shown.Fig. 3 B is the sectional view that the part of peripheral circuit region 602 is shown.Here the details of specifically not mentioning is abideed by first embodiment.In a second embodiment, except first dielectric film 10 and second dielectric film 11 on the gate electrode 31 that transmits MOS transistor 2 each other not the layout of crossover, first dielectric film 10 and second dielectric film 11 also crossover not each other on optical-electrical converter 1.For example, first dielectric film 10 can have the structure of piling up that comprises silicon nitride 36a and Si oxide 37a, and second dielectric film 11 can be formed by the monolayer silicon nitride.Aspect the anti-reflection effect of optical-electrical converter 1, if second dielectric film 11 has the refractive index different with the refractive index of Si oxide 37a, then the reflectivity on the interface between second dielectric film 11 and the Si oxide 37a can rise, and has reduced anti-reflection effect thus.In a second embodiment, can utilize the layout of second dielectric film 11 that does not wherein form optical-electrical converter 1 to suppress the reduction of anti-reflection effect.
Fig. 4 A and Fig. 4 B are the sectional views that illustrates according to the layout of the photoelectric conversion device of the 3rd embodiment.Fig. 4 A is the sectional view of a part that the pixel 101 of pixel region 601 is shown.Fig. 4 B is the sectional view that the part of peripheral circuit region 602 is shown.Here the details of specifically not mentioning is abideed by first or second embodiment.In the 3rd embodiment, the impurity diffusion zone of the MOS transistor of arranging in the pixel region 601 that comprises pixel 101 (more particularly, float diffusion 3, the impurity diffusion zone (semiconductor region 34) of reset mos transistor 4 and the impurity diffusion zone of other MOS transistor) has the low impurity concentration of impurity concentration than the impurity diffusion zone 43 of the MOS transistor with LDD structure of arranging in peripheral circuit region 602.That is, being arranged in the impurity diffusion zone of the MOS transistor in the pixel region 601 can be only be made of semiconductor region with low impurity concentration (n-) and the impurity range that is used for being connected with contact plug.Utilize this structure, can suppress the characteristic degradation that causes owing to the hot carrier in the MOS transistor 2,4,5 and 6 that is arranged in the pixel region 601 that comprises pixel 101, and improve the driving force that is arranged in the MOS transistor in the peripheral circuit region 602.
In the 3rd embodiment, in the pixel region 601 that comprises pixel 101, silicon nitride 36a covers the zone except that the contact plug such as contact plug (first contact plug) 41a1 and 41a2.In pixel region 601, the silicon nitride 36a etching stopping body that acts on self-aligned contacts.In pixel region 601, second dielectric film 11 is disposed on first dielectric film 10, and can be used to prevent that the contact plug such as contact plug 41a2 is formed on the zone of element-isolating film 45.
At least one MOS transistor that is arranged in a plurality of MOS transistor in the peripheral circuit region 602 has the LDD structure.In peripheral circuit region 602, silicon nitride 36b still as the part of the side distance piece that contact with the side surface of the gate electrode 42 of MOS transistor, still separates with contact plug (second contact plug) 41b.Contact plug 41b can be formed by the self-aligned contacts technology.That is, when being used to form the contact hole of contact plug 41b, etching can use second dielectric film 11 of the side distance piece that covering forms by silicon nitride 36b and Si oxide 37b as the etching stopping body.Be furnished with therein in the zone of optical-electrical converter 1, when anti-reflection effect increases, second dielectric film 11 be arranged on first dielectric film 10.
Equally in the 3rd embodiment, first dielectric film 10 and second dielectric film 11 are arranged such that their crossovers not each other on the gate electrode 31 that transmits MOS transistor 2, manage to improve sensitivity thus and F counts proportionality.
Fig. 5 A and Fig. 5 B are the sectional views that illustrates according to the layout of the photoelectric conversion device of the 4th embodiment.Fig. 5 A is the sectional view of a part that the pixel 101 of pixel region 601 is shown.Fig. 5 B is the sectional view that the part of peripheral circuit region 602 is shown.Here the details of specifically not mentioning is abideed by first to the 3rd embodiment.In the 4th embodiment, gate electrode 42 of at least one MOS transistor in a plurality of MOS transistor of peripheral circuit region 602 (requiring MOS transistor faster) and impurity diffusion zone 43 have self-aligned silicide (salicide) structure that comprises metal silicide layer 42a and 43a respectively. Metal silicide layer 42a or 43a are formed by the silicon compound of refractory metal.In pixel region 601, use the self-aligned silicide structure can increase the leakage current of optical-electrical converter 1, cause white defective (white flaw) and dark current thus.Therefore, pixel region 601 does not adopt the self-aligned silicide structure.
Metal silicide layer 42a or 43a can comprise for example Titanium silicide, nickel silicide, cobalt silicide, tungsten silicide, molybdenum silicide, tantalum silicide, chromium silicide, palladium silicide or Platinum Silicide.Be used for preventing that the diaphragm 12 of silication is formed on the zone that does not wherein form silicide layer.Be formed with therein in the zone of first dielectric film 10, owing to suppressed the formation of metal silicide layer, so unnecessary formation diaphragm 12.Therefore can form diaphragm 12 so that the second area US2 and the second side surface SS2 of upper surface that covers the periphery of the contact plug in the impurity diffusion zone (for example, float diffusion 3 and semiconductor region 34) and transmit the gate electrode 31 of MOS transistor 2.If wherein do not have any one zone in first dielectric film 10 and the diaphragm 12 then can form silicide layer because pixel 101 comprises, therefore first dielectric film 10 and diaphragm 12 crossover each other preferably.Note, by before forming second dielectric film 11, forming the dielectric film that is used as diaphragm 12 and removing that part of diaphragm 12 that forms that wherein forms contact hole.
Equally in the 4th embodiment, first dielectric film 10 and second dielectric film 11 are arranged such that their crossovers not each other on the gate electrode 31 that transmits MOS transistor 2, improve sensitivity thus and F counts proportionality.
In the 4th embodiment, first dielectric film 10 with anti-reflection effect has the structure of piling up that comprises silicon nitride 36a and Si oxide 37a, but first dielectric film 10 can be formed by for example monolayer silicon nitride.If for example monolayer silicon nitride 36a forms first dielectric film 10 and is used as the diaphragm that is used for silication, then the thickness of silicon nitride 36a can reduce by etching etc. when forming metal silicide layer.Reducing of thickness by control silicon nitride 36a, silicon nitride can be used to form second dielectric film 11, and comprises that the structure of piling up of silicon nitride 36a and second dielectric film (being silicon nitride in this case) 11 can form anti-reflective film.
Application example as according to the photoelectric conversion device of each embodiment in the foregoing description will illustrate the camera of incorporating photoelectric conversion device into below illustratively.Conceptive its main purpose that not only comprises of camera is the device of taking pictures, and comprises the device (for example, personal computer or portable terminal) that additionally is provided with camera function.Camera comprises illustrative in the above-described embodiments according to photoelectric conversion device of the present invention and be used to handle from the Signal Processing unit of photoelectric conversion device output.Processing unit can comprise A/D converter for example and be used to handle from the processor of the numerical data of A/D converter output.
Though reference example embodiment has described the present invention, should be appreciated that to the invention is not restricted to disclosed exemplary embodiment.Thereby the scope of following claim will be given the wideest explanation comprises all such modifications, equivalent configurations and function.

Claims (15)

1. photoelectric conversion device that comprises pixel region, described pixel region have optical-electrical converter and are used for being sent to the transmission MOS transistor of the diffusion of floating by the electric charge that described optical-electrical converter produces, and described device comprises:
First dielectric film, described first dielectric film is arranged as the first area of the upper surface of first side surface of the gate electrode that covers described optical-electrical converter, described transmission MOS transistor and described gate electrode continuously, and be not disposed on the second area of upper surface of described gate electrode, described first dielectric film is configured to as anti-reflective film;
The contact plug that is connected with the described diffusion of floating; And
Second dielectric film, described second dielectric film is arranged as continuously covers the described periphery of the contact plug on spreading and second side surface and the second area of described gate electrode floated, and be not disposed on the described first area, described second dielectric film is configured to when forming described contact plug as the etching stopping body.
2. device according to claim 1 also comprises:
The side distance piece that contacts with second side surface of described gate electrode,
Wherein said first dielectric film is by forming with described side distance piece identical materials.
3. device according to claim 1 also comprises:
Be used for from the peripheral circuit region of described pixel region read output signal,
Wherein said peripheral circuit region comprises a plurality of MOS transistor, and the side distance piece that contacts with the side surface of gate electrode of at least one MOS transistor in described a plurality of MOS transistor is by forming with the described first dielectric film identical materials.
4. device according to claim 1, wherein said first dielectric film has the structure of piling up that comprises silicon nitride and Si oxide, and described second dielectric film is formed by silicon nitride.
5. device according to claim 1, wherein said first dielectric film is formed by silicon nitride, and described second dielectric film is formed by silicon nitride.
6. device according to claim 1 is furnished with therein wherein that second dielectric film also is disposed on described first dielectric film described in the zone of optical-electrical converter.
7. device according to claim 1 is furnished with therein wherein that second dielectric film is not disposed on described first dielectric film described in the zone of optical-electrical converter.
8. device according to claim 3, the gate electrode and the impurity diffusion zone of at least one MOS transistor in the described a plurality of MOS transistor in the wherein said peripheral circuit region comprise metal silicide layer respectively.
9. device according to claim 8 also comprises:
Diaphragm, described diaphragm cover the second area of gate electrode of described transmission MOS transistor and the periphery of the contact plug in second side surface and the described diffusion of floating,
Wherein said diaphragm prevents in the surface of the diffusion of floating described in the step that forms described metal silicide layer and the silication of described second area experience.
10. device according to claim 9, wherein said diaphragm extend to the second area and second side surface of the gate electrode that also covers described transmission MOS transistor except the first area of the gate electrode of described transmission MOS transistor.
11. device according to claim 1, wherein said first dielectric film and described second dielectric film crossover not each other on described gate electrode.
12. photoelectric conversion device that comprises pixel region and peripheral circuit region, the electric charge that described pixel region has optical-electrical converter and is used for being produced by described optical-electrical converter is sent to the transmission MOS transistor of the diffusion of floating, described peripheral circuit region has a plurality of MOS transistor and from described pixel region read output signal, described device comprises:
First contact plug that is connected with the described diffusion of floating;
First dielectric film, described first dielectric film cover the gate electrode of periphery, described optical-electrical converter and the described transmission MOS transistor of first contact plug in the described diffusion of floating;
The impurity diffusion zone of at least one MOS transistor in second contact plug, described second contact plug and described a plurality of MOS transistor is connected; And
Second dielectric film, described second dielectric film covers the periphery of second contact plug on the described impurity diffusion zone and the gate electrode of described at least one MOS transistor,
Wherein said second dielectric film is not disposed on the gate electrode of described transmission MOS transistor.
13. device according to claim 12 also comprises:
The side surface of the gate electrode of described at least one MOS transistor in the side distance piece, described side distance piece and described peripheral circuit region contacts,
Wherein said side distance piece is by forming with the described first dielectric film identical materials.
14. device according to claim 12, wherein said first dielectric film has the structure of piling up that comprises silicon nitride and Si oxide, and described second dielectric film is formed by silicon nitride.
15. a camera comprises:
According to any one described photoelectric conversion device in the claim 1 to 14; And
Processing unit, described processing unit are configured to handle the signal from described photoelectric conversion device output.
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