CN102244381A - Electrostatic discharge protection circuit - Google Patents

Abstract

The invention provides an electrostatic discharge protection circuit for a liquid crystal display, the liquid crystal display has a signal line and a common wiring, the electrostatic discharge protection circuit includes: a first diode, the anode of which is coupled with the signal line; a first field effect transistor having a first electrode coupled to the cathode of the first diode, a second electrode coupled to the signal line, and a first control electrode; a second diode having an anode coupled to the second electrode and a cathode coupled to the common line; a third diode, the cathode of which is coupled with the signal line and the anode of which is coupled with the second electrode; a second field effect transistor having a third electrode coupled to the cathode of the first diode, a fourth electrode coupled to the anode of the third diode, and a second control electrode coupled to the common line; and a fourth diode having a cathode coupled to the cathode of the first diode and an anode coupled to the common line.

Description

Electrostatic discharge protection circuit

technical field

The present invention relates to an electrostatic discharge protection circuit, and in particular to an electrostatic discharge protection circuit for a liquid crystal display.

Background technique

The multimedia technology in today's society is quite developed, most of which benefit from the progress of semiconductor elements or display devices. As far as displays are concerned, liquid crystal displays with superior characteristics such as high image quality, good space utilization efficiency, low power consumption, and no radiation have gradually become the mainstream of the market. Generally, during the manufacturing process of liquid crystal displays, operators, machines or testing instruments may be charged with static electricity, and when the above-mentioned charged objects (operators, machines or testing instruments) touch the LCD panel, it may cause liquid crystal display The components and circuits inside the panel are damaged by electrostatic discharge.

The well-known electrostatic discharge (Electrostatic Discharge, ESD) is a phenomenon in which static electricity accumulates and transfers electrostatic charges between different objects. The time when electrostatic discharge occurs is very short, which is nano-second (nano-second) level, and it will generate a high current in such a short time, usually as high as several amperes (amper), once such a high current flows through Semiconductor integrated circuits, usually make it damaged.

Therefore, in the semiconductor circuit, the electrostatic discharge protection circuit between the power lines must provide a discharge path when high-voltage static electricity is generated, so that the semiconductor integrated circuit will not be damaged. The traditional liquid crystal display has an electrostatic discharge protection circuit between each scanning line (gate line) and common wiring (common line) and between each data line (data line) and common wiring to protect each Pixel transistors will not be damaged by high voltage static electricity. Please refer to FIG. 1 , which shows a circuit diagram of a conventional ESD protection circuit for a liquid crystal display. The electrostatic discharge protection circuit 100 is coupled between the scan line (gate line) and the common wiring, and is composed of six back-to-back diodes (diodes), respectively D(1)˜D(6). And back-to-back diodes D(1)-D(3) are connected in series to form a first discharge path R1 and back-to-back diodes D(4)-D(6) are connected in series to form a second discharge path R2. When static electricity is generated on the scanning line, the electrostatic current can be discharged to the common wiring through the discharge path R2, or when static electricity is generated on the common wiring, the electrostatic current can be discharged to the scanning line through the discharging path R1.

However, in the design of this kind of ESD protection circuit 100, a plurality of back-to-back diodes are connected in series, because the area occupied by the channel (channel width) of back-to-back diodes D(1)-D(6) is too large, making the entire ESD protection The area of the circuit layout of the circuit 100 increases. In this way, the area of the liquid crystal display panel will be increased, and it is not convenient to reduce the size of the liquid crystal display.

Contents of the invention

In order to solve the above-mentioned technical problems, an aspect of the present invention proposes an electrostatic discharge protection circuit for a liquid crystal display, the liquid crystal display has a signal line and a shared wiring, the electrostatic discharge protection circuit includes: a first diode , its anode is coupled to the signal line; a first field effect transistor has a first electrode, a second electrode and a first control electrode, the first electrode is coupled to the cathode of the first diode, the first control The electrode is coupled to the signal line; a second diode, whose anode is coupled to the second electrode, and whose cathode is coupled to the common wiring; a third diode, whose cathode is coupled to the signal line, and whose anode is coupled to On the second electrode; a second field effect transistor has a third electrode, a fourth electrode and a second control electrode, the third electrode is coupled to the cathode of the first diode, and the fourth electrode is coupled to the first diode The positive poles of the three diodes, the second control electrode is coupled to the common wiring; and a fourth diode, the negative pole of which is coupled to the negative pole of the first diode, and its positive pole is coupled to the common wiring; wherein, When a first electrostatic charge is generated on the signal line, the voltage corresponding to the first electrostatic charge makes the first diode, the first field effect transistor and the second diode conduct, so that the first electrostatic charge passes through the first A diode, the first field effect transistor and the second diode are discharged to the common wiring; when a second electrostatic charge is generated on the common wiring, the voltage corresponding to the second electrostatic charge makes the third diode , the second field effect transistor and the fourth diode are turned on, so that the second electrostatic charge is discharged to the signal line through the third diode, the second field effect transistor and the fourth diode.

Another aspect of the present invention provides an electrostatic discharge protection circuit for a liquid crystal display, the liquid crystal display has a signal line and a common wiring, it is characterized in that the electrostatic discharge protection circuit includes: a first diode , its anode is coupled to the signal line; a first field effect transistor has a first electrode, a second electrode and a first control electrode, the first electrode and the first control electrode are coupled to the first diode Negative electrode; a second diode, whose anode is coupled to the second electrode, and whose cathode is coupled to the common wiring; a third diode, whose cathode is coupled to the signal line, and whose anode is coupled to the second electrode; A second field effect transistor has a third electrode, a fourth electrode and a second control electrode, the third electrode and the second control electrode are coupled to the cathode of the first diode, and the fourth electrode is coupled to the first diode The anodes of the three diodes; and a fourth diode, the cathode of which is coupled to the cathode of the first diode, and the anode of which is coupled to the common wiring; wherein, when a first electrostatic charge is generated on the signal line When, the voltage corresponding to the first electrostatic charge turns on the first diode, the first field effect transistor and the second diode, so that the first electrostatic charge passes through the first diode, the first field effect transistor and the second diode. The second diode discharges to the common wiring; when a second electrostatic charge is generated on the common wiring, the voltage corresponding to the second electrostatic charge makes the third diode, the second field effect transistor and the fourth diode The transistor is turned on, so that the second electrostatic charge is discharged to the signal line through the third diode, the second field effect transistor and the fourth diode.

Preferably, the above-mentioned first field effect transistor/second field effect transistor is an N-channel field effect transistor.

Preferably, the above-mentioned N-channel field effect transistor is an N-channel metal-oxide-semiconductor field effect transistor.

Preferably, the above-mentioned first field effect transistor/second field effect transistor is a P-channel field effect transistor.

Preferably, the P-channel field effect transistor is a P-channel metal-oxide-semiconductor field effect transistor.

Preferably, the above-mentioned signal lines are scanning lines.

Preferably, the above signal lines are data lines.

Preferably, the above-mentioned first field effect transistor and the above-mentioned second field effect transistor have the same structure.

Preferably, the above-mentioned first diode, the above-mentioned second diode, the above-mentioned third diode and the above-mentioned fourth diode have the same structure.

As can be seen from the above, the electrostatic discharge protection circuit proposed by the present invention has a discharge capacity equivalent to that of the existing electrostatic discharge protection circuit, but because the circuit does not use a structure of multiple diodes in series, the entire electrostatic discharge The area of the circuit layout of the protection circuit is reduced, thereby reducing the area of the liquid crystal display panel.

Description of drawings

FIG. 1 shows a circuit diagram of an existing electrostatic discharge protection circuit for a liquid crystal display;

FIG. 2 illustrates a circuit diagram of an electrostatic discharge protection circuit according to an embodiment of the present invention;

FIG. 3 illustrates a circuit diagram of an ESD protection circuit according to another embodiment of the present invention.

Detailed ways

The embodiments of the present invention will be clearly explained below with the accompanying drawings and detailed description. For the sake of simplifying the accompanying drawings, some known and commonly used structures and components will be shown in a simple and schematic manner in the accompanying drawings.

Referring to FIG. 2 , FIG. 2 illustrates a circuit diagram of an electrostatic discharge protection circuit according to an embodiment of the present invention. In this embodiment, the electrostatic discharge protection circuit 200 is used in a liquid crystal display, especially for a thin film transistor liquid crystal display (Thin Film Transistor-Liquid Crystal Display, TFT-LCD), and the liquid crystal display has a signal line and a common The signal line can be a scan line or a data line.

As shown in Figure 2, the ESD protection circuit 200 includes: a first diode D1, a first field effect transistor Q1, a second diode D2, a third diode D3, a second field effect transistor Tube Q2 and a fourth diode D4.

As shown in Figure 2, the anode of the first diode D1 is coupled to the signal line; the first field effect transistor Q1 has a first electrode, a second electrode and a first control electrode, and the first electrode is coupled to the The cathode of the first diode D1 and the first control electrode are coupled to the signal line. In this embodiment, the first field effect transistor Q1 is an N-channel field effect transistor, preferably an N-channel metal-oxide -Semiconductor Field Effect Transistor, and in this embodiment, the first electrode is the source, the second electrode is the drain and the first control electrode is the gate, but it should be noted that the first electrode can also be set as the drain . The second electrode is set as the source, and it is not limited thereto. It should also be noted that, in some other embodiments, the first field effect transistor Q1 can be a P-channel field effect transistor, preferably a P-channel field effect transistor. metal-oxide-semiconductor field effect transistor; the second diode D2, its positive pole is coupled to the second electrode, and its negative pole is coupled to the common wiring; the third diode D3, its negative pole is coupled to the signal line, its The anode is coupled to the second electrode of the first field effect transistor Q1; the second field effect transistor Q2 has a similar structure to the first field effect transistor Q1, that is, it has a third electrode, a fourth electrode and a second electrode. control electrodes, the third electrode is coupled to the cathode of the first diode D1, the fourth electrode is coupled to the anode of the third diode D3, and the second control electrode is coupled to the common wiring. In this embodiment, The second field effect transistor Q2 is an N-channel field effect transistor, preferably an N-channel metal-oxide-semiconductor field effect transistor, and in this embodiment, the third electrode is the source, and the fourth electrode is the drain. The pole and the second control electrode are gates, but it should be noted that the first electrode can also be set as a drain, and the second electrode can be set as a source. In the embodiment, when the first FET Q1 is a P-channel FET, the second FET Q2 can also be a P-channel FET, preferably, a P-channel metal-oxide-semiconductor field effect tube; the fourth diode D2, the cathode of which is coupled to the cathode of the first diode D1, and the anode of which is coupled to the common wiring.

In this embodiment, when a first electrostatic charge q1 is generated on the signal line, the voltage corresponding to the electrostatic charge q1 is V1, and when the voltage V1 makes the first diode D1, the first field effect transistor Q1 and When the second diode D2 is turned on, then at this time, the first electrostatic charge q1 is discharged to the common wiring through the first diode D1, the first field effect transistor Q1 and the second diode D2; When a second electrostatic charge q2 is generated on the common wiring, the voltage corresponding to the electrostatic charge q2 is V2, and when the voltage V2 makes the third diode D3, the second field effect transistor Q2 and the fourth diode D4 When it is turned on, at this time, the second electrostatic charge q2 will be discharged to the signal line through the third diode D3, the second field effect transistor Q2 and the fourth diode D4.

The solution proposed by the present invention and its superiority will be described below in conjunction with the specific parameters of each component. In this embodiment, the first field effect transistor Q1 and the second field effect transistor Q2 are N-channel metal-oxide-semiconductor field effect transistors. The voltage V1 corresponding to the first electrostatic charge q1 generated on the signal line is 15V. If no electrostatic charge is generated on the common wiring at this time, that is, V2=0, the voltage drop when the diodes D1, D2, D3 and D4 are turned on is 5V , and V1 is less than the breakdown voltage of the diode, since the signal line is coupled to the anode of the first diode D1 and coupled to the cathode of the third diode D3, and the diode has a reverse cut-off characteristic, therefore, V1 will make the first diode D1 conduct, while the third diode remains in the cut-off state. When the first diode D1 is turned on, then V1 becomes 10V after passing through D1, that is, the first electrode voltage of the first field effect transistor Q1 is 10V, and the first control electrode of the first field effect transistor Q1 is 15V, At this time, a positive bias is formed for the first field effect transistor Q1, because in this embodiment, the first field effect transistor Q1 is an N-channel metal-oxide-semiconductor field effect transistor, and according to its characteristics, the first field effect transistor Q1 is The field effect transistor Q1 will be turned on, then V1 will generate a voltage drop on the first field effect transistor Q1 after generating a voltage drop on the first diode D1. This voltage drop can be variable, for example, 4V, but Not limited to this, then V1 becomes 6V after passing through Q1. When the first field effect transistor Q1 is turned on, the voltage at its second electrode is 6V, which will make the second diode D2 turn on. As for the second field effect transistor Q2, since the voltage of the second control electrode is 0V, the third electrode is 10V, and the fourth electrode is 6V, the positive bias is not formed for the second field effect transistor Q2, so the second field effect transistor Q2 The effect tube is not conducting. As for the fourth diode D4, because its cathode is coupled to the cathode of the first diode D1, according to its characteristics, the fourth diode D4 is not conducting. It can be seen from the above that when a certain static charge q1 is formed at the signal line, at this time, the first diode D1, the first field effect transistor Q1 and the second diode D2 are turned on, that is, the static electricity generated at the signal line Charges can be discharged to the common wiring through the first diode D1, the first field effect transistor Q1 and the second diode D2. In this embodiment, only the signal line generates electrostatic charge, and the common wiring does not generate electrostatic charge. In some other embodiments, if the common wiring generates electrostatic charge, but the signal line does not generate electrostatic charge , then the voltage V2 corresponding to the second electrostatic charge q2 generated on the common wiring will turn on the fourth diode D4, the second field effect transistor Q2 and the third diode D3, so that the second electrostatic charge q2 passes through The fourth diode D4, the second field effect transistor Q2 and the third diode D3 discharge to the signal line. In addition, in some other embodiments, when the electrostatic charge is generated at the signal line and the common wiring, simultaneous discharge can be realized. As can be seen from the foregoing, in this embodiment, its discharge capacity is comparable to that achieved by connecting three diodes in series with the existing ESD protection circuit (as shown in Figure 1 ). However, in this embodiment, it does not use Connecting multiple (such as 3) diodes in series will make the layout design easier.

Referring to FIG. 3 , FIG. 3 illustrates a circuit diagram of an ESD protection circuit according to another embodiment of the present invention. The difference between the ESD protection circuit 300 in the embodiment shown in FIG. 3 and the ESD protection circuit 200 in the embodiment shown in FIG. 2 is that the first control electrode of the first field effect transistor Q1 is connected to the first electrode and then coupled to the The cathode of the first diode and the third control electrode of the second diode Q2 are connected to the first electrode and then coupled to the cathode of the first diode and the second control electrode of the second diode Q2 After being connected with the third electrode, it is coupled to the cathode of the fourth diode D4. In this embodiment, after the aforementioned connections, the effect of Q1 is equivalent to that of diode D1, whose forward direction is coupled to the negative pole of D1, and the effect of Q2 is equivalent to that of D4, whose forward direction is coupled to the negative electrode of D4. catch. According to the foregoing and the characteristics of the diode, it can be known that when the charge is generated on the signal line, the first diode D1, the first field effect transistor Q1 and the second diode D2 will be turned on, that is, the static electricity generated at the signal line will Charges can be discharged to the common wiring through the first diode D1, the first field effect transistor Q1 and the second diode D2. On the contrary, when the electrostatic charge generated at the common wiring place will make the fourth diode D4, the second field effect transistor Q2 and the third diode D3 conduction, that is, the electrostatic charge generated at the common wiring place will pass through The fourth diode D4, the second field effect transistor Q2 and the third diode D3 discharge to the signal line.

As can be seen from the above, the electrostatic discharge protection circuit proposed by the present invention has a discharge capacity equivalent to that of the existing electrostatic discharge protection circuit, but because the circuit does not use a structure of multiple diodes in series, the entire electrostatic discharge The area of the circuit layout of the protection circuit is reduced, thereby reducing the area of the liquid crystal display panel.

Hereinbefore, specific embodiments of the present invention have been described with reference to the accompanying drawings. However, those skilled in the art can understand that without departing from the spirit and scope of the present invention, various changes and substitutions can be made to the specific embodiments of the present invention. These changes and substitutions all fall within the scope defined by the claims of the present invention.

Claims (10)

1. An electrostatic discharge protection circuit for a liquid crystal display, the liquid crystal display has a signal line and a common wiring, it is characterized in that the electrostatic discharge protection circuit comprises: a first diode, the anode of which is coupled to the signal line; A first field effect transistor has a first electrode, a second electrode and a first control electrode, the first electrode is coupled to the cathode of the first diode, and the first control electrode is coupled to on said signal line; a second diode, the anode of which is coupled to the second electrode, and the cathode of which is coupled to the common wiring; a third diode, the cathode of which is coupled to the signal line, and the anode of which is coupled to the second electrode; A second field effect transistor has a third electrode, a fourth electrode and a second control electrode, the third electrode is coupled to the cathode of the first diode, and the fourth electrode is coupled to the the anode of the third diode, the second control electrode coupled to the common wiring; and a fourth diode, the cathode of which is coupled to the cathode of the first diode, and the anode of which is coupled to the common wiring; Wherein, when a first electrostatic charge is generated on the signal line, the voltage corresponding to the first electrostatic charge makes the first diode, the first field effect transistor and the second diode The tube is turned on, so that the first electrostatic charge is discharged to the common wiring through the first diode, the first field effect transistor and the second diode; when a second electrostatic charge When generated on the common wiring, the voltage corresponding to the second electrostatic charge turns on the third diode, the second field effect transistor and the fourth diode, so that the The second electrostatic charge is discharged to the signal line through the third diode, the second field effect transistor and the fourth diode. 2. An electrostatic discharge protection circuit for a liquid crystal display, the liquid crystal display has a signal line and a shared wiring, it is characterized in that the electrostatic discharge protection circuit comprises: a first diode, the anode of which is coupled to the signal line; A first field effect transistor having a first electrode, a second electrode and a first control electrode, the first electrode and the first control electrode are coupled to the cathode of the first diode; a second diode, the anode of which is coupled to the second electrode, and the cathode of which is coupled to the common wiring; a third diode, the cathode of which is coupled to the signal line, and the anode of which is coupled to the second electrode; A second field effect transistor has a third electrode, a fourth electrode and a second control electrode, the third electrode and the second control electrode are coupled to the cathode of the first diode, so The fourth electrode is coupled to the anode of the third diode; and A fourth diode, the cathode of which is coupled to the cathode of the first diode, and the anode of which is coupled to the common wiring. Wherein, when a first electrostatic charge is generated on the signal line, the voltage corresponding to the first electrostatic charge makes the first diode, the first field effect transistor and the second diode The tube is turned on, so that the first electrostatic charge is discharged to the common wiring through the first diode, the first field effect transistor and the second diode; when a second electrostatic charge When generated on the common wiring, the voltage corresponding to the second electrostatic charge turns on the third diode, the second field effect transistor and the fourth diode, so that the The second electrostatic charge is discharged to the signal line through the third diode, the second field effect transistor and the fourth diode. 3. The circuit according to claim 1 or 2, wherein the first field effect transistor/second field effect transistor is an N-channel field effect transistor. 4. The circuit according to claim 3, wherein the N-channel field effect transistor is an N-channel metal-oxide-semiconductor field effect transistor. 5. The circuit according to claim 1 or 2, wherein the first field effect transistor/second field effect transistor is a P-channel field effect transistor. 6. The circuit according to claim 5, wherein the P-channel field effect transistor is a P-channel metal-oxide-semiconductor field effect transistor. 7. The circuit according to claim 1 or 2, wherein the signal lines are scan lines. 8. The circuit according to claim 1 or 2, wherein the signal line is a data line. 9. The circuit according to claim 1 or 2, wherein the first field effect transistor and the second field effect transistor have the same structure. 10. The circuit according to claim 1 or 2, wherein the first diode, the second diode, the third diode and the fourth diode are identical structure.

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