CN102231608A - DC (direct current) loop-current suspension device for inverter parallel system - Google Patents
DC (direct current) loop-current suspension device for inverter parallel system Download PDFInfo
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Abstract
The invention discloses a DC (direct current) loop-current suspension device for an inverter parallel system. According to the invention, a DC loop-current control device is added to the control circuit of the existing inverter parallel system, the DC loop-current control device is composed of a voltage DC component suspension circuit. Each inverter module in the parallel system has an independent DC component suspension circuit, a voltage DC component feedback quantity can be obtained through carrying out differential amplification sampling, low-pass filtering and proportional integral regulation on high-frequency PWM (pulse width modulation) wave between an inverter half-bridge midpoint and a dividing capacitor midpoint, a DC component deviation can be obtained through the comparison between the voltage DC component feedback quantity and a voltage DC component reference value, and the DC component deviation is added to an inversion reference voltage, and then the voltage DC component of each inverter can be controlled to be zero through correcting the inversion reference voltage, so that the DC loop-current of the parallel system can be controlled to be zero. The device disclosed by the invention has simple structure and is convenient to implement; and by the adoption of the invention, the characteristics of the original parallel system are maintained, and the DC loop-current of the parallel system can be eliminated.
Description
Technical field
The invention belongs to the inverter field, relate to a kind of device that suppresses the inverter parallel system dc loop-current.
Background technology
Along with the development of information technology, the user also improves constantly the requirement of ac power supply capacity and power supply reliability, and inverter redundant parallel technology is the effective technology means that address the above problem.
Inverter current sharing control method mainly contains principal and subordinate's control, sagging control, instantaneous Average Current Control and active power, reactive power and divides equally Current Control, the key of above-mentioned current equalizing method is to realize dividing equally of load current, want the active power of proof load and reactive power mean allocation in each module in parallel, amplitude, phase place and the frequency that will control module inversion output AC voltage in parallel equate constantly, otherwise will produce meritorious circulation, idle circulation.Adopt the flow equalize technology of active power, reactive power method to be based on the method that power averaging is controlled, promptly use the reference voltage of Active Power Controller and reactive power controller control inverter, keep the active power and the reactive power of each inverter output identical, thereby realize the control of dividing equally of load current.Divide equally current control method based on active power, reactive power, because its good equal mobility and reliability is widely used in the middle of actual industrial.
That uses now divides equally the inverter shunting means of Current Control based on active power, reactive power, as shown in Figure 1, this device is made of by CAN bus and synchronous bus parallel connection 2 inversion modules, inversion module 1 comprises main circuit 101, sample circuit 102 and control circuit 103, main circuit 101 adopts the half-bridge inverter structure, comprises the dividing potential drop capacitor C
D1, C
D2, power tube V
1, V
2, filter inductance L
1With filter capacitor C
1, 102 couples of inductive current i of sample circuit
L1With output voltage u
O1Sampling, control circuit 103 comprises phase-locked module, active power P
1And reactive power Q
1Computing module, power conditioning module, sinusoid fiducial ripple generation module, voltage regulator module, current regulator module and PWM driver module are formed; Inversion module 2 is identical with the structure of inversion module 1, comprises main circuit 201, sample circuit 202 and control circuit 203; The current-sharing principle of shunt chopper of dividing equally Current Control based on active power, reactive power is as follows: inversion module 1 obtains average active power P by the CAN bus
*And reactive power Q
*, with the active power of output P of self module
1And reactive power Q
1Comparing obtains corresponding power difference, and power governor obtains voltage magnitude correcting value △ U to active power difference and the adjusting of reactive power difference
1With phasing amount △
1, inversion module is followed the tracks of the synchronous bus voltage-phase by phase-locked loop pll
*, the Voltage Reference amplitude is U
1 *With △ U
1The superimposed amplitude U that promptly obtains the sinusoid fiducial ripple
1, fixed phase
* and △
1The superimposed phase place that promptly obtains the sinusoid fiducial ripple
1, therefore can get sinusoid fiducial voltage: u
Ref1=U
1Sin (
+
1).Feedback voltage u
O1With sinusoid fiducial voltage u
Ref1The comparison difference after voltage regulator is regulated, obtain the current reference i of electric current loop
Ref1, current reference i
Ref1With current feedback value i
L1The comparison difference after the electric current loop adjuster is regulated, obtain modulation voltage u
S1, modulation voltage u
S1After PWM drives link comparison, amplification, obtain driving pulse with carrier wave and remove driving switch pipe V
1And V
2Thereby, make the output voltage of inversion module 1 adjusted, the load current of inversion module 1 is followed the tracks of average current; The Principles of Regulation of inversion module 2 are identical with inversion module 1.
The parallel system of dividing equally Current Control based on active power, reactive power, when inverter adopts the sinusoidal pulse width modulation technology, owing to same brachium pontis up and down inconsistent, the driving pulse of switching tube saturation voltage drop distribute the operational amplifier in asymmetric and the control circuit to have reasons such as null offset, contain DC component U in the middle of can causing inverter output voltage
Dc
Fig. 2 is the dc loop-current equivalent circuit theory figure of two inverter parallel connections.U
Dc1Be the DC component of inverter 1 output voltage, U
Dc2Be the DC component of inverter 2 output voltages, R
Dc1Be the equivalent d.c. resistance of inverter 1, R
Dc2Be the equivalent d.c. resistance of inverter 2, R
LBe load resistance, U
oBe load both end voltage, I
Dc1Be the output DC stream of inverter 1, I
Dc2Be the output DC stream of inverter 2, I
HdcFor flowing through the circulation between inverter 1 and the inverter 2.Can get by Fig. 2:
（3）
Because R
Dc1＜＜R
LR
Dc2＜＜R
LAnd R
Dc1And R
Dc2All less than 1, (1) formula can be approximately:
(4) formula difference substitution (2) formula and (3) formula are got:
（5）
（6）
It is as follows to get the circulation computing formula by (5) formula and (6) formula:
Know by dc loop-current computing formula (7), as the output voltage DC component U of two shunt choppers
Dc1And U
Dc2Can produce dc loop-current when inconsistent, because dc impedance R
Dc1And R
Dc2Very little, small DC voltage difference will produce very big dc loop-current.Dc loop-current not only can make the individual modules overload, also can make the too high protection of inverter DC bus-bar voltage influence the reliability service of parallel system.
Existing inverter parallel system dc loop-current inhibition method is divided into 2 kinds: first kind is to utilize LEM to detect dc loop-current in the inversion filter inductance earlier, utilize the proportionate relationship of DC component in dc loop-current and the output voltage to come indirect regulation inversion fiducial value again, realize the inhibition of dc loop-current.This method has following shortcoming: at first, owing to be indirect control, have only when the dc loop-current significant change and could regulate the inversion benchmark according to the proportionate relationship of dc loop-current and DC voltage difference, exist to lag behind on the adjusting time; Secondly, this method can only be obtained DC voltage difference between the module in parallel according to the proportionate relationship of dc loop-current size and DC voltage difference, how many DC voltage component of can not determine each module specifically is, when multimode is in parallel, adopt this scheme to regulate the dc loop-current of parallel system like this, easily cause individual modules mistuning joint to cause the parallel operation system failure.
Second kind is at first to utilize LEM to detect output voltage on the output filter capacitor of every inverter, through obtaining the output voltage DC component of inverter after the low-pass filtering, every DC component value that inverter is regulated output voltage according to detected DC component is to scheme to suppress the dc loop-current of parallel system.Because this method is to sample on output filter capacitor, for parallel system, the output filter capacitor of every inverter is connected in parallel on and exchanges on the output bus, therefore the separate unit inverter can't tell the voltage DC component that is sampled be self or other inverter, be prone to the mistuning joint.Equally, when multimode is in parallel, adopt this scheme to be difficult to control the dc loop-current of parallel system.
Summary of the invention
The objective of the invention is above-mentionedly to divide equally the dc loop-current of the shunt chopper of Current Control, a kind of device that suppresses the inverter parallel system dc loop-current of proposition based on active power, reactive power for overcoming.
The method of inhibition inverter parallel system dc loop-current of the present invention is to set up the dc loop-current control device in the control circuit of existing inverter parallel system, and the dc loop-current control device suppresses circuit by the voltage DC component and constitutes.Each inversion module in the parallelly connected reverse converter system has oneself independently voltage DC component inhibition circuit, by the high-frequency PWM ripple difference between inversion half-bridge mid point and the dividing potential drop electric capacity mid point is amplified sampling, low-pass filtering, proportional integral is regulated and is obtained voltage DC component feedback quantity, relatively gained DC component deviation and inversion reference voltage are superimposed voltage DC component feedback quantity and voltage DC component fiducial value (being set at zero volt), by proofreading and correct every contravarianter voltage DC component of inversion fiducial value control is zero, is zero thereby make the dc loop-current of inverter parallel system.
Be used to realize the device of the inventive method, comprise inversion module, inversion module, CAN bus, synchronous bus, ac bus and load.
The circuit structure of each inversion module is identical, includes: inverter main circuit, sample circuit, control circuit and voltage DC component suppress circuit.The CAN bus is used for transmitting average active power P to each parallel inverter module
*With average reactive power Q
*, the power governor in each inversion module control circuit is connected to the CAN bus by holding wire; Synchronous bus is used for the genlock between the parallel inverter module, and the PLL module in each inversion module control circuit is connected to synchronous bus by holding wire; The interchange output-parallel of inversion parallel connection module is on ac bus; The shunt load of inverter parallel system is connected on the ac bus.
Wherein inversion module comprises that inverter main circuit, sample circuit, control circuit and voltage DC component suppress circuit.Inverter main circuit adopts the half-bridge inverter structure, comprises the dividing potential drop capacitor C
D1, C
D2, power tube V
1, V
2, filter inductance L
1With filter capacitor C
1The dividing potential drop capacitor C
D1Negative polarity end and dividing potential drop capacitor C
D2Positive ends be connected N point, power tube V
1Source electrode and power tube V
2Collector electrode be connected H
1Point, the dividing potential drop capacitor C
D1Positive ends and power tube V
1Collector electrode link together the dividing potential drop capacitor C
D2Negative polarity end and power tube V
2Source electrode link together filter inductance L
1An end be connected H
1Point, an other end and filter capacitor C
1An end be connected O
1Point, filter capacitor C
1An other end connect center line N, filter capacitor C
1Two ends be connected on the ac bus; Sample circuit comprises inductive current sample circuit and inverter output voltage sample circuit, and the input of inductive current sample circuit connects the Hall current sensor of inverter main circuit, and the inductive current sample circuit is output as inductive current i
L1, the input of inverter output voltage sample circuit is connected the filter capacitor C of inverter main circuit
1Two ends, the output of inverter output voltage sample circuit is voltage u
O1; Control circuit is by active power P
1And reactive power Q
1Computing module, power conditioning module, the phase-locked module of PLL, sinusoid fiducial ripple generation module, voltage regulator module, current regulator module and PWM driver module are formed, active power P
1And reactive power Q
1Two inputs of computing module connect the output of inductive current sample circuit and the output of voltage sampling circuit respectively, and two inputs of power conditioning module connect meritorious power P respectively
1And reactive power Q
12 outputs of computing module, two other input of power conditioning module connects the P in the CAN bus respectively
*And Q
*, power conditioning module output is voltage magnitude correcting value △ U
1With phasing amount △
1, the input of the phase-locked module of PLL connects synchronous bus, and the output of the phase-locked module of PLL is the reference synchronization phase place
*, the first input end of sinusoid fiducial ripple generation module connects voltage magnitude reference value U
1 *Second input of sinusoid fiducial ripple generation module connects the output of the phase-locked module of PLL, sinusoid fiducial ripple generation module the 3rd, four-input terminal connects two outputs of power conditioning module respectively, the 5th input of sinusoid fiducial ripple generation module connects the output that the voltage DC component suppresses circuit, and the output of sinusoid fiducial ripple generation module is the sinusoid fiducial ripple U after proofreading and correct
1Sin (
+
1)+△ U
Dc1, be connected to an input of voltage regulator module, as the reference input voltage u of voltage regulator module
Ref1, the input signal of the another one input of voltage regulator module is the output voltage u of inverter
O1, the output of voltage regulator module is connected to an input of current regulator module, output valve i
Ref1As the reference current value of electric current loop, the input signal of the another one input of current regulator module is inductive current i
L1, the output of current regulator module is modulation signal u
S1, the input of PWM driver module connects the output of current regulator module, and the output of PWM driver module is the PWM drive signal, is used for driving the power tube V of inverter main circuit
1With power tube V
2
In said inverter parallel system, each inversion module is set up an independently voltage DC component inhibition circuit module respectively, and the circuit structure of the voltage DC component inhibition circuit module of each inversion module is identical.Each inversion module is zero by the output voltage DC component that the voltage DC component of setting up suppresses circuit module control self inversion module, thereby the dc loop-current of control inverter parallel system is zero.Because each module is independent control, realized the decoupling zero in the control of multimode inverter parallel system dc loop-current, control method is simple, reliable, is easy to Project Realization.
It is zero that the voltage DC component suppresses the output voltage DC component that circuit module is used to control the parallel inverter module, and this module is formed by connecting in turn by sampling modulate circuit, low-pass filter circuit, DC component regulating circuit and the first subtraction comparator.The sampling modulate circuit connects the sampling input points for the first order circuit of voltage DC component inhibition circuit, two inputs of this circuit, and one of them input connects the brachium pontis mid point H of the half-bridge inverter of inverter main circuit
1, another one is gone into the half-bridge inverter dividing potential drop capacitor C that end connects inverter main circuit
D1And C
D2Connection mid point N, sampled input signal u
H1NEqual the high-frequency PWM ripple signal of switching frequency for frequency, the output of sampling modulate circuit connects the input of low-pass filter circuit, the output of low-pass filter circuit connects the input of DC component regulating circuit, and the positive ends of the first subtraction comparator is connected voltage DC component benchmark U respectively with the negative polarity end
Dc *The output U of (being set at 0 volt) and DC component regulating circuit
Dc1, the output signal △ U of the output of the first subtraction comparator
Dc1The input of the sinusoid fiducial that is added to ripple generation module obtains the reference voltage U after sinusoid fiducial ripple generation module is proofreaied and correct
1Sin (
+
1)+△ U
Dc1, because △ U
Dc1And U
1Sin (
+
1) the DC component equal and opposite in direction, opposite in sign, thus reach control inversion module 1 inverter output voltage u
O1-DC component be zero.
The sampling modulate circuit that DC component suppresses in the circuit module adopts the differential amplifier structure of electric resistance partial pressure to sample.The sampling modulate circuit adopts the differential amplifier structure, is used to realize high-frequency PWM ripple signals sampling, decay, is made up of first resistance R 1, second resistance R 2, the 3rd resistance R 3, first capacitor C 1, the 4th resistance R 4, second capacitor C 2 and operational amplifier IC1.The input of first resistance R 1 connects the brachium pontis mid point H of the half-bridge inverter of inverter main circuit 101
1, the inverting input of an other end concatenation operation amplifier IC1 of first resistance R 1, the input of second resistance R 2 connects the half-bridge inverter dividing potential drop capacitor C of inverter main circuit 101
D1And C
D2Connection mid point N, the in-phase input end of an other end concatenation operation amplifier IC1 of second resistance R 2, the 3rd resistance R 3 and first capacitor C
1In parallel, the inverting input of an end concatenation operation amplifier IC1 in parallel, the output of an other end concatenation operation amplifier IC1 in parallel, the 4th resistance R 4 and 2 parallel connections of second capacitor C, the in-phase input end of an end concatenation operation amplifier IC1 in parallel, an other end in parallel is connected to ground.The output of operational amplifier IC1 is connected to the input of low pass filter 104-2.
The present invention is simple in structure, and it is convenient to realize, has both kept the characteristics of original parallel system, has eliminated the parallel operation dc loop-current again.
Description of drawings
Fig. 1 is two inverter principle of parallel figure of prior art;
Fig. 2 is the dc loop-current equivalent circuit theory figure of two inverter parallel connections;
Fig. 3 is a forming circuit schematic diagram of the present invention;
Fig. 4 is that the voltage DC component of inversion module 1 suppresses circuit theory diagrams;
Fig. 5 is that the voltage DC component of inversion module 2 suppresses circuit theory diagrams.
Embodiment
With reference to Fig. 3, a kind of device that suppresses the inverter parallel system dc loop-current of the present invention comprises inversion module 1, inversion module 2, CAN bus 3, synchronous bus 4, ac bus 5 and load 6.
The circuit structure of each inversion module is identical, includes: inverter main circuit, sample circuit, control circuit and voltage DC component suppress circuit.CAN bus 3 is used for transmitting average active power P to each parallel inverter module
*With average reactive power Q
*, the power governor in each inversion module control circuit is connected to CAN bus 3 by holding wire; Synchronous bus 4 is used for the genlock between the parallel inverter module, and the PLL module in each inversion module control circuit is connected to synchronous bus 4 by holding wire; The interchange output-parallel of inversion parallel connection module is on ac bus 5; The shunt load 6 of inverter parallel system is connected on the ac bus 5.
Wherein inversion module 1 comprises that inverter main circuit 101, sample circuit 102, control circuit 103 and voltage DC component suppress circuit 104.Inverter main circuit 101 adopts the half-bridge inverter structure, comprises the dividing potential drop capacitor C
D1, C
D2, power tube V
1, V
2, filter inductance L
1With filter capacitor C
1The dividing potential drop capacitor C
D1Negative polarity end and dividing potential drop capacitor C
D2Positive ends be connected N point, power tube V
1Source electrode and power tube V
2Collector electrode be connected H
1Point, the dividing potential drop capacitor C
D1Positive ends and power tube V
1Collector electrode link together the dividing potential drop capacitor C
D2Negative polarity end and power tube V
2Source electrode link together filter inductance L
1An end be connected H
1Point, an other end and filter capacitor C
1An end be connected O
1Point, filter capacitor C
1An other end connect center line N, filter capacitor C
1Two ends be connected on the ac bus 5; Sample circuit 102 comprises inductive current sample circuit 102-1 and inverter output voltage sample circuit 102-2, the input of inductive current sample circuit 102-1 connects the Hall current sensor of inverter main circuit 101, and inductive current sample circuit 102-1 is output as inductive current i
L1, the input of inverter output voltage sample circuit 102-2 is connected the filter capacitor C of inverter main circuit 101
1Two ends, the output of inverter output voltage sample circuit 102-2 is voltage u
O1; Control circuit 103 is by active power P
1And reactive power Q
1Computing module 103-1, the phase-locked module 103-3 of power conditioning module 103-2, PLL, sinusoid fiducial ripple generation module 103-4, voltage regulator module 103-5, current regulator module 103-6 and PWM driver module 103-7 form, active power P
1And reactive power Q
12 inputs of computing module 103-1 connect the output of inductive current sample circuit 102-1 and the output of voltage sampling circuit 102-2 respectively, and 2 inputs of power conditioning module 103-2 connect meritorious power P respectively
1And reactive power Q
12 outputs of computing module 103-1, other 2 inputs of power conditioning module 103-2 connect the P in the CAN bus respectively
*And Q
*, power conditioning module 103-2 output is voltage magnitude correcting value △ U
1With phasing amount △
1, the input of the phase-locked module 103-3 of PLL connects synchronous bus 4, and the output of the phase-locked module 103-3 of PLL is the reference synchronization phase place
*, the first input end of sinusoid fiducial ripple generation module 103-4 connects voltage magnitude reference value U
1 *Second input of 103-4 connects the output of the phase-locked module 103-3 of PLL, 103-4 the 3rd, four-input terminal connects 2 outputs of power conditioning module 103-2 respectively, the 5th input of 103-4 connects the output that the voltage DC component suppresses circuit 104, and the output of sinusoid fiducial ripple generation module 103-4 is the sinusoid fiducial ripple U after proofreading and correct
1Sin (
+
1)+△ U
Dc1, be connected to the input of voltage regulator module 103-5, as the reference input voltage u of voltage regulator voltage regulator module 103-5
Ref1, the input signal of the another one input of voltage regulator module 103-5 is the output voltage u of inverter
O1, the output of voltage regulator module 103-5 is connected to the input of current regulator module 103-6, output valve i
Ref1As the reference current value of electric current loop, the input signal of the another one input of current regulator module 103-6 is inductive current i
L1, the output of current regulator module 103-6 is modulation signal u
S1, the input of PWM driver module 103-7 connects the output of current regulator module 103-6, and the output of PWM driver module 103-7 is the PWM drive signal, is used for driving the power tube V of inverter main circuit 101
1With power tube V
2
Wherein inversion module 2 comprises that inverter main circuit 201, sample circuit 202, control circuit 203 and voltage DC component suppress circuit 204.Inverter main circuit 101 adopts the half-bridge inverter structure, comprises the dividing potential drop capacitor C
D3, C
D4, power tube V
3, V
4, filter inductance L
2With filter capacitor C
2The dividing potential drop capacitor C
D3Negative polarity end and dividing potential drop capacitor C
D4Positive ends be connected N point, power tube V
3Source electrode and power tube V
4Collector electrode be connected H
2Point, the dividing potential drop capacitor C
D3Positive ends and power tube V
3Collector electrode link together the dividing potential drop capacitor C
D4Negative polarity end and power tube V
4Source electrode link together filter inductance L
2An end be connected H
2Point, an other end and filter capacitor C
2An end be connected O
2Point, filter capacitor C
2An other end connect center line N, filter capacitor C
2Two ends be connected on the ac bus 5; Sample circuit 202 comprises inductive current sample circuit 202-1 and inverter output voltage sample circuit 202-2, the input of inductive current sample circuit 202-1 connects the Hall current sensor of inverter main circuit 201, and inductive current sample circuit 202-1 is output as inductive current i
L2, the input of inverter output voltage sample circuit 202-2 is connected the filter capacitor C of inverter main circuit 201
2Two ends, the output of inverter output voltage sample circuit 202-2 is voltage u
O2; Control circuit 203 is by active power P
2And reactive power Q
2Computing module 203-1, the phase-locked module 203-3 of power conditioning module 203-2, PLL, sinusoid fiducial ripple generation module 203-4, voltage regulator module 203-5, current regulator module 203-6 and PWM driver module 203-7 form, active power P
2And reactive power Q
22 inputs of computing module 203-1 connect the output of inductive current sample circuit 202-1 and the output of voltage sampling circuit 202-2 respectively, and 2 inputs of power conditioning module 203-2 connect meritorious power P respectively
2And reactive power Q
22 outputs of computing module 203-1, other 2 inputs of power conditioning module 203-2 connect the P in the CAN bus respectively
*And Q
*, power conditioning module 203-2 output is voltage magnitude correcting value △ U
2With phasing amount △
2, the input of the phase-locked module 203-3 of PLL connects synchronous bus 4, and the output of the phase-locked module 203-3 of PLL is the reference synchronization phase place
*, the first input end of sinusoid fiducial ripple generation module 203-4 connects voltage magnitude reference value U
2 *Second input of 103-4 connects the output of the phase-locked module 203-3 of PLL, 203-4 the 3rd, four-input terminal connects 2 outputs of power conditioning module 203-2 respectively, the 5th input of 203-4 connects the output that the voltage DC component suppresses circuit 204, and the output of sinusoid fiducial ripple generation module 203-4 is the sinusoid fiducial ripple U after proofreading and correct
2Sin (
+
2)+△ U
Dc2, be connected to the input of voltage regulator module 203-5, as the reference input voltage u of voltage regulator module 203-5
Ref2, the input signal of the another one input of voltage regulator module 203-5 is the output voltage u of inverter
O2, the output of voltage regulator module 203-5 is connected to the input of current regulator module 103-6, output valve i
Ref2As the reference current value of electric current loop, the input signal of the another one input of current regulator module 203-6 is inductive current i
L2, the output of current regulator module 203-6 is modulation signal u
S2, the input of PWM driver module 203-7 connects the output of current regulator module 203-6, and the output of PWM driver module 203-7 is the PWM drive signal, is used for driving the power tube V of inverter main circuit 201
3With power tube V
4
In said inverter parallel system, each inversion module is set up 1 independently voltage DC component inhibition circuit module respectively, and the circuit structure of the voltage DC component inhibition circuit module of each inversion module is identical.Each inversion module is zero by the output voltage DC component that the voltage DC component of setting up suppresses circuit module control self inversion module, thereby the dc loop-current of control inverter parallel system is zero.Because each module is independent control, realized the decoupling zero in the control of multimode inverter parallel system dc loop-current, control method is simple, reliable, is easy to Project Realization.
It is zero that the voltage DC component suppresses the output voltage DC component that circuit module 104 is used to control parallel inverter module 1, and this module is formed by connecting in turn by sampling modulate circuit 104-1, low-pass filter circuit 104-2, DC component regulating circuit 104-3 and the first subtraction comparator 104-4.Sampling modulate circuit 104-1 is the first order circuit of voltage DC component inhibition circuit 104, and 2 inputs of this circuit connect the sampling input points, and one of them input connects the brachium pontis mid point H of the half-bridge inverter of inverter main circuit 101
1, the another one input connects the half-bridge inverter dividing potential drop capacitor C of inverter main circuit 101
D1And C
D2Connection mid point N, sampled input signal u
H1NEqual the high-frequency PWM ripple signal of switching frequency for frequency, the output of sampling modulate circuit 104-1 connects the input of low-pass filter circuit 104-2, the output of low-pass filter circuit 104-2 connects the input of DC component regulating circuit 104-3, and the positive ends of the first subtraction comparator 104-4 is connected voltage DC component benchmark U respectively with the negative polarity end
Dc *The output U of (being set at 0 volt) and DC component regulating circuit 104-3
Dc1, the output signal △ U of the output of the first subtraction comparator 104-4
Dc1The input of the sinusoid fiducial that is added to ripple generation module 103-4 obtains the reference voltage U after sinusoid fiducial ripple generation module 103-4 proofreaies and correct
1Sin (
+
1)+△ U
Dc1, because △ U
Dc1And U
1Sin (
+
1) the DC component equal and opposite in direction, opposite in sign, thus reach control inversion module 1 inverter output voltage u
O1-DC component be zero.
As shown in Figure 4, sampling modulate circuit 104-1 adopts the differential amplifier structure, be used to realize high-frequency PWM ripple signals sampling, decay, form by first resistance R 1, second resistance R 2, the 3rd resistance R 3, first capacitor C 1, the 4th resistance R 4, second capacitor C 2 and operational amplifier IC1.The input of first resistance R 1 connects the brachium pontis mid point H of the half-bridge inverter of inverter main circuit 101
1, the inverting input of an other end concatenation operation amplifier IC1 of first resistance R 1, the input of second resistance R 2 connects the half-bridge inverter dividing potential drop capacitor C of inverter main circuit 101
D1And C
D2Connection mid point N, the in-phase input end of an other end concatenation operation amplifier IC1 of second resistance R 2, the 3rd resistance R 3 and 1 parallel connection of first capacitor C, the inverting input of an end concatenation operation amplifier IC1 in parallel, the output of an other end concatenation operation amplifier IC1 in parallel, this tie point voltage is v
1, the 4th resistance R 4 and 2 parallel connections of second capacitor C, the in-phase input end of an end concatenation operation amplifier IC1 in parallel, an other end in parallel is connected to ground.Low-pass filter circuit 104-2 adopts the second-order low-pass filter structure, and the alternating current component that is used for filtering v1 obtains the voltage DC component, is made up of the 5th resistance R 5, the 3rd capacitor C 3, the 6th resistance R 6 and the 4th capacitor C 4.One end of the 5th resistance R 5 is connected with the output of sampling modulate circuit 104-1, one end of an other end of the 5th resistance R 5 and the 6th resistance R 6, the 3rd capacitor C 3 is connected a bit, other one of the 3rd capacitor C 3 terminates at ground, an other end of the 6th resistance R 6 connects an end of the 4th capacitor C 4, and this tie point voltage is direct voltage V
Dc1, other one of the 4th capacitor C 4 terminates at ground.DC component regulating circuit 104-3 is used for direct voltage V
Dc1Carry out the PI adjusting and obtain DC component identical with inversion module 1 Semi-polarity, that be in proportion, form by the 7th resistance R 7, the 8th resistance R 8, the 9th resistance R 9, the 5th capacitor C 5 and operational amplifier IC2.One end of the 7th resistance R 7 connects the output of low-pass filter circuit 104-2, the in-phase input end of one end concatenation operation amplifier IC2 of the 8th resistance R 8, an other end ground connection of the 8th resistance R 8, an other end of the 7th resistance R 7 and an end of the 9th resistance R 9, the inverting input of operational amplifier IC2 link together, an other end of the 9th resistance R 9 and an end of the 5th capacitor C 5 link together, an other end of the 5th capacitor C 5 is connected the output of operational amplifier IC2, and this tie point voltage is the direct voltage U after regulating
Dc1The positive ends of the first subtraction comparator 104-4 connects voltage DC component benchmark U
Dc* (be set at 0 volt), the negative polarity end of the first subtraction comparator 104-4 connects the output of DC component regulating circuit 104-3, the be added to input of sinusoid fiducial ripple generation module 103-4 of the output of the first subtraction comparator 104-4, output signal is △ U herein
Dc1
It is zero that the voltage DC component suppresses the output voltage DC component that circuit module 204 is used to control parallel inverter module 2, and this module is formed by connecting in turn by sampling modulate circuit 204-1, low-pass filter circuit 204-2, DC component regulating circuit 204-3 and the first subtraction comparator 204-4.Sampling modulate circuit 204-1 is the first order circuit of voltage DC component inhibition circuit 204, and 2 inputs of this circuit connect the sampling input points, and one of them input connects the brachium pontis mid point H of the half-bridge inverter of inverter main circuit 201
2, another one is gone into the half-bridge inverter dividing potential drop capacitor C that end connects inverter main circuit 201
D3And C
D4Connection mid point N, sampled input signal u
H2NEqual the high-frequency PWM ripple signal of switching frequency for frequency, the output of sampling modulate circuit 204-1 connects the input of low-pass filter circuit 204-2, the output of low-pass filter circuit 204-2 connects the input of DC component regulating circuit 204-3, and the positive ends of the second subtraction comparator 204-4 is connected voltage DC component benchmark U respectively with the negative polarity end
Dc *The output U of (being set at 0 volt) and DC component regulating circuit 204-3
Dc1, the output signal △ U of the output of the second subtraction comparator 204-4
Dc2The input of the sinusoid fiducial that is added to ripple generation module 203-4 obtains the reference voltage U after sinusoid fiducial ripple generation module 203-4 proofreaies and correct
2Sin (
+
2)+△ U
Dc2, because △ U
Dc2And U
2Sin (
+
2) the DC component equal and opposite in direction, opposite in sign, thus reach control inversion module 2 inverter output voltage u
O2-DC component be zero.
As shown in Figure 5, sampling modulate circuit 204-1 adopts the differential amplifier structure, be used to realize high-frequency PWM ripple signals sampling, decay, form by the tenth resistance R the 10, the 11 resistance R the 11, the 12 resistance R 12, the 6th capacitor C the 6, the 13 resistance R 13, the 7th capacitor C 7 and operational amplifier IC3.The input of the tenth resistance R 10 connects the brachium pontis mid point H of the half-bridge inverter of inverter main circuit 201
2, the inverting input of an other end concatenation operation amplifier IC3 of the tenth resistance R 10, the input of the 11 resistance R 11 connects the half-bridge inverter dividing potential drop capacitor C of inverter main circuit 201
D3And C
D4Connection mid point N, the in-phase input end of an other end concatenation operation amplifier IC3 of the 11 resistance R 11, the 12 resistance R 12 and 6 parallel connections of the 6th capacitor C, the inverting input of an end concatenation operation amplifier IC3 in parallel, the output of an other end concatenation operation amplifier IC3 in parallel, this tie point voltage is v
2, the 13 resistance R 13 and 7 parallel connections of the 7th capacitor C, the in-phase input end of an end concatenation operation amplifier IC3 in parallel, an other end in parallel is connected to ground.Low-pass filter circuit 204-2 adopts the second-order low-pass filter structure, is used for filtering v
2Alternating current component obtain the voltage DC component, form by the 14 resistance R 14, the 8th capacitor C the 8, the 15 resistance R 15 and the 9th capacitor C 9.One end of the 14 resistance R 14 is connected with the output of sampling modulate circuit 204-1, one end of an other end of the 14 resistance R 14 and the 15 resistance R 15, the 8th capacitor C 8 is connected a bit, other one of the 8th capacitor C 8 terminates at ground, an other end of the 15 resistance R 15 connects an end of the 9th capacitor C 9, and this tie point voltage is direct voltage V
Dc2, other one of the 9th capacitor C 9 terminates at ground.DC component regulating circuit 204-3 is used for direct voltage V
Dc2Carry out the PI adjusting and obtain DC component identical with inversion module 2 Semi-polarities, that be in proportion, form by the 16 resistance R the 16, the 17 resistance R the 17, the 18 resistance R 18, the tenth capacitor C 10 and operational amplifier IC4.One end of the 16 resistance R 16 connects the output of low-pass filter circuit 204-2, the in-phase input end of one end concatenation operation amplifier IC4 of the 17 resistance R 17, an other end ground connection of the 17 resistance R 17, an other end and an end of the 18 resistance R 18, the inverting input of operational amplifier IC4 of the 16 resistance R 16 link together, an other end of the 18 resistance R 18 and an end of the tenth capacitor C 10 link together, an other end of the tenth capacitor C 10 is connected the output of operational amplifier IC4, and this tie point voltage is the direct voltage U after regulating
Dc2The positive ends of the second subtraction comparator 204-4 connects voltage DC component benchmark U
Dc*(being set at 0 volt), the negative polarity end of the second subtraction comparator 204-4 connects the output of DC component regulating circuit 204-3, the be added to input of sinusoid fiducial ripple generation module 203-4 of the output of the second subtraction comparator 204-4, output signal is △ U herein
Dc2
The device that the present invention suppresses the inverter parallel system dc loop-current both can be used for the parallel single-phase system, also can be used for the parallel three phase system.
Claims (2)
1. device that suppresses the inverter parallel system dc loop-current, it comprises: inversion module (1), inversion module (2), CAN bus (3), synchronous bus (4), ac bus (5) and load (6); The circuit structure of each inversion module is identical, includes: inverter main circuit, sample circuit, control circuit and voltage DC component suppress circuit; CAN bus (3) is used for transmitting average active power P to each parallel inverter module
*With average reactive power Q
*, the power governor in each inversion module control circuit is connected to CAN bus (3) by holding wire; Synchronous bus (4) is used for the genlock between the parallel inverter module, and the PLL module in each inversion module control circuit is connected to synchronous bus (4) by holding wire; The interchange output-parallel of inversion parallel connection module is on ac bus (5); The shunt load of inverter parallel system (6) is connected on the ac bus (5);
Wherein inversion module (1) comprises that inverter main circuit (101), sample circuit (102), control circuit (103) and voltage DC component suppress circuit (104); Inverter main circuit (101) adopts the half-bridge inverter structure, comprises the dividing potential drop capacitor C
D1, C
D2, power tube V
1, V
2, filter inductance L
1With filter capacitor C
1The dividing potential drop capacitor C
D1Negative polarity end and dividing potential drop capacitor C
D2Positive ends be connected N point, power tube V
1Source electrode and power tube V
2Collector electrode be connected H
1Point, the dividing potential drop capacitor C
D1Positive ends and power tube V
1Collector electrode link together the dividing potential drop capacitor C
D2Negative polarity end and power tube V
2Source electrode link together filter inductance L
1An end be connected H
1Point, an other end and filter capacitor C
1An end be connected O
1Point, filter capacitor C
1An other end connect center line N, filter capacitor C
1Two ends be connected on the ac bus (5); Sample circuit (102) comprises inductive current sample circuit (102-1) and inverter output voltage sample circuit (102-2), the input of inductive current sample circuit (102-1) connects the Hall current sensor of inverter main circuit (101), and inductive current sample circuit (102-1) is output as inductive current i
L1, the input of inverter output voltage sample circuit (102-2) is connected the filter capacitor C of inverter main circuit (101)
1Two ends, the output of inverter output voltage sample circuit (102-2) is voltage u
O1; Control circuit (103) is by active power P
1And reactive power Q
1Computing module (103-1), power conditioning module (103-2), the phase-locked module of PLL (103-3), sinusoid fiducial ripple generation module (103-4), voltage regulator module (103-5), current regulator module (103-6) and PWM driver module (103-7) are formed, active power P
1And reactive power Q
1Two inputs of computing module (103-1) connect the output of inductive current sample circuit (102-1) and the output of voltage sampling circuit (102-2) respectively, and two inputs of power conditioning module (103-2) connect meritorious power P respectively
1And reactive power Q
1Two outputs of computing module (103-1), two other input of power conditioning module (103-2) connects the P in the CAN bus respectively
*And Q
*, power conditioning module (103-2) output is voltage magnitude correcting value △ U
1With phasing amount △
1, the input of the phase-locked module of PLL (103-3) connects synchronous bus (4), and the output of the phase-locked module of PLL (103-3) is the reference synchronization phase place
*, the first input end of sinusoid fiducial ripple generation module (103-4) connects voltage magnitude reference value U
1 *Second input of sinusoid fiducial ripple generation module (103-4) connects the output of the phase-locked module of PLL (103-3), sinusoid fiducial ripple generation module (103-4) the 3rd, four-input terminal connects two outputs of power conditioning module (103-2) respectively, the 5th input of sinusoid fiducial ripple generation module (103-4) connects the output that the voltage DC component suppresses circuit (104), and the output of sinusoid fiducial ripple generation module (103-4) is the sinusoid fiducial ripple U after proofreading and correct
1Sin (
+
1)+△ U
Dc1, be connected to an input of voltage regulator module (103-5), as the reference input voltage u of voltage regulator module 103-5
Ref1, the input signal of the another one input of voltage regulator module (103-5) is the output voltage u of inverter
O1, the output of voltage regulator module (103-5) is connected to an input of current regulator module (103-6), output valve i
Ref1As the reference current value of electric current loop, the input signal of the another one input of current regulator module (103-6) is inductive current i
L1, the output of current regulator module (103-6) is modulation signal u
S1, the input of PWM driver module (103-7) connects the output of current regulator module (103-6), and the output of PWM driver module (103-7) is the PWM drive signal, is used for driving the power tube V of inverter main circuit (101)
1With power tube V
2, it is characterized in that:
In said inverter parallel system, each inversion module is set up an independently voltage DC component inhibition circuit module respectively, and the circuit structure of the voltage DC component inhibition circuit module of each inversion module is identical; Each inversion module is zero by the output voltage DC component that the voltage DC component of setting up suppresses circuit module control self inversion module, thereby the dc loop-current of control inverter parallel system is zero;
It is zero that the voltage DC component suppresses the output voltage DC component that circuit module (104) is used to control parallel inverter module (1), and this module is formed by connecting in turn by sampling modulate circuit (104-1), low-pass filter circuit (104-2), DC component regulating circuit (104-3) and the first subtraction comparator (104-4); Sampling modulate circuit (104-1) is the first order circuit of voltage DC component inhibition circuit (104), and two inputs of this circuit connect the sampling input points, and one of them input connects the brachium pontis mid point H of the half-bridge inverter of inverter main circuit (101)
1, the another one input connects the half-bridge inverter dividing potential drop capacitor C of inverter main circuit (101)
D1And C
D2Connection mid point N, sampled input signal u
H1NEqual the high-frequency PWM ripple signal of switching frequency for frequency, the output of sampling modulate circuit (104-1) connects the input of low-pass filter circuit (104-2), the output of low-pass filter circuit (104-2) connects the input of DC component regulating circuit (104-3), and the positive ends of the first subtraction comparator (104-4) is connected voltage DC component benchmark U respectively with the negative polarity end
Dc *Output U with DC component regulating circuit (104-3)
Dc1, the output signal △ U of the output of the first subtraction comparator (104-4)
Dc1The input of the sinusoid fiducial that is added to ripple generation module (103-4) obtains the reference voltage U after sinusoid fiducial ripple generation module (103-4) is proofreaied and correct
1Sin (
+
1)+△ U
Dc1, because △ U
Dc1And U
1Sin (
+
1) the DC component equal and opposite in direction, opposite in sign, thus reach control inversion module 1 inverter output voltage u
O1-DC component be zero.
2. a kind of device that suppresses the inverter parallel system dc loop-current according to claim 1 is characterized in that: the sampling modulate circuit that DC component suppresses in the circuit module adopts the differential amplifier structure of electric resistance partial pressure to sample; Sampling modulate circuit (104-1) adopts the differential amplifier structure, is used to realize high-frequency PWM ripple signals sampling, decay; Sampling modulate circuit (104-1) is made up of first resistance R 1, second resistance R 2, the 3rd resistance R 3, first capacitor C 1, the 4th resistance R 4, second capacitor C 2 and operational amplifier IC1; The input of first resistance R 1 connects the brachium pontis mid point H of the half-bridge inverter of inverter main circuit 101
1, the inverting input of an other end concatenation operation amplifier IC1 of first resistance R 1, the input of second resistance R 2 connects the half-bridge inverter dividing potential drop capacitor C of inverter main circuit (101)
D1And C
D2Connection mid point N, the in-phase input end of an other end concatenation operation amplifier IC1 of second resistance R 2, the 3rd resistance R 3 and first capacitor C
1In parallel, the inverting input of an end concatenation operation amplifier IC1 in parallel, the output of an other end concatenation operation amplifier IC1 in parallel, the 4th resistance R 4 and 2 parallel connections of second capacitor C, the in-phase input end of an end concatenation operation amplifier IC1 in parallel, an other end in parallel is connected to ground; The output of operational amplifier IC1 is connected to the input of low pass filter (104-2).
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| CN 201110184856 CN102231608B (en) | 2011-07-04 | 2011-07-04 | DC (direct current) loop-current suspension device for inverter parallel system |
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| CN102231608B CN102231608B (en) | 2013-08-07 |
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