CN102213603B - Singlechip-based low-frequency weak signal detector - Google Patents
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Abstract
The invention discloses a singlechip-based low-frequency weak signal detector, which comprises two parts, namely a front end of an amplification and preprocessing circuit for weak signals, and a rear end of a digital processing part, wherein the amplification and preprocessing part comprises an input filtering module, a buffer processing module, a preamplifier module, a high-pass filtering module, a low-pass filtering module, a 50HZ notch filter and a post-processing module; the front-end part detects low-frequency weak signals under high-noise background and transmits the signals to the rearend part for digital processing; the rear-end digital processing part comprises an analog/digital (A/D) sampling module, a singlechip module, a storage module and a wireless transmission module; and the rear-end part performs signal acquisition, fast Fourier transform (FFT) analysis and wireless transmission on the input signals, and more intuitively and clearly recognizes the signals. The detector can simply and rapidly detect the low-frequency weak signals and is low in cost.
Description
Technical field
The present invention relates to a kind of SCM Based low-frequency weak signal detector, can be used for the fields such as optics, electricity, magnetics, acoustics, mechanics, medical science, material, belong to the signal process field.
Background technology
Along with the fast development of science and technology and production, need the subtle change of measure physical quantities.For example: weak voltage or electric current, faint light etc.Particularly under extreme conditions the measurement of feeble signal has become the in-depth knowledge of natural environment, developing new material, the basis of creating new unit.
In general, the subtle change of a lot of non electrical quantities all is can become electric signal by sensor then to amplify, and shows or record.Because the variation of these small quantities is very faint by the electric signal that sensor converts to, may be 10
-6V, 10
-7V or even 10
-9V or less.For the detection of these feeble signals, Noise and Interference is principal contradiction.The voltage that noise itself has may flood useful feeble signal fall dearly.Except noise, also have some artificial interferences and natural interference.These interference and noise come from the outside of measuring system.Can adopt in principle the method for electronic shield to make and drop to minimum.But, in real work, eliminate these interference or noise, neither lead-pipe cinch.
Technique of Weak Signal Detection is exactly the subtle change that will study, observe, record various physical quantitys in the research and production, solves at noise or in disturbing and detects useful feeble signal problem.The effect of an amplifier or a signal detection system is exactly to select useful signal in having noise and a large amount of jamming pattern.Yet for general amplifier, owing to noise, interference and signal mix, so it amplifies useless noise, interference and useful signal together.Only have in the useful situation of signal greater than noise or interference, this amplifier or signal detection system could be as the useful tools that detects.If useless noise or interference after amplifier or detection system, not only can not be extracted useful signal greater than useful signal.The noise of amplifier itself has also been added in the output of amplifier, makes signal be flooded deeplyer by noise fully.Even amplifier is considered as desirable amplifier, namely do not consider the noise of amplifier itself, can only keep only the signal to noise ratio (S/N ratio) of amp.in.Because this amplifier is from the characteristic of signal and noise itself, and the size of the characteristic average power that can only have from signal and noise is distinguished signal and noise.Only have from the characteristic of signal and noise, for the different qualities of signal and noise, take full advantage of on the basis of their characteristic itself and work out detection method, be only the most effective, just might be from noise detection signal.
Conventional method for detecting weak signals mainly comprises the spectral analysis method etc. of correlation technique, sampling integral method and the frequency domain of time domain.Yet these methods have certain limitation, and the signal-noise ratio threshold value that is mainly manifested in the feeble signal that can detect is higher.And the Feeble signal detector according to the design of these methods has the hardware requirement height, easy care not, and high in cost of production is not enough.
Along with the expansion of computer utility scope, originally some detection systems that need hardware to finish in Detection of Weak Signals can realize with software.Utilize computing machine to carry out curve fitting, level and smooth, digital filtering, the method processing signals such as fast fourier transform (FFT) and spectrum estimation improve signal to noise ratio (S/N ratio), realize the requirement of Detection of Weak Signals.
Summary of the invention
Technology of the present invention is dealt with problems: overcome the deficiencies in the prior art, a kind of SCM Based low-frequency weak signal detector is provided, it can detect low-frequency weak signal quickly and easily, and cost is low, easy care.
Technical solution of the present invention: a kind of SCM Based low-frequency weak signal detector.Low-frequency weak signal detector based on the STC single-chip microcomputer comprises: feeble signal amplification and preprocessing part and digital processing part.
Described feeble signal is amplified and preprocessing part comprises: input filter module, buffered module, pre-amplifying module, high-pass filtering module, low-pass filtering module, 50HZ trapper and post processing module.Undressed low-frequency weak signal at first enters the input filter module, carries out RFI and disturbs purified treatment; Then send into the buffered module, to reduce the correlativity of front stage circuits and follow-up amplifying circuit; After the buffered, signal enters pre-amplifying module, and microvolt level signal is amplified to millivolt level signal; Because the first order is not introduced electric capacity every directly before amplifying, and for preventing direct current biasing, need to take the high-pass filtering module to give this part interference of filtering; And the low frequency signal that the present invention processes, for removing high frequency interference, signal enters low-pass filtering module; Through after the high low-pass filtering treatment, must consider that the power frequency that exists in the signal disturbs, be this part interference of filtering, signal demand carries out the 50HZ trap to be processed; Before signal enters digital processing, need to carry out rear class amplification and level reach to signal, to be fit to send into the digital processing part at last.
Described rear end digital processes is divided and is comprised: AD sampling module, one-chip computer module, memory module and wireless sending module.At first send into the AD module through front end signal amplification and pretreated signal, carry out the AD sampling; The data that sampling obtains are given the STC single-chip microcomputer, the concrete sampling rate of the sampling routine control AD of single-chip microcomputer; And give memory module with the data that obtain, so that fft analysis is carried out to sampled data in the back; Fft analysis can send to PC with the data wireless of analyzing later, better understands the characteristic of signal by PC.The frequency spectrum of also having used the waveform after liquid crystal shows sampling and having carried out fft analysis in this digital processing part.
It is as follows that described single-chip microcomputer carries out the fft analysis process:
(1) at first the data x (n) of storer is carried out the code bit inverted order, make after the N point input data of arranging by natural sequence of time-domain sampling are passed through the FFT computing, the putting in order of output data that obtains the result changes, and can arrange by natural sequence;
(2) then carry out step by step butterfly computation, calculate first the twiddle factor of this grade butterfly computation, carry out again complex multiplication and addition; The data that the result who obtains carries out computing as next element in this grade butterfly, step by step down;
(3) at last all data operations are finished, then fft analysis is finished.
The present invention's advantage compared with prior art is:
(1) the present invention is based on single-chip microcomputer, can detect quickly and easily low-frequency weak signal by adopting fft analysis, the microvolt level signal below the 100HZ can be amplified analysis; And with the signal that detects by liquid crystal display, be easy to debugging and safeguard, show good man-machine interaction, and the present invention have be easy to safeguard, low cost and other advantages.
(2) the present invention uses AD620 to design the two-stage amplifying circuit in pre-amplifying module; The two-stage amplifying circuit can reduce the impact of the noise that late-class circuit produces, and AD620 is fit to powered battery, portable use very much.
(3) the present invention uses Filter selection Wizard design to meet the third-order low-pass filter of designing requirement when the design low-pass filter circuit, can save and choose the numerous and diverse of filtering circuit.
(4) the present invention is in design during trapper, in the previous literature, uses the circuit such as double-T shaped, Wen's bridge more, but they are very high to the parametric sensitivity of circuit component, be difficult to debugging, therefore adopted an integrated chip UAF42 design trapper, can build easily and debug trap circuit.
(5) two-stage of the present invention is amplified and is added that high low-pass filtering and 50HZ trap can quick and convenient amplification microvolt level signals, digital processes is divided receive desirable processing signals.
(6) input filter module of the present invention adopts the wave filter purification electronic interferences that anti-RFI disturbs; the common and different mode noise there is stronger inhibiting effect; also has the input overload protection function; by resistance R 1; R2 helps the input circuit of instrumentation amplifier and outside source are kept apart; C8 is connected across the output terminal of electric bridge, can effectively reduce any interchange common mode inhibition error that is caused by mismatch.
Amplifier gain when (7) the present invention tests reaches as high as 99.6dB, and common-mode rejection ratio is up to 118dB.
Description of drawings
Fig. 1 is structure composition frame chart of the present invention;
Fig. 2 is the structural drawing of input filter module of the present invention;
Fig. 3 is the structural drawing of buffered module of the present invention;
Fig. 4 is the structural drawing of pre-amplifying module of the present invention;
Fig. 5 is the structural drawing of the high-pass filtering module among the present invention;
Fig. 6 is the structural drawing of the low-pass filtering module among the present invention;
Fig. 7 is the 50HZ trapper structural drawing among the present invention;
Fig. 8 is the wireless sending module nRF905 structural drawing among the present invention;
Fig. 9 is FFT spectrum analysis process flow diagram in the single-chip microcomputer among the present invention.
Specific embodiments
As shown in Figure 1, be complete structure block diagram of the present invention, comprise feeble signal amplification and preprocessing part and digital processing part.
Feeble signal is amplified and preprocessing part comprises: input filter module, buffered module, pre-amplifying module, high-pass filtering module, low-pass filtering module, 50HZ trapper and post processing module.Undressed low-frequency weak signal at first enters the input filter module, carries out RFI and disturbs purified treatment; Then send into the buffered module, to reduce the correlativity of front stage circuits and follow-up amplifying circuit; After the buffered, signal enters pre-amplifying module, and microvolt level signal is amplified to millivolt level signal; Because the first order is not introduced electric capacity every directly before amplifying, and for preventing direct current biasing, need to take the high-pass filtering module to give this part interference of filtering; And the low frequency signal that the present invention processes, for removing high frequency interference, signal enters low-pass filtering module; Through after the high low-pass filtering treatment, must consider that the power frequency that exists in the signal disturbs, be this part interference of filtering, signal demand carries out the 50HZ trap to be processed; Before signal enters digital processing, need to carry out rear class amplification and level reach to signal, to be fit to send into the digital processing part at last.
The rear end digital processes is divided and is comprised: AD sampling module, one-chip computer module, memory module and wireless sending module.At first send into the AD module through front end signal amplification and pretreated signal, carry out the AD sampling; The data that sampling obtains are given the STC single-chip microcomputer, the concrete sampling rate of the sampling routine control AD of single-chip microcomputer; And give memory module with the data that obtain, so that fft analysis is carried out to sampled data in the back; Fft analysis can send to PC with the data wireless of analyzing later, better understands the characteristic of signal by PC.The frequency spectrum of also having used the waveform after liquid crystal shows sampling and having carried out fft analysis in this digital processing part.
As shown in Figure 2, input filter module: the wave filter that the present invention adopts anti-RFI to disturb purifies electronic interferences, and the common and different mode noise is had stronger inhibiting effect, also has the input overload protection function.The input filter module comprises resistance R 1, R2, capacitor C 3, C10 and capacitor C 8; Wherein resistance R 1 and capacitor C 3, resistance R 2 and capacitor C 10 have consisted of two low-pass filters, and differential mode and common-mode noise are had stronger inhibiting effect; R1 and R2 as the positive and negative input end of signal, help Isolation input circuit and outside source respectively, and capacitor C 8 then is the output terminal that is connected across two low-pass filter circuits, can effectively reduce any interchange common mode inhibition error that is caused by mismatch.
Real-life radio emitting source extremely enriches, and is such as wireless station, mobile phone, mobile communication, computing machine etc., innumerable.Mainly use instrumentation amplifier to carry out preposition amplification at low-frequency weak signal detector front end, because instrumentation amplifier extracts faint differential signal can or disturbing from large common-mode noise, the common-mode noise of system is reduced greatly.Even can not suppress common-mode noise but best instrumentation amplifier is actual when frequency is higher than 20KHz, the input stage of amplifier may be carried out rectification to strong signal, and then the form with the direct current offset error occurs.Along with day by day precision, complexity and the multifunction of electronic system, the electronic interferences problem is on the rise, and it can make the performance of system change, weaken, even causes system fully malfunctioning.So the input filter that anti-RFI (Ratio Frequency Interfere) disturbs is necessary.
As shown in Figure 3, buffered module: can improve the input impedance of whole amplifying circuit, reduce output impedance, so just can obtain in the back the higher signal of amplitude.Can also keep apart the front and back circuit simultaneously, to reduce the correlativity of front stage circuits and follow-up amplifying circuit.
Buffer stage is comprised of one group of voltage follower, and the input impedance of voltage amplifier is generally higher, and usually at several kilo-ohms to tens kilo-ohms, if the output impedance of rear class is smaller, signal just has suitable part loss in the output resistance of prime so.During this time, just need voltage follower therefrom to cushion.Play the effect of forming a connecting link.The another one benefit of applied voltage follower is exactly to have improved input impedance.
As shown in Figure 4, pre-amplifying module: general, when the Design enlargement circuit, all be to use instrumentation amplifier, use integrated instrumentation amplifier better than the circuit that discrete element consists of on performance.The selection of amplifier has certain principle: satisfying under given input, load, precision and the environmental requirement condition, selecting as far as possible universal, amplifier cheaply.According to the selection principle of integrated transporting discharging, analyze actual service conditions, the amplifier that selecting properly is suitable is accomplished economical rationality.According to the contrast between selection principle and the amplifier, the present invention adopts novel high-performance instrument amplifier AD620 as the core devices of low-frequency weak signal prime amplifier.The present invention uses two-stage to amplify, first order gain 48dB, second level gain 20dB.This be because, in theory, the prestage voltage gain is larger, the impact of the noise that late-class circuit causes is less.But the single-stage enlargement factor can not be too high, amplifies so prestage circuit of the present invention is divided into two-stage.It should be noted that when the preposition Enlargement Design of two-stage, the common-mode rejection ratio of amplifying circuit depends primarily on the differential gain of the first order and the common mode inhibition capacity of the second level.So the gain of the first order should be large as far as possible, the instrument of the second level wants enough large with the amplifier common-mode rejection ratio.
As shown in Figure 5, high-pass filtering module: mainly be the noise filtering for the easy interfered circuit that circuit is existed.Therefore be bioelectric low-frequency weak signal in line with the design application, consider and detect in brain electricity and the cardiac electrical situation, designed the high-pass filtering module.Because the chemical reaction between metal electrode, conducting medium and the scalp produces Dc bias easily between electrode and the scalp surface.Owing to have polarized potential in the human body; these electric signal are direct current signals and often can be larger; because should not introduce electric capacity before the first order is amplified carries out every straight processing; for preventing that direct current biasing from causing the saturated of subsequent conditioning circuit; in order to eliminate the interference of this part, need to take high-pass filtering circuit to give filtering.So after amplifying circuit, need high-pass filtering circuit of design.Here, be not high to requiring on the performance of high pass circuit, the present invention uses the bivalent high-pass filter of now general sallen-key topological structure, and cutoff frequency is at 0.5Hz.
As shown in Figure 6, low-pass filtering module: because the present invention's processing is low frequency signal, in order to remove the interference of high frequency, need the design low-pass filter circuit.Low-pass filter (LPF) adopts the BUTTERWORTH third-order low-pass filter of normalization design.The present invention fixes on 100Hz with the cutoff frequency of low-pass filter, uses the above low-pass filter that requires of Filterselection Wizard design of FilterLab2.0.
As shown in Figure 7,50HZ trapper: disturb with the filtering power frequency.Interference in the feeble signal is disturbed the most serious with the 50Hz power frequency, power frequency disturb be by power transmission line, on every side instrument and equipment and body in distributed capacitance cause.Although prime amplifier has very strong inhibiting effect to common mode interference, there is the part power frequency to disturb and enters circuit in the difference mode signal mode, add top electrode and loop labile factor, exist stronger power frequency to disturb in the signal of simulation amplification output.Therefore trapper is necessary, and very crucial.The multiple trap circuits such as in the previous literature, most uses are double-T shaped, Wen's bridge, but they are very high to the parametric sensitivity of circuit component, are difficult to accurate debugging, on the accuracy and notch depth of trap frequency, do not reach requirement.Therefore the integrating filtering chip UAF42 design 50Hz trapper that Burr-Brown company releases is adopted in invention.UAF42 is integrated a, Time Continuous, second-order active filter module, is fit to complicated and simple filter design scheme.Because UAF42 inside is integrated with the precision resistance of required level Four precision operational-amplifier, 50 ± 0.5%k Ω and the precision capacitor of 1000 ± 0.5pF, solution is difficult to obtain the coupling of electric capacity, resistance and lower loss problem in the middle of the design of active filter.Fig. 7 is the basic circuit that the present invention consists of trapper, and wherein auxiliary OP AMP is used for the summation amplification, with low pass and high pass output summation.
Post processing module: mainly be that signal is further processed so that the numerical portion of back can collect signal, mainly comprise the adjustable amplification of rear gain per stage and electrical level transfer circuit.Because the amplitude range of low-frequency weak signal own is at 0-4000 μ V, the amplifier of fixed gain is also impracticable, so rear class adds the adjustable amplifying circuit of gain.Use integration instrument operational amplifier INA128 design circuit, its typical circuit is similar to AD620, and peripheral needs a resistance can change gain.The numerical portion AD of low-frequency weak signal detector sampling, input voltage amplitude be at 0～5V, therefore before connecing the digital processing part, simulation need to be amplified-signal of 5V～5V carries out electrical level transfer.
The analog-to-digital conversion module: the present invention use ADC0832 with analog signal conversion as digital signal so that single-chip microcomputer is processed i.e. AD sampling.The present invention adopts ADC0832, and it is a kind of 8 bit resolutions, the double channel A/D conversion chip that american semiconductor company produces.Be 32 μ s switching time, the output of serial ports control inputs.Concrete sampling rate is determined by the sampling routine of single-chip microcomputer.
One-chip computer module: the present invention is based on the signal detecting and measuring apparatus of STC89C58 single-chip microcomputer, behind the access modules, and the whole instrument operation of single-chip microcomputer integrated management; The instrument core processor adopts chip microcontroller, adopts the STC89C58RD+ single-chip microcomputer, 44 pins, 36 I/O ports, the flash memory of 32K, access modules, the whole instrument operation of integrated management.STC single-chip microcomputer pin is arranged the same with 51 single-chip microcomputers, also support simultaneously Keil C programming, but it does not support the parallel port to download, its principal feature: ISP is at system programmable, need not Special programming/emulator, can pass through directly download user program of serial ports (P3.0/P3.1).51 single-chip microcomputers have 32 I/O ports, because this programme number of modules is many, the I/O mouth is inadequate, so use another kind of encapsulation PLCC-44.Have more four ports of P4 mouth.
Memory module: the present invention uses AT24C64 as storer, and this chip provides the serial electricity can clash programmable read only memory EEPROM; The technology of the chip employing I2C bus of AT series has realized the minimizing of IO mouth resource, and easy to use, and program also is easy to write.Here consider cost performance, select chip AT24C64.AT24C64 provides 65536bit serial Electrically Erasable Read Only Memory EEPROM, is organized as the byte of 8192 8bit.Card is for the industrial and commercial optimizing application take low-power consumption and low-voltage as main points.AT24C64 can access by two-wire serial interface.Its memory organization is the 64K serial EEPROM: the 64K interior tissue becomes 256 pages, every page of 32 bytes.
As shown in Figure 8, wireless sending module: the NewMsg RF905 module of use is to form in the exploitation of the nRF905 of Nordic company chip basis.NRF905 is the monolithic wireless transceiver, is operated in the ISM band of 433/868/915MHZ, is comprised of a fully-integrated frequency modulator, a receiver with detuner, a power amplifier, a crystal oscillator and a regulator.The characteristics of ShockBurst mode of operation are automatically to produce lead code and CRC, can be easy to carry out programmed configurations by the SPI interface.Current drain is very low, emissive power during for+10dBm transmitter current be 30mA, received current is 12.5mA..Enter the powerdown pattern and can be easy to realize economize on electricity.
Use the nRF905 lime light: corresponding with hardware, correctly dispose the internal register of nRF905.Use SPI serial communication protocol and micro-controller communications.Important Configuration Values such as following table:
Table 1nRF905 configuration register partial parameters
As shown in Figure 9, be concrete fft analysis process.The present invention utilizes the STC single-chip microcomputer that fft analysis is carried out in amplification and pretreated signal.Can strengthen recognition reaction to low-frequency weak signal by the FFT spectrum analysis.
Fft analysis of the present invention adopts basic 2 time domains to select algorithm, and its basic thought is that x (n) is divided into two groups by parity, and the simplified operation amount obtains typical butterfly processing element.The principle of FFT is: every grade of total N/2 butterfly, total log
2The N level, from 2 FFT gradually cumulative FFT count, finish until calculate.
Concrete fft analysis process steps is as follows:
(1) according to the butterfly flow graph of FFT computing, its output sequence X (k) arranges from small to large ord, and list entries x (n) arranges by so-called code bit inverted order.The arrangement regulation of code bit inverted order is to be determined by fft algorithm, if input is arranged by natural order, then output will become the arrangement of code bit inverted order; If output, input all will be arranged by natural order, then the shape of butterfly flow graph can twist, and causing can not be the new problems such as bit arithmetic, calculator memory increase.Therefore at first the data x (n) of storer is carried out the code bit inverted order, the implication of code bit inverted order is, sequence is entering between the fft algorithm, and sequence will be resequenced, and makes it to meet the fft algorithm requirement.The effect of carrying out the code bit inverted order is to make after the N point input data process FFT computing of arranging by natural sequence of time-domain sampling, and the putting in order of output data that obtains the result changes, and can arrange by natural sequence.
If decimal number is changed into binary number, then the reversed order of these binary first places to the end position again decimalize number of coming again, this decimal numeral arrangement is that the code bit inverted order is arranged.Following table is when N=8, the comparison of natural order and code bit inverted order.
Table 2 natural order and code bit inverted order (N=8)
| The decimal system | Binary number | The code bit inverted order of binary number | Decimal number after the code bit inverted |
| 0 | 000 | 000 | 0 |
| 1 | 001 | 100 | 4 |
| 2 | 010 | 010 | 2 |
| 3 | 011 | 110 | 6 |
| 4 | 100 | 001 | 1 |
| 5 | 101 | 101 | 5 |
| 6 | 110 | 011 | 3 |
| 7 | 111 | 111 | 7 |
Because x (n) is an array sequence, according to this array label and N compares, about move, get or and get and operate to realize the code bit inverted order.
(2) then carry out step by step butterfly computation, find out first the number l and the twiddle factor W that calculates this grade butterfly computation of single-stage butterfly element
N k, carry out again complex multiplication and addition.The result who obtains is as the data of the next element of this grade butterfly computation, and element carries out computing one by one, until next stage.
The twiddle factor computing formula is as follows:
Carry out following complex multiplication and addition:
X(j+k)＝X
(e)(k)+W
N kX
(o)(k)
X(j+k+1)＝X
(e)(k)-W
N kX
(o)(k)
The X that obtains (j+k) and X (j+k+1) are as the data of next element computing.Wherein k controls the butterfly computation of every one-level, and the FFT computing of j control x (n) is divided into groups according to l, and N represents to carry out counting of FFT computing, in the present invention N=64.By relatively j, k and l judge whether all elements computing of this grade complete.
(3) after the unit that finishes all elements in the one-level butterfly calculates, enter next stage butterfly unit and calculate, come the mark computing to proceed to which grade butterfly with i, judge whether that by the size of i and M relatively all element computings finish, when i＞M, then FFT finishes.
Because FFT is complex operation, in the STC single-chip microcomputer, self-defined complex data structure, each plural number need to take 8 bytes, and STC single-chip microcomputer internal storage data is limited, so the present invention uses 64 FFT to carry out spectrum analysis.
In the test of last simulation low-frequency weak signal input, amplifier gain reaches as high as 99.6dB among the present invention, and common-mode rejection ratio is up to 118dB.
Digital processing part can real-time sampling and is drawn low-frequency weak signal waveform after amplifying at liquid crystal; Can carry out fft analysis to sampled data, draw the spectrogram of signal; Sampled data can be wirelessly sent to PC.
Claims (9)
1. a SCM Based low-frequency weak signal detector is characterized in that comprising: feeble signal amplification and preprocessing part, and digital processing part;
Described feeble signal is amplified and preprocessing part comprises: input filter module, buffered module, pre-amplifying module, high-pass filtering module, low-pass filtering module, 50HZ trapper and post processing module; Undressed low-frequency weak signal at first enters the input filter module, carries out RFI and disturbs purified treatment; Then send into the buffered module, to reduce the correlativity of front stage circuits and follow-up amplifying circuit; Enter pre-amplifying module through the signal after the buffered, microvolt level signal is amplified to millivolt level signal sends into again the high-pass filtering module, filtering makes pre-amplifying module the undesired signal of direct current biasing occur, enter low-pass filtering module, after removing high frequency interference, enter filtering power frequency interference in the 50HZ trapper; Before signal enters digital processing, by post processing module signal is carried out rear class and amplify and electrical level transfer, to be fit to send into the digital processing part at last;
Described digital processes is divided and is comprised: AD sampling module, single-chip microcomputer, memory module and wireless sending module; At first send into the AD modular converter through the signal behind feeble signal amplification and the preprocessing part, carry out the AD sampling; The data that obtain of sampling are given the STC single-chip microcomputer, the sampling rate of Single-chip Controlling AD sampling module, and give memory module with the data that obtain, in order to sampled data is carried out fft analysis; Later the data wireless of analyzing can be sent to PC through the fft analysis in the STC single-chip microcomputer, obtain the characteristic of signal; The frequency spectrum of also having used the waveform after liquid crystal shows sampling and having carried out fft analysis in this digital processing part;
It is as follows that described single-chip microcomputer carries out the fft analysis process:
(1) at first the data x (n) of storer is carried out the code bit inverted order, make after the N point input data of arranging by natural sequence of time-domain sampling are passed through the FFT computing, the putting in order of output data that obtains the result changes, and can arrange by natural sequence;
(2) then carry out step by step butterfly computation, calculate first the twiddle factor of this grade butterfly computation, carry out again complex multiplication and addition; The data that the result who obtains carries out computing as next element in this grade butterfly, step by step down;
(3) at last all data operations are finished, then fft analysis is finished.
2. SCM Based low-frequency weak signal detector according to claim 1, it is characterized in that: described input filter module comprises resistance R 1, R2, capacitor C 3, C10 and capacitor C 8; Wherein resistance R 1 and capacitor C 3, resistance R 2 and capacitor C 10 have consisted of two low-pass filters, and differential mode and common-mode noise are had stronger inhibiting effect; R1 and R2 as the positive and negative input end of signal, help Isolation input circuit and outside source respectively, and capacitor C 8 is connected across the output terminal of two low-pass filter circuits, can effectively reduce any interchange common mode inhibition error that is caused by mismatch.
3. SCM Based low-frequency weak signal detector according to claim 1, it is characterized in that: described buffered module adopts one group of follower as impact damper, can improve input impedance and lower output impedance, also the front and back circuit can be separated, with the correlativity of circuit before and after reducing.
4. SCM Based low-frequency weak signal detector according to claim 1, it is characterized in that: described pre-amplifying module adopts AD620 as the core devices of low-frequency weak signal prime amplifier, and use two-stage to amplify, microvolt level signal is amplified.
5. SCM Based low-frequency weak signal detector according to claim 1, it is characterized in that: described high-pass filtering module is a bivalent high-pass filter.
6. SCM Based low-frequency weak signal detector according to claim 1, it is characterized in that: described low-pass filtering module is a BUTTERWOETH third-order low-pass filter, is used for the noise filtering of easy interfered circuit that circuit is existed.
7. SCM Based low-frequency weak signal detector according to claim 1 is characterized in that: described 50HZ trapper adopts the integrating filtering chip UAF42 design 50HZ filtering of Burr-Brown company.
8. SCM Based low-frequency weak signal detector according to claim 1, it is characterized in that: described post processing module comprises the adjustable amplification of rear gain per stage and electrical level transfer circuit.
9. SCM Based low-frequency weak signal detector according to claim 1 is characterized in that: described wireless sending module uses the nRF905 chip signal can be sent to PC.
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| CN105640550A (en) * | 2016-03-28 | 2016-06-08 | 四川大学 | Electroencephalogram collecting front-end design based on INA128 |
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| CN108957120B (en) * | 2018-05-17 | 2020-08-11 | 北华航天工业学院 | Weak signal extraction method and system |
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| CN111596228B (en) * | 2020-07-24 | 2020-10-09 | 宁波均联智行科技有限公司 | Electric leakage detection method and device |
| CN112114371A (en) * | 2020-08-21 | 2020-12-22 | 广东电网有限责任公司 | Signal processing system that three-coil submarine cable surveyed |
| CN114142579A (en) * | 2022-02-08 | 2022-03-04 | 杭州炬华科技股份有限公司 | Charging control method based on PWM signal |
| CN117192226B (en) * | 2023-08-11 | 2024-03-08 | 武汉大学 | Weak electromagnetic wave signal detection system |
| CN117040522B (en) * | 2023-10-09 | 2024-01-23 | 电子科技大学 | Full-dynamic power frequency interference suppression circuit suitable for double-electrode framework |
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| EP1647139B1 (en) * | 2003-07-21 | 2007-10-17 | Thomson Licensing | Method and system for detecting weak or invalid signals in data streams |
| CN1332186C (en) * | 2004-11-25 | 2007-08-15 | 上海交通大学 | Weak signal detection under complex background and characteristic analysis system |
| CN100458864C (en) * | 2006-04-14 | 2009-02-04 | 天津大学 | Method for high precision collecting weak signal and circuit thereof |
| CN101806631B (en) * | 2010-03-23 | 2011-08-31 | 浙江大学 | Large dynamic high speed weak pulse signal linear measuring circuit |
| CN201635734U (en) * | 2010-03-31 | 2010-11-17 | 西安思坦仪器股份有限公司 | Feeble signal detector |
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