CN102194767A - Substrate for power module, preparing method thereof, substrate with radiator and power module thereof - Google Patents

Substrate for power module, preparing method thereof, substrate with radiator and power module thereof Download PDF

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Publication number
CN102194767A
CN102194767A CN2011100459470A CN201110045947A CN102194767A CN 102194767 A CN102194767 A CN 102194767A CN 2011100459470 A CN2011100459470 A CN 2011100459470A CN 201110045947 A CN201110045947 A CN 201110045947A CN 102194767 A CN102194767 A CN 102194767A
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China
Prior art keywords
metallic plate
power module
layer
circuit layer
ceramic substrate
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CN2011100459470A
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Chinese (zh)
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殿村宏史
长友义幸
长濑敏之
黑光祥郎
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Mitsubishi Materials Corp
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Mitsubishi Materials Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K7/00—Constructional details common to different types of electric apparatus
    • H05K7/20—Modifications to facilitate cooling, ventilating, or heating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Thermal Sciences (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Physical Vapour Deposition (AREA)

Abstract

The present invention provides a substrate for a power module, a preparing method thereof, a substrate with a radiator and the power module thereof. The power module can restrain fluctuation or drape on a surface of a circuit layer in thermal circulation load. Furthermore, application of a thermal stress on a jointing interface between a ceramic substrate and a circuit layer can be restrained. Furthermore the power module has excellent thermal circulation reliability. The substrate (10) for the power module is provided with an aluminum circuit layer (12) on one surface of the ceramic substrate (11), wherein, the circuit layer (12) is provided with a body layer (12B) and a surface hardening layer (12A) which is configured for being exposed from the surface side. An indentation hardness (Hs) of one surface of the circuit layer (12) is set to more than 50mgf/mu m<2> and is less than 200mgf/mu m<2>. More than 80% of the area of the indentation hardness (Hs) becomes the surface hardening layer (12A), and the indentation hardness (Hb) of the body layer (12B) is less than 80% of the indentation hardness (Hs).

Description

Power module substrate and method for making, carry this substrate and the power model of radiator
Technical field
The present invention relates to a kind of power module substrate that possesses the circuit layer that is equipped with electronic components such as semiconductor element, this power module substrate manufacture method, utilize the power module substrate that carries radiator and the power model of this power module substrate.
Background technology
Because the caloric value that is used for the power component that electric power supplies with in semiconductor element is than higher, so as the substrate that carries this power component, for example, shown in patent documentation 1, being extensive use of has following power module substrate: on the ceramic substrate that is made of AlN (aluminium nitride), engage the metallic plate that the Al (aluminium) that becomes circuit layer is arranged by the Al-Si brazing filler metal.
And for example, shown in patent documentation 2-4, proposing has following power module substrate: engage aluminium alloy part by the motlten metal bonding method and form circuit layer on ceramic substrate.
In this power module substrate, be equipped on the circuit layer by layer as the semiconductor element of power component, and use as power model.
At this, in the above-mentioned power model, the thermal cycle meeting is loaded in use.So, have following worry: based on the stress of the difference of the thermal coefficient of expansion of ceramic substrate and aluminium in the joint interface of ceramic substrate and circuit layer, thereby joint reliability descends.Therefore, be smaller aluminium forming circuit layers of deformation drag such as 4N aluminium more than 99.99% by purity in the past, the distortion by circuit layer absorbs thermal stress, thereby seeks the raising of joint reliability.
Patent documentation 1: the open 2005-328087 communique of Japan Patent
Patent documentation 2: the open 2002-329814 communique of Japan Patent
Patent documentation 3: the open 2005-252136 communique of Japan Patent
Patent documentation 4: the open 2007-092150 communique of Japan Patent
But, be more than 99.99% during smaller aluminium forming circuit layer such as (4N aluminium) deformation drag by purity, produce on the surface of circuit layer when having the load thermal cycle and rise and fall or the problem of fold.Rise and fall or fold if produce on the surface of circuit layer like this, then owing to cracking, so the reliability of power model can descend at layer.
Especially, recently, owing to the miniaturization of power model, when thin-walled property is developing, its environment for use is also more and more severeer, and the caloric value from electronic components such as semiconductor elements becomes greatly gradually, so the temperature difference of thermal cycle will become greatly, produces fluctuating or fold on the surface of circuit layer.
Summary of the invention
The present invention In view of the foregoing finishes, it is a kind of when thermal cycle is loaded that its purpose is to provide, the surface that can be suppressed at circuit layer produces and rises and falls or fold, and, can suppress the joint interface that thermal stress acts on ceramic substrate and circuit layer, the power module substrate of thermal cycle reliability excellence, the manufacture method of this power module substrate, possess the power module substrate that carries radiator and the power model of this power module substrate.
Realize described purpose in order to solve such problem, power module substrate of the present invention, one side at ceramic substrate sets the aluminum circuit layer, and on the one side of this circuit layer, set electronic component, it is characterized in that, the cementation zone that described circuit layer has body layer and is configured to expose in described one side side, the identation hardness Hs of the described one side of described circuit layer is set in 50mgf/ μ m 2Above 200mgf/ μ m 2In the following scope, in the described circuit layer, zone with identation hardness more than 80% of described identation hardness Hs becomes described cementation zone, described cementation zone contains the interpolation element more than a kind or 2 kinds that is selected among B, Ti, V, Cr, Mn, Fe, Co and the Mo, and the identation hardness Hb of described body layer is less than 80% of described identation hardness Hs.
In addition, identation hardness H of the present invention is meant, utilization is called that the angle is the triangular pyramid diamond penetrator below 115.1 ° more than 114.8 ° between the rib of Bai Keweiqi pressure head, test load is made as 5000mgf and measures load-displacement relation when applying load, and use formula: H=37.926 * 10 -3* (load (mgf)) ÷ displacement (μ m) 2) definition hardness.
According to the power module substrate of this structure, because in circuit layer, the one side side that is formed with the circuit layer of layer is formed with cementation zone, the identation hardness of this cementation zone is set at identation hardness Hs (the 50mgf/ μ m of the described one side of described circuit layer 2Above 200mgf/ μ m 2Below) more than 80%, so that the deformation drag that sidepiece of circuit layer divides becomes is big, the fluctuating in the time of can suppressing the thermal cycle load or the generation of fold.
In addition, because described cementation zone contains the interpolation element more than a kind or 2 kinds that is selected among B, Ti, V, Cr, Mn, Fe, Co and the Mo, thus add element sclerosis aluminium by these, thus described cementation zone can be formed.
And circuit layer has identation hardness Hb for 80% body layer less than described identation hardness Hs, so in this body layer, it is less that deformation drag becomes.Therefore, the thermal stress when can the distortion by this body layer absorbing the thermal cycle load, and can improve the joint reliability of ceramic substrate and circuit layer.
At this, the thickness of preferred described cementation zone is below the above 300 μ m of 1 μ m, and the thickness of described body layer is below the above 1500 μ m of 100 μ m.
At this moment, because the thickness of cementation zone is 1 μ m below the above 300 μ m, so can positively prevent to produce fluctuating or fold in the one side of circuit layer.And, because the thickness of body layer is 100 μ m below the above 1500 μ m, so the thermal stress when can enough body layers positively absorbing the thermal cycle load.
And, the adding up to below the above 10atom% of 0.2atom% of the content of the described interpolation element in the preferred described cementation zone.
At this moment, because cementation zone contains the above-mentioned interpolation element that amounts to below the above 10atom% of 0.2atom%, thus can add the element aluminium that positively hardens by these, and can form cementation zone with described identation hardness.
In addition, described ceramic substrate is preferably by AlN, Si 3N 4Or Al 2O 3Constitute.
At this moment, therefore the insulating properties excellence of ceramic substrate can provide insulating reliability high power module substrate.
The manufacture method of power module substrate of the present invention, make described power module substrate, it is characterized in that, possessing has: the set operation, with being selected from the described one side that the interpolation element more than a kind or 2 kinds among B, Ti, V, Cr, Mn, Fe, Co and the Mo is bonded to the metallic plate that becomes described circuit layer, form the fixation layer that contains this interpolation element; And heating process, heat described circuit layer, by making the diffusion inside of described interpolation element, thereby form cementation zone in the described one side of described circuit layer towards described circuit layer.
Manufacture method according to the power module substrate of this structure, in heating process, be selected from the interpolation element more than a kind or 2 kinds among B, Ti, V, Cr, Mn, Fe, Co and the Mo to the diffusion inside of circuit layer by contained in the fixation layer that makes the one side that is formed at circuit layer, thereby the interpolation concentration of element of the one side side of circuit layer uprises, along with adding the concentration of element step-down away from one side.And, adding the CONCENTRATION DISTRIBUTION of element by this, the one side side formation cementation zone at circuit layer forms body layer in the mode that is laminated to this cementation zone.Therefore can make the power module substrate that possesses cementation zone and body layer.
And, the manufacture method of power module substrate of the present invention, make described power module substrate, it is characterized in that, have: the set operation, with being selected from the one side that the interpolation element more than a kind or 2 kinds among B, Ti, V, Cr, Mn, Fe, Co and the Mo anchors at the metallic plate that becomes described circuit layer, form the fixation layer that contains this interpolation element; The lamination operation is passed through the described ceramic substrate of solder lamination in the another side side of described metallic plate; Heating process will be heated when laminating direction pressurizes by the described pottery of lamination and described metallic plate, form the motlten metal zone at the interface of described ceramic substrate and described metallic plate; And solidify operation, by making this motlten metal zone freezing engage described ceramic substrate and described metallic plate, in described heating process, described interpolation element by making described fixation layer is towards the diffusion inside of described circuit layer, thereby forms cementation zone in the described one side of described circuit layer.
Manufacture method according to the power module substrate of this structure, in the heating process that is used for described metallic plate of soldering and described ceramic substrate, can make the interpolation Elements Diffusion more than a kind or 2 kinds that is selected among B, Ti, V, Cr, Mn, Fe, Co and the Mo of the one side side that is bonded to metallic plate form cementation zone.Therefore, need not in order to form cementation zone to carry out in addition heat treated, the manufacturing cost that can cut down this power module substrate.
In addition, the manufacture method of power module substrate of the present invention, make described power module substrate, it is characterized in that, have: the set operation, with being selected from the one side that the interpolation element more than a kind or 2 kinds among B, Ti, V, Cr, Mn, Fe, Co and the Mo is bonded to the metallic plate that becomes described circuit layer, form the fixation layer that contains this interpolation element; The 2nd set operation is added element with the 2nd more than a kind or 2 kinds that is selected from Si, Cu, Zn, Ge, Ag, Mg, Ca and Li and is bonded at least one side in the one side of the another side of described metallic plate and described ceramic substrate, forms the 2nd fixation layer; The lamination operation is come described ceramic substrate of lamination and described metallic plate by described the 2nd fixation layer; Heating process will be heated when laminating direction pressurizes by the described ceramic substrate of lamination and described metallic plate, form the motlten metal zone at the interface of described ceramic substrate and described metallic plate; And solidify operation, by making this motlten metal zone freezing engage described ceramic substrate and described metallic plate, in described heating process, described interpolation element by making described fixation layer is towards the diffusion inside of described circuit layer, thereby forms cementation zone in the described one side of described circuit layer.
Manufacture method according to the power module substrate of this structure, can make the 2nd more than a kind or 2 kinds that is selected among Si, Cu, Zn, Ge, Ag, Mg, Ca and the Li add Elements Diffusion by heating process and form the motlten metal zone, and by engaging described metallic plate and described ceramic substrate forms circuit layer.And, in this heating process, can make the interpolation Elements Diffusion more than a kind or 2 kinds that is selected among B, Ti, V, Cr, Mn, Fe, Co and the Mo of the one side side that is bonded to metallic plate form cementation zone.Therefore, need not in order to form cementation zone to carry out in addition heat treated, the manufacturing cost that can subdue this power module substrate.
And, the manufacture method of power module substrate of the present invention, make described power module substrate, it is characterized in that, have: the set operation, with being selected from the one side that the interpolation element more than a kind or 2 kinds among B, Ti, V, Cr, Mn, Fe, Co and the Mo is bonded to the metallic plate that becomes described circuit layer, form the fixation layer that contains this interpolation element; The 2nd set operation, add element and be selected from least one side in the one side that the active element more than a kind or 2 kinds among Ti, Zr, Hf, Ta, Nb and the Mo is bonded to the another side of described metallic plate and described ceramic substrate being selected from the 2nd more than a kind or 2 kinds among Si, Cu, Ag and the Ge, form thus and contain these the 2nd the 2nd fixation layers that adds elements and active element; The lamination operation is come described ceramic substrate of lamination and described metallic plate by described the 2nd fixation layer; Heating process will be heated when laminating direction pressurizes by the described ceramic substrate of lamination and described metallic plate, form the motlten metal zone at the interface of described ceramic substrate and described metallic plate; And solidify operation, and engage described ceramic substrate and described metallic plate by making this motlten metal zone freezing, in described heating process, by making described interpolation Elements Diffusion, thereby form the metal hardened layer on described metallic plate top layer at described metallic plate.
Manufacture method according to the power module substrate of this structure, can make the 2nd more than a kind or 2 kinds that is selected from Si, Cu, Ag and Ge add element and the active element more than a kind or 2 kinds that is selected from Ti, Zr, Hf, Ta, Nb and Mo spreads and forms the motlten metal zone by heating process, and by engaging described metallic plate and described ceramic substrate forms circuit layer.Especially, described the 2nd interpolation element is the element that makes the fusing point reduction of aluminium, so under the condition than lower temperature, can form the motlten metal zone at the interface of metallic plate and ceramic substrate.
And, in this heating process, can make the interpolation Elements Diffusion more than a kind or 2 kinds that is selected among B, Ti, V, Cr, Mn, Fe, Co and the Mo of the one side side that is bonded to metallic plate form cementation zone.Therefore, need not in order to form cementation zone to carry out in addition heat treated, the manufacturing cost that can subdue this power module substrate.
At this, preferred and described interpolation element set Al together in described set operation.
At this moment since with described interpolation element set Al together, so set positively is selected from the interpolation element more than a kind or 2 kinds among B, Ti, V, Cr, Mn, Fe, Co and the Mo.In addition, for described interpolation element set Al together, described interpolation element of evaporation and Al simultaneously also can use the alloy of described interpolation element and Al and carry out sputter as target.
And described set operation is preferably come the described interpolation element of set by paste or the ink that plating, evaporation, CVD, sputter, cold spraying or coating are dispersed with the powder that contains described interpolation element, forms described fixation layer.
At this moment, can described interpolation element positively be bonded to the one side of described metallic plate by paste or the ink that plating, evaporation, CVD, sputter, cold spraying or coating are dispersed with the powder that contains described interpolation element, and can form described fixation layer.And, can accurately adjust the fixed amount of described interpolation element.
And the power module substrate that carries radiator of the present invention is characterised in that, the radiator that possesses described power module substrate and this power module substrate is cooled off.
According to the power module substrate that carries radiator of this structure, owing to possess the radiator that has pair power module substrate to cool off, so can cool off the heat that is created on the power module substrate effectively by radiator.
In addition, power model of the present invention is characterised in that, possesses described power module substrate and is equipped on electronic component on this power module substrate.
Power model according to this structure, because the bond strength height of ceramic substrate and circuit layer, and, can suppress to be formed at the generation of the crackle on the layer between circuit layer and the semiconductor element, even so in the environment for use of sternness, its reliability is improved by leaps and bounds.
Can provide a kind of according to the present invention, the surface that can be suppressed at circuit layer when thermal cycle is loaded produces and rises and falls or fold, and, can suppress the joint interface that thermal stress acts on ceramic substrate and circuit layer, the power module substrate of the excellence of thermal cycle reliability in addition, the manufacture method of this power module substrate, possess the power module substrate that carries radiator and the power model of this power module substrate.
Description of drawings
Fig. 1 is to use the brief description figure of power model of the power module substrate of the 1st execution mode of the present invention.
Fig. 2 is the key diagram of the power module substrate of expression the 1st execution mode of the present invention.
Fig. 3 is the key diagram of circuit layer of the power module substrate of expression the 1st execution mode of the present invention.
Fig. 4 is the flow chart of manufacture method of the power module substrate of expression the 1st execution mode of the present invention.
Fig. 5 is the key diagram of manufacture method of the power module substrate of expression the 1st execution mode of the present invention.
Fig. 6 is near the key diagram the joint interface of metallic plate in the presentation graphs 5 and ceramic substrate.
Fig. 7 is to use the brief description figure of power model of the power module substrate of the 2nd execution mode of the present invention.
Fig. 8 is the key diagram of the power module substrate of expression the 2nd execution mode of the present invention.
Fig. 9 is the amplification key diagram of joint interface of circuit layer (metal level) and ceramic substrate of the power module substrate of expression the 2nd execution mode of the present invention.
Figure 10 is the flow chart of manufacture method of the power module substrate of expression the 2nd execution mode of the present invention.
Figure 11 is the key diagram of manufacture method of the power module substrate of expression the 2nd execution mode of the present invention.
Figure 12 is the key diagram of the power module substrate of expression the 3rd execution mode of the present invention.
Figure 13 is the flow chart of manufacture method of the power module substrate of expression the 3rd execution mode of the present invention.
Figure 14 is the key diagram of the power module substrate of expression the 4th execution mode of the present invention.
Figure 15 is the flow chart of manufacture method of the power module substrate of expression the 4th execution mode of the present invention.
Figure 16 is the key diagram of the power module substrate of expression the 5th execution mode of the present invention.
Figure 17 is the flow chart of manufacture method of the power module substrate of expression the 5th execution mode of the present invention.
[symbol description]
1,101-power model, 3-semiconductor chip (electronic component), 10,110,210,310,410-power module substrate, 11,111,211,311,411-ceramic substrate, 12,112,212,312,412-circuit layer, 12A, 112A, 212A, 312A, 412A-cementation zone, 12B, 112B, 212B, 312B, 412B-body layer, 40, the 140-radiator.
Embodiment
Below, with reference to accompanying drawing embodiments of the present invention are described.
Fig. 1 represents to use the power model of the power module substrate of the 1st execution mode of the present invention.
This power model 1 possesses and has: power module substrate 10 is equipped with circuit layer 12; Semiconductor chip 3 is engaged in the surface of circuit layer 12 by layer 2; And radiator 40.At this, layer 2 is that for example Sn-Ag system, Sn-In are or the scolder of Sn-Ag-Cu system.In addition, in the present embodiment, be provided with Ni coating (not shown) between circuit layer 12 and the layer 2.
As shown in Figures 1 and 2, power module substrate 10 possesses and has: ceramic substrate 11 constitutes insulating barrier; Circuit layer 12 is equipped on the one side (in Fig. 1 and Fig. 2 for top) of this ceramic substrate 11; Reach metal level 13, be equipped on the another side (in Fig. 1 and Fig. 2, being the bottom) of ceramic substrate 11.
Ceramic substrate 11 is made of the high AlN of insulating properties (aluminium nitride) for preventing the substrate that is electrically connected between circuit layer 12 and the metal level 13.And the thickness setting of ceramic substrate 11 is set at 0.635mm in the present embodiment in the scope of 0.2～1.5mm.In addition, as shown in Figures 1 and 2, in the present embodiment, the width setup of ceramic substrate 11 is the width of being wider than circuit layer 12 and metal level 13.
As shown in Figure 5, circuit layer 12 forms by the metallic plate 22 that one side (being top in Fig. 5) joint at ceramic substrate 11 has conductivity.In the present embodiment, circuit layer 12 is by being that metallic plate 22 that the calendering plate of the aluminium (so-called 4N aluminium) more than 99.99% constitutes is engaged in ceramic substrate 11 and forms by purity.
As shown in Figure 5, metal level 13 forms by another side (bottom in Fig. 5) bonding metal plates 23 at ceramic substrate 11.In the present embodiment, metal level 13 and circuit layer 12 are equally by being that the metallic plate 23 of the calendering plate formation of the aluminium (so-called 4N aluminium) 99.99% or more is engaged in ceramic substrate 11 and forms by purity.
Radiator 40 is used to cool off described power module substrate 10, and as shown in Figure 1, possessing has: top plate portion 41; And stream 42, be used to make coolant (for example cooling water) circulation.Radiator 40 (top plate portion 41) preferably is made of the good material of heat conductivity, in the present embodiment, is made of A6063 (aluminium alloy).
And, in the present embodiment, between the top plate portion 41 of radiator 40 and metal level 13, be provided with by aluminum or aluminum alloy or comprise the resilient coating 15 that the composite material (for example AlSiC etc.) of aluminium constitutes.
And as shown in Figure 2, circuit layer 12 possesses and has: cementation zone 12A is equipped on its one side (being top in Fig. 2) side; Reach body layer 12B, be positioned at the another side side of this cementation zone 12A.
Cementation zone 12A exposes in the one side of circuit layer 12, towards another side side (be downside among Fig. 2) extension, is the zone that the identation hardness Hs with respect to the one side of circuit layer 12 has the identation hardness more than 80% from this one side.At this, in the present embodiment, the identation hardness Hs of the one side of circuit layer 12 is set in 50mgf/ μ m 2Above 200mgf/ μ m 2In the following scope.
Body layer 12B becomes 80% the zone of its identation hardness Hb less than described identation hardness Hs.
In addition, in the present embodiment, be formed with near interface layer 12C in the circuit layer 12 with near the joint interface of ceramic substrate 11, the identation hardness Hc of this near interface layer is higher than the identation hardness Hb of body layer 12B.
At this, in the present embodiment, the thickness t s of cementation zone 12A is below the above 300 μ m of 1 μ m, and the thickness t b of body layer 12B is below the above 1500 μ m of 100 μ m, and the thickness t c of near interface layer 12C is below the above 300 μ m of 50 μ m.
And cementation zone 12A contains the interpolation element more than a kind or 2 kinds that is selected among B, Ti, V, Cr, Mn, Fe, Co and the Mo, the adding up to below the above 10atom% of 0.2atom% of the content of this interpolation element.In addition, in the present embodiment, contain the following Fe of the above 10atom% of 0.2atom% as adding element.
As shown in Figure 3, in circuit layer 12, constitute as follows: the content of interpolation element of its one side is the highest, along with towards the another side side, and the content step-down.This is because hardened by the part of this interpolation element circuit layer 12, and has formed above-mentioned cementation zone 12A.
On the other hand, as shown in Figure 3, in body layer 12B, because it is few to add the content of element, so the purity height of Al, deformation drag is still little.
In addition, be arranged in the near interface layer 12C of ceramic substrate 11 sides, the Elements Diffusion of being utilized in the engaging of ceramic substrate 11 and metallic plate 22 and the purity of Al become and are lower than body layer 12B.
Below, with reference to Fig. 4 to Fig. 6 the manufacture method of the power module substrate 10 of described structure is described.
(set operation S01)
At first, as shown in Figure 5, the interpolation element more than a kind or 2 kinds that is selected among B, Ti, V, Cr, Mn, Fe, Co and the Mo is anchored at the one side of the metallic plate 22 that becomes circuit layer 12 by sputter, form the fixation layer 22A that contains this interpolation element.
In the present embodiment, Fe as adding the element set, is set at 0.05mg/cm with its fixed amount 2Above 1.6mg/cm 2Below.
(lamination operation S02)
Then, as shown in Figure 5, the metallic plate 22 (the calendering plate of 4N aluminium) that becomes circuit layer 12 is the one side side that the solder paper tinsel 24 of 5～50 μ m (being 14 μ m in the present embodiment) is laminated to ceramic substrate 11 by thickness, and the metallic plate 23 (the calendering plate of 4N aluminium) that becomes metal level 13 is the another side side that the solder paper tinsel 25 of 5～50 μ m (being 14 μ m in the present embodiment) is laminated to ceramic substrate 11 by thickness.At this moment, metallic plate 22 be laminated into form the face that fixation layer 22A is arranged opposing face towards ceramic substrate 11 sides.So form layered product 20.
In addition, in the present embodiment, solder paper tinsel 24,25 becomes the Al-Si brazing filler metal that contains fusing point reduction elements Si.
(heating process S03)
Then, the layered product 20 that will form in lamination operation S02 is so that (pressure is 1～5kgf/cm to its laminating direction pressurization 2) state pack into and heat in the heating furnace.By this heating process S03, a part of fusion of solder paper tinsel 24,25 and metallic plate 22,23 as shown in Figure 6, forms motlten metal zone 26,27 respectively at the interface at metallic plate 22,23 and ceramic substrate 11.At this, heating-up temperature is more than 550 ℃ below 650 ℃, and be more than 30 minutes below 180 minutes heating time.
And by this heating process S03, interpolation element (being Fe in the present embodiment) contained among the fixation layer 22A of metallic plate 22 spreads towards the another side side of metallic plate 22.
(solidifying operation S04)
Then,, motlten metal zone 26,27 is solidified, and engage ceramic substrate 11, metallic plate 22 and metallic plate 23 by layered product 20 is cooled off.At this moment, contained fusing point reduction element (Si) spreads to metallic plate 22,23 sides in the solder paper tinsel 24,25.
So, the metallic plate 22,23 that becomes circuit layer 12 and metal level 13 engages with ceramic substrate 11, produces the power module substrate 10 of present embodiment.
And, in circuit layer 12, form cementation zone 12A and body layer 12B by interpolation Elements Diffusion contained among the fixation layer 22A.And, by near the layer 12C Si diffusion formation joint contained in the solder paper tinsel 24.
And, in the another side side of the metal level 13 of this power module substrate 10, engage radiator 40 by soldering etc. by resilient coating 15, form the power module substrate that carries radiator.And, carry semiconductor chip 3 on the surface of circuit layer 12 by layer 2, thereby produce the power model 1 of present embodiment.
Become in the manufacture method as the power module substrate 10 of the present embodiment of above structure and power module substrate, the one side side of circuit layer 12 is formed with cementation zone 12A, and the identation hardness Hs of the one side of circuit layer 12 is set in 50mgf/ μ m 2Above 200mgf/ μ m 2In the following scope, because the zone more than 80% of this identation hardness Hs becomes cementation zone 12A, so the deformation drag that a sidepiece of circuit layer 12 divides becomes big, the fluctuating in the time of can suppressing the thermal cycle load or the generation of fold.
And circuit layer 12 has 80% the body layer 12B of identation hardness Hb less than described identation hardness Hs, so deformation drag is smaller in this body layer 12B, and the thermal stress in the time of can absorbing the thermal cycle load by the distortion of this body layer 12B.Therefore, can improve the joint reliability of ceramic substrate 11 and circuit layer 12.
In addition, because the thickness of cementation zone 12A is 1 μ m below the above 300 μ m, so can positively prevent to produce fluctuating or fold in the one side of circuit layer 12.In addition, because the thickness of body layer 12B is 100 μ m below the above 1500 μ m, so the thermal stress can positively absorb the thermal cycle load with body layer 12B the time.
Therefore, during the thermal cycle load, can suppress the fluctuating on circuit layer 12 surfaces or the generation of fold, and can suppress the generation of the crackle in the layer 2.And, can suppress the joint interface that thermal stress acts on ceramic substrate 11 and circuit layer 12, improve the thermal cycle reliability.
Contain the interpolation element more than a kind or 2 kinds that is selected among B, Ti, V, Cr, Mn, Fe, Co and the Mo among this cementation zone 12A, adding up to below the above 10atom% of 0.2atom% of the content of this interpolation element, in the present embodiment, contain the following Fe of the above 10atom% of 0.2atom% as adding element, so can make metallic plate 22 sclerosis by this interpolation element, and the identation hardness Hs of the one side of circuit layer 12 can be located at 50mgf/ μ m 2Above 200mgf/ μ m 2In the following scope.
And, be selected from the interpolation element more than a kind or 2 kinds among B, Ti, V, Cr, Mn, Fe, Co and the Mo in the one side of the metallic plate 22 that becomes circuit layer 12 by the sputter set, formation contains the fixation layer 22A of this interpolation element (being Fe in the present embodiment), make the interpolation Elements Diffusion by heating this metallic plate 22 (circuit layer 12), so one side side at circuit layer 12, the content that adds element uprises, and can form above-mentioned cementation zone 12A.And the content that adds element is along with the step-down away from one side, thereby forms aforementioned body layer 12B in the mode that is laminated to cementation zone 12A.
At this, in the present embodiment, in the heating process S03 of ceramic soldering substrate 11 and metallic plate 22,23, owing to make the interpolation Elements Diffusion of fixation layer 22A, so need not to carry out special heat treatment step, can control the manufacturing cost step-down that makes this power module substrate 10.
Then, with reference to Fig. 7 to Figure 11 the 2nd execution mode of the present invention is described.
This power model 101 possesses and has: power module substrate 110 is equipped with circuit layer 112; Semiconductor chip 3 is engaged in the surface of circuit layer 112 by layer 2; And radiator 140.At this, the scolder that layer 2 for example for Sn-Ag system, Sn-In system or Sn-Ag-Cu is.In addition, in the present embodiment, between circuit layer 112 and layer 2, be provided with Ni coating (not shown).
Power module substrate 110 possesses and has: ceramic substrate 111; Circuit layer 112 is equipped on the one side (in Fig. 7 for top) of this ceramic substrate 111; Reach metal level 113, be equipped on the another side (in Fig. 7, being the bottom) of ceramic substrate 111.
Ceramic substrate 111 is for preventing the substrate that is electrically connected between circuit layer 112 and the metal level 113.In the present embodiment, ceramic substrate 111 is by the high Al of insulating properties 2O 3(aluminium oxide) constitutes.And the thickness setting of ceramic substrate 111 is set at 0.32mm in the present embodiment in the scope of 0.2～0.8mm.
As shown in figure 11, circuit layer 112 forms by the metallic plate 122 that the one side joint at ceramic substrate 111 has conductivity.In the present embodiment, circuit layer 112 is by being that metallic plate 122 that aluminium (4N aluminium) the calendering plate more than 99.99% constitutes is engaged in ceramic substrate 111 and forms by purity.
And metal level 113 forms by the another side bonding metal plates 123 at ceramic substrate 111.In the present embodiment, metal level 113 and circuit layer 112 are equally by being that the metallic plate 123 of aluminium (4N aluminium) the calendering plate formation 99.99% or more is engaged in ceramic substrate 111 and forms by purity.
Radiator 140 is used to cool off described power module substrate 110, as shown in Figure 7, possesses the top plate portion 141 that engages with power module substrate 110 is arranged.In the present embodiment, lower side at this top plate portion 141 is equipped with corrugated fin 146 and base plate 145, marks off the stream 142 that is used to make coolant (for example cooling water) circulation by these top plate portions 141, corrugated fin 146 and base plate 145.
In addition, radiator 140 (top plate portion 141) preferably is made of the good material of heat conductivity, is made of A3003 (aluminium alloy) in the present embodiment.
And as shown in Figure 8, circuit layer 112 possesses and has: cementation zone 112A is equipped on its one side (being top among Fig. 8) side; Reach body layer 112B, be positioned at the another side side of this cementation zone 112A.
Cementation zone 112A exposes in the one side of circuit layer 112, and from this one side towards another side side (be downside Fig. 8) extension, be the zone that the identation hardness Hs with respect to the one side of circuit layer 112 has the identation hardness more than 80%.At this, in the present embodiment, the identation hardness Hs of the one side of circuit layer 112 is set in 50mgf/ μ m 2Above 200mgf/ μ m 2In the following scope.
Body layer 112B becomes 80% the zone of its identation hardness Hb less than described identation hardness Hs.
In addition, in the present embodiment, be formed with the near interface layer 112C that its identation hardness Hc is higher than the identation hardness Hb of body layer 112B in the circuit layer 112 with near the joint interface of ceramic substrate 111.
At this, in the present embodiment, the thickness t s of cementation zone 112A is below the above 300 μ m of 1 μ m, and the thickness t b of body layer 112B is below the above 1500 μ m of 100 μ m, and the thickness t c of near interface layer 112C is below the above 300 μ m of 50 μ m.
And cementation zone 112A contains the interpolation element more than a kind or 2 kinds that is selected among B, Ti, V, Cr, Mn, Fe, Co and the Mo, and the content of this interpolation element adds up to below the above 10atom% of 0.2atom%.In addition, in the present embodiment, contain the following Fe of the above 10atom% of 0.2atom% as adding element.
In the circuit layer 112, constitute as follows: the content of interpolation element of its one side is the highest, and along with towards the another side side, the content step-down.This is because hardened by the part of this interpolation element circuit layer 112, and has formed above-mentioned cementation zone 112A.
On the other hand, among the body layer 112B, the content of above-mentioned interpolation element is few, so the purity height of Al, deformation drag is still little.
In addition, be arranged in the near interface layer 112C of ceramic substrate 111 sides, the Elements Diffusion of in the engaging of ceramic substrate 111 and metallic plate 122, being utilized, thus the purity of Al becomes and is lower than body layer.
If be described in detail, solid solution has the 2nd more than a kind or 2 kinds that is selected among Si, Cu, Ag and the Ge to add element near interface layer 112C.At this, the described the 2nd total of adding concentration of element of the joint interface side of this near interface layer 112C is set in the following scope of the above 5 quality % of 0.05 quality %.
In the present embodiment, Cu and Ge are added the element use as the 2nd, the Cu concentration of near interface layer 112C is set in the following scope of the above 1 quality % of 0.05 quality %, and Ge concentration is set in the following scope of the above 1 quality % of 0.05 quality %.
In addition, described the 2nd interpolation concentration of element of near interface layer 112C is to analyze (spot diameter 30 μ m) carry out 5 mensuration in the scope of joint interface to 50 μ m mean value with EPMA.During this EPMA analyzes, whole spot diameter is entered in the scope of joint interface to 50 μ m and implement to analyze.
And ceramic substrate 111 is got involved with the joint interface 130 of circuit layer 112 (metallic plate 122) the active element more than a kind or 2 kinds that is selected among Ti, Zr, Hf, Ta, Nb and the Mo.In addition, intervention has Hf as active element in the present embodiment.
At this, as shown in Figure 9, be formed with oxide skin(coating) 132 in joint interface 130 parts, this oxide skin(coating) is made of the oxygen compound that comprises reactive metal Hf and oxygen.This oxide skin(coating) 132 is by reactive metal Hf with by Al 2O 3The oxygen reaction of the ceramic substrate 111 that constitutes and generating.The thickness H of this oxide skin(coating) 132 for example is below the above 5 μ m of 0.1 μ m.
In addition, in the present embodiment, to engaging of the metallic plate 123 that becomes metal level 113 and ceramic substrate 111, also carry out in the same manner with metallic plate 122 that becomes circuit layer 112 and ceramic substrate 111, partly be formed with oxide skin(coating) at joint interface, near the joint interface of metal level 113 also solid solution have the 2nd to add element.
Below, with reference to Figure 10 and Figure 11 the manufacture method of the power module substrate 110 of described structure is described.
(the 1st set operation S11)
At first, as shown in figure 11, be selected from the interpolation element more than a kind or 2 kinds among B, Ti, V, Cr, Mn, Fe, Co and the Mo by the sputter set, form the fixation layer 122A that contains this interpolation element in the one side of the metallic plate 122 that becomes circuit layer 112.
In the present embodiment, set Fe is as adding element, and its fixed amount is set in 0.05mg/cm 2Above 1.6mg/cm 2Below.
(the 2nd set operation S12)
Then, add element Cu and Ge and active element Hf by sputter set the 2nd, form the 2nd fixation layer 124,125 on each composition surface of metallic plate 122,123.
In the present embodiment, the amount of the Cu in the 2nd fixation layer 124,125 is set in 0.08mg/cm 2Above 2.7mg/cm 2Below, the Ge amount is set in 0.002mg/cm 2Above 2.5mg/cm 2Below, the Hf amount is set in 0.1mg/cm 2Above 6.7mg/cm 2Below.
(lamination operation S13)
Then, metallic plate 122 is laminated to the one side side of ceramic substrate 111, and, metallic plate 123 is laminated to the another side side of ceramic substrate 111.At this moment, as shown in figure 11, the face that is formed with the 2nd fixation layer 124,125 in the metallic plate 122,123 is to carry out lamination towards the mode of ceramic substrate 111.That is, the 2nd fixation layer 124,125 is got involved between metallic plate 122,123 and ceramic substrate 111.Form layered product 120 like this.
(heating process S14)
Then, the layered product 120 that will form in lamination operation S13 is so that (pressure is 1～5kgf/cm to its laminating direction pressurization 2) state pack into and heat in the heating furnace, form the motlten metal zone at the interface respectively at metallic plate 122,123 and ceramic substrate 111.This motlten metal zone be by the Cu of the 2nd fixation layer 124,125 and Ge to the diffusion of metallic plate 122,123 sides, near the Cu concentration the 2nd fixation layer 124,125 of metallic plate 122,123, Ge concentration rises and the fusing point step-down forms.
At this moment, reactive metal Hf and the Al that constitutes ceramic substrate 111 2O 3Reaction generates the oxygen compound contain Hf and oxygen (HfO for example 2), form oxide skin(coating) 132.
And by this heating process S14, interpolation element (being Fe in the present embodiment) contained among the fixation layer 122A of metallic plate 122 spreads towards the another side side of metallic plate 122.
In addition, in the present embodiment, the atmosphere in the heating furnace is made as N 2Gas atmosphere, heating-up temperature are set in more than 550 ℃ in the scope below 650 ℃.
(solidifying operation S15)
Then, under the state that is formed with the motlten metal zone, temperature is remained constant.Like this, Cu, the Ge in the motlten metal zone further spreads to metallic plate 122,123 sides.Thus, once for the partial C u concentration in motlten metal zone, Ge concentration reduce gradually, fusing point rises, and solidifies in that temperature is remained under the constant state.That is, ceramic substrate 111 and metallic plate 122,123 engage by so-called isothermal diffusion bond (Transient Liquid Phase Diffusion Bonding).So, be cooled to normal temperature after solidifying.
So, the metallic plate 122,123 that becomes circuit layer 112 and metal level 113 engages with ceramic substrate 111, produces the power module substrate 110 of present embodiment.
And, in circuit layer 112, form cementation zone 112A and body layer 112B by interpolation Elements Diffusion contained among the fixation layer 122A.And, by Cu contained in the 2nd fixation layer 124 and Ge spread form engage near layer 112C.
And radiator 140 is engaged in the another side side of the metal level 113 of this power module substrate 110 by soldering etc., forms the power module substrate that carries radiator.And, carry semiconductor chip 3 by layer 2 on the surface of circuit layer 112, thereby produce the power model 101 of present embodiment.
In the power module substrate 110 and power model 101 that become as the present embodiment of above structure, because the one side at circuit layer 112 is formed with cementation zone 112A, so the deformation drag that a sidepiece of circuit layer 112 divides becomes big, the fluctuating in the time of can suppressing the thermal cycle load or the generation of fold.And, because circuit layer 112 has the body layer 112B that identation hardness is lower than described cementation zone 112A, so the thermal stress can absorb the thermal cycle load by the distortion of this body layer 112B the time.Therefore, can improve the joint reliability of ceramic substrate 111 and circuit layer 112.
And, in the present embodiment, have at composition surface set Cu, the Ge of metallic plate 122,123 as the 2nd the 2nd set operation S12 that adds element, so Cu and Ge get involved in the joint interface 130 of metallic plate 122,123 and ceramic substrate 111 owing to possess.
And ceramic substrate 111 is by Al 2O 3Constitute, get involved in the joint interface 130 of metallic plate 122,123 and ceramic substrate 111 and Hf is arranged as active element, more specifically, owing to be formed with the oxide skin(coating) 132 that constitutes by the oxygen compound that contains Hf and oxygen, can seek the raising of the bond strength of ceramic substrate 111 and metallic plate 122,123 by this oxide skin(coating) 132 at joint interface 130.In addition, because reacting, the oxygen of this oxide skin(coating) 132 by active element Hf and ceramic substrate 111 generates, so high with the bond strength of ceramic substrate 111.
And, in the present embodiment, in the heating process S14 that forms the motlten metal zone at the interface of ceramic substrate 111 and metallic plate 122,123, owing to make the interpolation Elements Diffusion of fixation layer 122A, so need not to carry out special heat treatment step, just can control the manufacturing cost step-down that makes this power module substrate 110.
Then, utilize Figure 12 and Figure 13 that the power module substrate of the 3rd execution mode of the present invention is described.
The power module substrate 210 of present embodiment possesses and has: ceramic substrate 211; Circuit layer 212 is equipped on the one side (in Figure 12 for top) of this ceramic substrate 211; Metal level 213 is equipped on the another side (in Figure 12 for bottom) of ceramic substrate 211.
Ceramic substrate 211 is for preventing the substrate that is electrically connected between circuit layer 212 and the metal level 213.In the present embodiment, ceramic substrate 211 is by the high Si of insulating properties 3N 4(silicon nitride) constitutes.And the thickness setting of ceramic substrate 211 is set at 0.32mm in the present embodiment in the scope of 0.2～1.5mm.
Circuit layer 212 engages the metallic plate with conductivity by the one side at ceramic substrate 211 and forms.In the present embodiment, circuit layer 212 is by being that metallic plate that the calendering plate of the aluminium (4N aluminium) more than 99.99% constitutes is engaged in ceramic substrate 211 and forms by purity.
Metal level 213 forms by the another side bonding metal plates at ceramic substrate 211.In the present embodiment, metal level 213 and circuit layer 212 are equally by being that the metallic plate of the calendering plate formation of the aluminium (4N aluminium) 99.99% or more is engaged in ceramic substrate 211 and forms by purity.
And as shown in figure 12, circuit layer 212 possesses and has: cementation zone 212A is equipped on its one side (being top in Figure 12) side; And body layer 212B, be positioned at the another side side of this cementation zone 212A.
Cementation zone 212A is exposed to the one side of circuit layer 212, and from this one side towards another side side (be downside among Figure 12) extension, be the zone that the identation hardness Hs with respect to the one side of circuit layer 212 has the identation hardness more than 80%.At this, in the present embodiment, the identation hardness Hs of the one side of circuit layer 212 is set in 50mgf/ μ m 2Above 200mgf/ μ m 2In the following scope.
Body layer 212B becomes 80% the zone of its identation hardness Hb less than described identation hardness Hs.
In addition, in the present embodiment, be formed with the near interface layer 212C that its identation hardness Hc is higher than the identation hardness Hb of body layer 212B in the circuit layer 212 with near the joint interface of ceramic substrate 211.
At this, in the present embodiment, the thickness t s of cementation zone 212A is below the above 300 μ m of 1 μ m, and the thickness t b of body layer 212B is below the above 1500 μ m of 100 μ m, and the thickness t c of near interface layer 212C is below the above 300 μ m of 50 μ m.
And cementation zone 212A contains the interpolation element more than a kind or 2 kinds that is selected among B, Ti, V, Cr, Mn, Fe, Co and the Mo, the adding up to below the above 10atom% of 0.2atom% of the content of this interpolation element.In addition, in the present embodiment, contain the following Fe of the above 10atom% of 0.2atom% as adding element.
In circuit layer 212, constitute as follows: the content of interpolation element of its one side is the highest, along with towards the another side side, and the content step-down.This is because hardened by the part of this interpolation element circuit layer 212, and has formed above-mentioned cementation zone 212A.
On the other hand, in body layer 212B, because the content of above-mentioned interpolation element is few, so the purity height of Al, deformation drag is still little.
In addition, be arranged in the near interface layer 212C of ceramic substrate 211 sides, by the Elements Diffusion of being utilized in the engaging of ceramic substrate 211 and metallic plate, thereby the purity of Al becomes and is lower than body layer 212B.
If be described in detail, solid solution has the 2nd more than a kind or 2 kinds that is selected among Si, Cu, Zn, Ge, Ag, Mg, Ca and the Li to add element near interface layer 212C.At this, the described the 2nd total of adding concentration of element of this near interface layer 212C is set in the following scope of the above 5 quality % of 0.05 quality %.
In the present embodiment, use Si and Cu to add element as the 2nd, the Si concentration of near interface layer 212C is set in the following scope of the above 0.5 quality % of 0.05 quality %, and Cu concentration is set in the following scope of the above 1 quality % of 0.05 quality %.
In addition, described the 2nd interpolation concentration of element of near interface layer 212C is to analyze (spot diameter 30 μ m) carry out 5 mensuration in the scope of joint interface to 50 μ m mean value with EPMA.During this EPMA analyzes, whole spot diameter is entered in the scope from joint interface to 50 μ m implement to analyze.
In addition, in the present embodiment, the metallic plate that becomes metal level 213 is carried out with metallic plate that becomes circuit layer 212 and ceramic substrate 211 in the same manner with engaging also of ceramic substrate 211, near the joint interface of metal level 213 also solid solution have the 2nd to add element.
Below, describe with reference to the flow chart of Figure 13 manufacture method the power module substrate 210 of described structure.
(the 1st set operation S21)
At first, be selected from the interpolation element more than a kind or 2 kinds among B, Ti, V, Cr, Mn, Fe, Co and the Mo, form the fixation layer that contains this interpolation element by the one side set that sputters at the metallic plate that becomes circuit layer 212.
In the present embodiment, set Fe is set in 0.05mg/cm as adding element with its fixed amount 2Above 1.6mg/cm 2Below.
(the 2nd set operation S22)
Then, add the 2nd more than a kind or 2 kinds that element promptly is selected among Si, Cu, Zn, Ge, Ag, Mg, Ca and the Li by each the composition surface set the 2nd that sputters at the metallic plate that becomes circuit layer 212 and become the metallic plate of metal level 213 and add element, and form the 2nd fixation layer.
In the present embodiment, use Cu and Si to add element as the 2nd, the Cu amount in the 2nd fixation layer is set in 0.08mg/cm 2Above 2.7mg/cm 2Below, the Si amount is set in 0.002mg/cm 2Above 1.2mg/cm 2Below.
(lamination operation S23)
Then, multilayer ceramic substrate 211 and metallic plate.At this moment, with the face that is formed with the 2nd fixation layer in the metallic plate mode lamination towards ceramic substrate 211.That is, this is because the 2nd fixation layer is got involved between metallic plate and ceramic substrate 211.Form layered product like this.
(heating process S24)
Then, the layered product that will form in lamination operation S23 is so that (pressure is 1～5kgf/cm to its laminating direction pressurization 2) state pack into and heat in the heating furnace, form the motlten metal zone at the interface respectively at metallic plate and ceramic substrate 211.This motlten metal zone be by the Cu of the 2nd fixation layer and Si to the diffusion of metallic plate side, thereby near the Cu concentration the 2nd fixation layer of metallic plate, Si concentration rises and the fusing point step-down forms.
And, by this heating process S24, become the another side side diffusion of interpolation element contained in the fixation layer of metallic plate of circuit layer 212 (being Fe in the present embodiment) towards metallic plate.
In addition, in the present embodiment, the atmosphere in the heating furnace is made as N 2Gas atmosphere, heating-up temperature are set in more than 550 ℃ in the scope below 650 ℃.
(solidifying operation S25)
Then, under the state that forms in motlten metal zone temperature is remained constant.Like this, Cu, the Si in the motlten metal zone further spreads to the metallic plate side.Thus, once for the partial C u concentration in motlten metal zone, Si concentration reduce gradually, fusing point rises, and solidifies in that temperature is remained under the constant state.That is, this is because ceramic substrate 211 and metallic plate engage by so-called isothermal diffusion bond (Transient Liquid Phase Diffusion Bonding).So, be cooled to normal temperature after solidifying.
So, the metallic plate that becomes circuit layer 212 and metal level 213 engages with ceramic substrate 211, produces the power module substrate 210 of present embodiment.
And, in circuit layer 212, form cementation zone 212A and body layer 212B by interpolation Elements Diffusion contained in the fixation layer.And, by Cu contained in the 2nd fixation layer and Si spread form engage near layer 212C.
In the power module substrate 210 that becomes as the present embodiment of above structure, because the one side of circuit layer 212 is formed with cementation zone 212A, so the fluctuating can suppress the thermal cycle load time or the generation of fold.And circuit layer 212 has the body layer 212B that hardness is lower than cementation zone 212A, so the thermal stress when can the distortion by this body layer 212B absorbing the thermal cycle load.
And, in the present embodiment, in the heating process that forms the motlten metal zone at the interface of ceramic substrate 211 and metallic plate among the S24, owing to make the interpolation Elements Diffusion of the fixation layer that is formed at the metallic plate that becomes circuit layer 212, just cementation zone 212A can be formed so need not to carry out special heat treatment step, and the manufacturing cost step-down that makes this power module substrate 210 can be controlled.
Then, with Figure 14 and Figure 15 the power module substrate of the 4th execution mode of the present invention is described.
The power module substrate 310 of present embodiment possesses and has: ceramic substrate 311; Circuit layer 312 is equipped on the one side (in Figure 14 for top) of this ceramic substrate 311; Metal level 313 is equipped on the another side (in Figure 14 for bottom) of ceramic substrate 311.
Ceramic substrate 311 is for preventing the substrate that is electrically connected between circuit layer 312 and the metal level 313.In the present embodiment, ceramic substrate 311 is made of the high AlN of insulating properties (aluminium nitride).And the thickness setting of ceramic substrate 311 is set at 0.635mm in the present embodiment in the scope of 0.2～1.5mm.
Circuit layer 312 engages the metallic plate with conductivity by the one side at ceramic substrate 311 and forms.In the present embodiment, circuit layer 312 is by being that metallic plate that the calendering plate of the aluminium (4N aluminium) more than 99.99% constitutes is engaged in ceramic substrate 311 and forms by purity.
Metal level 313 forms by the another side bonding metal plates at ceramic substrate 311.In the present embodiment, metal level 313 and circuit layer 312 are equally by being that the metallic plate of the calendering plate formation of the aluminium (4N aluminium) 99.99% or more is engaged in ceramic substrate 311 and forms by purity.
And as shown in figure 14, circuit layer 312 possesses and has: cementation zone 312A is equipped on its one side (being top in Figure 14) side; And body layer 312B, be positioned at the another side side of this cementation zone 312A.
Cementation zone 312A is exposed to the one side of circuit layer 312, and from this one side towards another side side (be downside among Figure 14) extension, be the zone that the identation hardness Hs with respect to the one side of circuit layer 312 has the identation hardness more than 80%.At this, in the present embodiment, the identation hardness Hs of the one side of circuit layer 312 is set in 50mgf/ μ m 2Above 200mgf/ μ m 2In the following scope.
Body layer 312B becomes 80% the zone of its identation hardness Hb less than described identation hardness Hs.
In addition, in the present embodiment, be formed with the near interface layer 312C that its identation hardness Hc is higher than the identation hardness Hb of body layer 312B in the circuit layer 312 with near the joint interface of ceramic substrate 311.
At this, in the present embodiment, the thickness t s of cementation zone 312A is below the above 300 μ m of 1 μ m, and the thickness t b of body layer 312B is below the above 1500 μ m of 100 μ m, and the thickness t c of near interface layer 312C is below the above 300 μ m of 50 μ m.
And cementation zone 312A contains the interpolation element more than a kind or 2 kinds that is selected among B, Ti, V, Cr, Mn, Fe, Co and the Mo, the adding up to below the above 10atom% of 0.2atom% of the content of this interpolation element.In addition, in the present embodiment, contain the following Fe of the above 10atom% of 0.2atom% as adding element.
In circuit layer 312, constitute as follows: the content of interpolation element of its one side is the highest, along with towards the another side side, and the content step-down.This is because hardened by the part of this interpolation element circuit layer 312, and has formed above-mentioned cementation zone 312A.
On the other hand, in body layer 312B, because the content of above-mentioned interpolation element is few, so the purity height of Al, deformation drag is still little.
In addition, be arranged in the near interface layer 312C of ceramic substrate 311 sides, by the Elements Diffusion of being utilized in the engaging of ceramic substrate 311 and metallic plate, thereby the purity of Al becomes and is lower than body layer 312B.
If be described in detail, solid solution has Si contained in the Al-Si brazing filler metal near interface layer 312C.
Below, describe with reference to the flow chart of Figure 15 manufacture method the power module substrate 310 of described structure.
(lamination operation S31)
At first, is that the solder paper tinsel of 15～30 μ m (being 20 μ m in the present embodiment) carries out lamination to the metallic plate that becomes circuit layer 312 in the one side side of ceramic substrate 311 by thickness, and is that the solder paper tinsel of 15～30 μ m (being 20 μ m in the present embodiment) carries out lamination to the metallic plate that becomes metal level 313 and forms layered product in the another side side of ceramic substrate 311 by thickness.In addition, in the present embodiment, the solder paper tinsel is made as and contains the Al-Si brazing filler metal that fusing point reduces elements Si.
(engaging heating process S32)
Then, the layered product that will form in lamination operation S31 is so that (pressure is 1～5kgf/cm to its laminating direction pressurization 2) state pack into and heat in the heating furnace, and form the motlten metal zone at the interface respectively at metallic plate and ceramic substrate 311.
In addition, in the present embodiment, the atmosphere in the heating furnace is made as N 2Gas atmosphere, heating-up temperature are set in more than 550 ℃ in the scope below 650 ℃.
(solidifying operation S33)
Then, make the motlten metal zone freezing, engage ceramic substrate 311 and metallic plate by layered product is cooled off.So, the metallic plate that becomes circuit layer 312 and metal level 313 engages with ceramic substrate 311.At this moment, by Si diffusion contained in the solder paper tinsel, form on the circuit layer 312 and engage near layer 312C.
(set operation S34)
Then, be selected from the interpolation element more than a kind or 2 kinds among B, Ti, V, Cr, Mn, Fe, Co and the Mo by the sputter set, form the fixation layer that contains this interpolation element in the one side of circuit layer 312.
In the present embodiment, set Fe is set in 0.05mg/cm as adding element with its fixed amount 2Above 1.6mg/cm 2Below.
(heating process S35)
And the circuit layer 312 that will be formed with fixation layer by heating furnace together heats with engaged ceramic substrate 311 and metal level 313.The heating-up temperature of this moment becomes the temperature that is lower than above-mentioned joint heating process S32.
By this heating process S35, contained interpolation element (being Fe in the present embodiment) is towards the another side side diffusion of metallic plate in the fixation layer of metallic plate.Thus, in circuit layer 312 by fixation layer in contained interpolation Elements Diffusion form cementation zone 312A and body layer 312B, produce the power module substrate 310 of present embodiment.
In the power module substrate 310 that becomes as the present embodiment of above structure, owing to be formed with cementation zone 312A, so the fluctuating can suppress the thermal cycle load time or the generation of fold in the one side of circuit layer 312.And circuit layer 312 has the body layer 312B that hardness is lower than cementation zone 312A, so the thermal stress when can the distortion by this body layer 312B absorbing the thermal cycle load.
Then, with Figure 16 and Figure 17 the power module substrate of the 5th execution mode of the present invention is described.
The power module substrate 410 of present embodiment possesses and has: ceramic substrate 411; Circuit layer 412 is equipped on the one side (in Figure 16 for top) of this ceramic substrate 411; Reach metal level 413, be equipped on the another side (in Figure 16, being the bottom) of ceramic substrate 411.
Ceramic substrate 411 is made of the high AlN of insulating properties (aluminium nitride), and its thickness setting is set at 0.635mm in the present embodiment in the scope of 0.2～1.5mm.
Circuit layer 412 engages the metallic plate with conductivity by the one side at ceramic substrate 411 and forms.In the present embodiment, circuit layer 412 is by being that metallic plate that the calendering plate of the aluminium (4N aluminium) more than 99.99% constitutes is engaged in ceramic substrate 411 and forms by purity.
Metal level 413 forms by the another side bonding metal plates at ceramic substrate 411.In the present embodiment, metal level 413 and circuit layer 412 are equally by being that the metallic plate of the calendering plate formation of the aluminium (4N aluminium) 99.99% or more is engaged in ceramic substrate 411 and forms by purity.
And as shown in figure 16, circuit layer 412 possesses and has: cementation zone 412A is equipped on its one side (being top in Figure 16) side; And body layer 412B, be positioned at the another side side of this cementation zone 412A.
Cementation zone 412A is exposed to the one side of circuit layer 412, and from this one side towards another side side (be downside among Figure 16) extension, be the zone that the identation hardness Hs with respect to the one side of circuit layer 412 has the identation hardness more than 80%.At this, in the present embodiment, the identation hardness Hs of the one side of circuit layer 412 is set in 50mgf/ μ m 2Above 200mgf/ μ m 2In the following scope.
Body layer 412B becomes 80% the zone of its identation hardness Hb less than described identation hardness Hs.
In addition, in the present embodiment, be formed with the near interface layer 412C that its identation hardness Hc is higher than the identation hardness Hb of body layer 412B in the circuit layer 412 with near the joint interface of ceramic substrate 411.
At this, in the present embodiment, the thickness t s of cementation zone 412A is below the above 300 μ m of 1 μ m, and the thickness t b of body layer 412B is below the above 1500 μ m of 100 μ m, and the thickness t c of near interface layer 412C is below the above 300 μ m of 50 μ m.
And cementation zone 412A contains the interpolation element more than a kind or 2 kinds that is selected among B, Ti, V, Cr, Mn, Fe, Co and the Mo, the adding up to below the above 10atom% of 0.2atom% of the content of this interpolation element.In addition, in the present embodiment, contain the following Fe of the above 10atom% of 0.2atom% as adding element.
In circuit layer 412, constitute as follows: the content of interpolation element of its one side is the highest, along with towards the another side side, and the content step-down.This is because hardened by the part of this interpolation element circuit layer 412, and has formed above-mentioned cementation zone 412A.
On the other hand, in body layer 412B, because the content of above-mentioned interpolation element is few, so the purity height of Al, deformation drag is still little.
In addition, be arranged in the near interface layer 412C of ceramic substrate 411 sides, by the Elements Diffusion of being utilized in the engaging of ceramic substrate 411 and metallic plate, thereby the purity of Al becomes and is lower than body layer 412B.In the present embodiment, solid solution has the contained Si of solder of Al-Si system among the near interface layer 412C.
Below, describe with reference to the flow chart of Figure 17 manufacture method the power module substrate 410 of described structure.
(set operation S41)
At first, be selected from the interpolation element more than a kind or 2 kinds among B, Ti, V, Cr, Mn, Fe, Co and the Mo by the sputter set, form the fixation layer that contains this interpolation element in the one side of the metallic plate that becomes fixation layer.
In the present embodiment, set Fe is set in 0.05mg/cm as adding element with its fixed amount 2Above 1.6mg/cm 2Below.
(heating process S42)
Then, by heating furnace the metallic plate that is formed at fixation layer is heated.The heating-up temperature of this moment is set at 550 ℃～650 ℃.
By heating process S42, interpolation element (being Fe in the present embodiment) contained in the fixation layer of metallic plate spreads towards the another side side of metallic plate.Thus, in becoming the metallic plate of circuit layer, form cementation zone 412A, body layer 412B.
(lamination operation S43)
Then, in the one side side of ceramic substrate 411 is that the solder paper tinsel of 15～30 μ m (being 20 μ m in the present embodiment) carries out lamination to making the metallic plate that adds Elements Diffusion by thickness, and is that the solder paper tinsel of 15～30 μ m (being 20 μ m in the present embodiment) carries out lamination to the metallic plate that becomes metal level 413 and forms layered product in the another side side of ceramic substrate 411 by thickness.In addition, in the present embodiment, the solder paper tinsel is made as and contains the Al-Si brazing filler metal that fusing point reduces elements Si.
(engaging heating process S44)
Then, the layered product that will form in lamination operation S43 is so that (pressure is 1～5kgf/cm to its laminating direction pressurization 2) state pack into and heat in the heating furnace, and form the motlten metal zone at the interface respectively at metallic plate and ceramic substrate 411.
In addition, in the present embodiment, the atmosphere in the heating furnace is made as N 2Gas atmosphere, heating-up temperature are set in more than 550 ℃ in the scope below 650 ℃.That is, be made as the temperature that is lower than described heating process S42.
(solidifying operation S45)
Then, make the motlten metal zone freezing, engage ceramic substrate 411 and metallic plate by layered product is cooled off.So, the metallic plate that becomes circuit layer 412 and metal level 413 engages with ceramic substrate 411.At this moment, by Si diffusion contained in the solder paper tinsel, thus near layer 412C formation engages in circuit layer 412.
So, produce the power module substrate 410 of present embodiment.
In the power module substrate 410 that becomes as the present embodiment of above structure, because the one side of circuit layer 412 is formed with cementation zone 412A, so the fluctuating can suppress the thermal cycle load time or the generation of fold.And circuit layer 412 has the body layer 412B that hardness is lower than cementation zone 412A, so the thermal stress when can the distortion by this body layer 412B absorbing the thermal cycle load.
And, in the present embodiment, form fixation layer and heat at the metallic plate that becomes circuit layer 412, after forming cementation zone 412A and body layer 412B, metallic plate is engaged, so can under the temperature conditions of the junction temperature that is higher than metallic plate and ceramic substrate 411, make the interpolation Elements Diffusion with ceramic substrate 411.Therefore can use slow element (for example Ti, V, the Mo) conduct of diffusion velocity in the aluminium to add element.
More than, embodiments of the present invention are illustrated, but the present invention is not limited to this, in the scope of the technological thought that does not break away from its invention, can suitably change.
For example, be illustrated with the situation that is selected from the interpolation element more than a kind or 2 kinds among B, Ti, V, Cr, Mn, Fe, Co and the Mo by the sputter set, but be not limited to this, also can be dispersed with the paste of the powder that contains described interpolation element or be coated with ink and set interpolation element by plating, evaporation, CVD, cold spraying or coating.
And, also can with Al together set add element, the 2nd and add element, active element.At this moment, even the also set positively of element of oxidation easily such as Ca and Li.In addition, in order to make Al and the together set of described interpolation element, described interpolation element of evaporation and Al also can utilize the alloy of described interpolation element and Al to carry out sputter as target simultaneously.
And, be illustrated with the situation that constitutes radiator by aluminium, but also can constitute by aluminium alloy or the composite material that contains aluminium etc.In addition, stream with coolant situation as radiator is illustrated, but is not defined in the structure of radiator especially, can use the radiator of various structures.
And, in the 2nd, the 3rd execution mode, to utilizing N 2The heating furnace of atmosphere carries out ceramic substrate and is illustrated with engaging of metallic plate, but is not limited to this, also can utilize vacuum furnace to carry out engaging of ceramic substrate and metallic plate.The vacuum degree of this moment preferably is made as 10 -6～10 -3In the scope of Pa.
In addition, in the 2nd execution mode, use Al 2O 3As ceramic substrate, the joint interface place at ceramic substrate and metallic plate is formed the oxide skin(coating) that contains active element be illustrated, but be not limited to this, also can use AlN or Si 3N 4As ceramic substrate, form the nitride layer contain active element at the interface what ceramic substrate engaged with metallic plate.
[embodiment]
To for confirming that the comparative test that validity of the present invention is carried out describes.
At first, the interpolation element shown in the one side set table 1 of the metallic plate that constitutes at the 4N aluminium that by thickness is 0.6mm is by adding thermosetting cementation zone and body layer.The fixed amount, the heating condition that add element are shown in table 1.
[table 1]
Figure BSA00000439983400301
About cementation zone and the body layer that is formed at metallic plate, identation hardness Hs, the thickness of cementation zone, the identation hardness Hb of body layer and the thickness of body layer of the one side of cementation zone are estimated.In addition, about the identation hardness Hb of body layer, the thickness direction central portion of the metallic plate of the face central authorities of metallic plate is measured.
And, the metallic plate that is made of 4N aluminium that does not form cementation zone is made as comparative example 1A.In addition, will be made as comparative example 2A by the metallic plate that the aluminium alloy that contains 1 quality %Si constitutes.About these comparative examples 1A, 2A, also in the position of the one side that is equivalent to above-mentioned cementation zone and the position that is equivalent to body layer measure identation hardness respectively.Show the result in table 2.
[table 2]
Figure BSA00000439983400311
About test portion 1-8, all form cementation zone, and form hardness and be lower than the body layer of cementation zone on the surface of metallic plate, carry out so that be laminated to its cementation zone.
Then, it is that the metallic plate of 0.6mm is as circuit layer that the ceramic substrate that constitutes at the AlN that by thickness is 0.635mm utilizes the solder of Al-Si system to engage by thickness, and engage by thickness be the metallic plate that constitutes of the 4N aluminium of 0.6mm as metal level, produce power module substrate.
At this, the situation that the metallic plate that utilizes the test portion 5,6 of table 1 and table 2 is formed circuit layer is made as example 1,2 of the present invention.
And the situation that the metallic plate that utilizes the comparative example 1A of table 2 is formed circuit layer is made as comparative example 1B.In addition, the situation that the metallic plate that utilizes the comparative example 2A of table 2 is formed circuit layer is made as comparative example 2B.
And, utilize these test films to implement thermal cycling test.Particularly, repeatedly 2000 cold cycling (45 ℃～125 ℃) afterwards, viewing test sheet, and undulating state, the ceramic substrate on circuit layer surface estimated with the rate that engages between the circuit layer.Show the result in table 3.
In addition, about rising and falling, to have radius is the spherical front end of 2 μ m, cone angle is that 90 ° circular cone uses as contact pilotage, distance in 2.5 (mm/ datum length) * 5 intervals, measure interval average roughness curve with load-carrying 4mN, speed 1mm/s scanning of a surface, calculate its 10 mean roughness Rz (JIS B0601-1994).
And use following formula: joint rate=(initial engagement area-peel off area)/initial engagement area calculates the joint rate.At this, " initial engagement area " is meant the area that the need before engaging engage.
[table 3]
Rise and fall The joint rate
Example 1 of the present invention 1.5μm 95.6％
Example 2 of the present invention 1.6μm 96.1％
Comparative example 1B 31.6μm 95.1％
Comparative example 2B 3.5μm 74.3％
In comparative example 1B, though joint rate height has been confirmed fluctuating on the surface of circuit layer.On the other hand, in comparative example 2B, though suppressed the fluctuating on circuit layer surface, the joint rate is low, joint reliability is poor.
In contrast, in the example of the present invention 1,2 that forms cementation zone, suppressed the fluctuating on circuit layer surface, and the joint rate is also high.

Claims (12)

1. power module substrate is equipped with the aluminum circuit layer in the one side of ceramic substrate, and sets electronic component on the one side of this circuit layer, it is characterized in that,
The cementation zone that described circuit layer has body layer and is configured to expose in described one side side,
The identation hardness Hs of the described one side of described circuit layer is set in 50mgf/ μ m 2Above 200mgf/ μ m 2In the following scope,
In the described circuit layer, the zone with identation hardness more than 80% of described identation hardness Hs becomes described cementation zone,
Described cementation zone contains the interpolation element more than a kind or 2 kinds that is selected among B, Ti, V, Cr, Mn, Fe, Co and the Mo,
The identation hardness Hb of described body layer is less than 80% of described identation hardness Hs.
2. power module substrate as claimed in claim 1 is characterized in that,
The thickness of described cementation zone is below the above 300 μ m of 1 μ m, and the thickness of described body layer is below the above 1500 μ m of 100 μ m.
3. power module substrate as claimed in claim 1 or 2 is characterized in that,
Adding up to below the above 10atom% of 0.2atom% of the content of the described interpolation element in the described cementation zone.
4. power module substrate as claimed in claim 1 or 2 is characterized in that,
Described ceramic substrate is by AlN, Si 3N 4Or Al 2O 3Constitute.
5. the manufacture method of a power module substrate is made each the described power module substrate in the claim 1 to 4, it is characterized in that possessing has:
The set operation with being selected from the described one side that the interpolation element more than a kind or 2 kinds among B, Ti, V, Cr, Mn, Fe, Co and the Mo is bonded to the metallic plate that becomes described circuit layer, forms the fixation layer that contains this interpolation element; And
Heating process heats described circuit layer, by making the diffusion inside of described interpolation element towards described circuit layer, thereby forms cementation zone in the described one side of described circuit layer.
6. the manufacture method of a power module substrate is made each the described power module substrate in the claim 1 to 4, it is characterized in that having:
The set operation with being selected from the one side that the interpolation element more than a kind or 2 kinds among B, Ti, V, Cr, Mn, Fe, Co and the Mo anchors at the metallic plate that becomes described circuit layer, forms the fixation layer that contains this interpolation element;
The lamination operation is passed through the described ceramic substrate of solder lamination in the another side side of described metallic plate;
Heating process will be heated when laminating direction pressurizes by the described ceramic substrate of lamination and described metallic plate, form the motlten metal zone at the interface of described ceramic substrate and described metallic plate; And
Solidify operation, engage described ceramic substrate and described metallic plate by making this motlten metal zone freezing,
In described heating process, the described interpolation element by making described fixation layer is towards the diffusion inside of described circuit layer, thereby forms cementation zone in the described one side of described circuit layer.
7. the manufacture method of a power module substrate is made each the described power module substrate in the claim 1 to 4, it is characterized in that having:
The set operation with being selected from the one side that the interpolation element more than a kind or 2 kinds among B, Ti, V, Cr, Mn, Fe, Co and the Mo is bonded to the metallic plate that becomes described circuit layer, forms the fixation layer that contains this interpolation element;
The 2nd set operation is added element and is bonded at least one side in the one side of the another side of described metallic plate and described ceramic substrate being selected from the 2nd more than a kind or 2 kinds among Si, Cu, Zn, Ge, Ag, Mg, Ca and the Li, forms the 2nd fixation layer;
The lamination operation is come described ceramic substrate of lamination and described metallic plate by described the 2nd fixation layer;
Heating process will be heated when laminating direction pressurizes by the described ceramic substrate of lamination and described metallic plate, form the motlten metal zone at the interface of described ceramic substrate and described metallic plate; And
Solidify operation, engage described ceramic substrate and described metallic plate by making this motlten metal zone freezing,
In described heating process, the described interpolation element by making described fixation layer is towards the diffusion inside of described circuit layer, thereby forms cementation zone in the described one side of described circuit layer.
8. the manufacture method of a power module substrate is made each the described power module substrate in the claim 1 to 4, it is characterized in that having:
The set operation with being selected from the one side that the interpolation element more than a kind or 2 kinds among B, Ti, V, Cr, Mn, Fe, Co and the Mo is bonded to the metallic plate that becomes described circuit layer, forms the fixation layer that contains this interpolation element;
The 2nd set operation, add element and be selected from least one side in the one side that the active element more than a kind or 2 kinds among Ti, Zr, Hf, Ta, Nb and the Mo is bonded to the another side of described metallic plate and described ceramic substrate being selected from the 2nd more than a kind or 2 kinds among Si, Cu, Ag and the Ge, form and contain these the 2nd the 2nd fixation layers that adds elements and active element;
The lamination operation is come described ceramic substrate of lamination and described metallic plate by described the 2nd fixation layer;
Heating process will be heated when laminating direction pressurizes by the described ceramic substrate of lamination and described metallic plate, form the motlten metal zone at the interface of described ceramic substrate and described metallic plate; And
Solidify operation, engage described ceramic substrate and described metallic plate by making this motlten metal zone freezing,
By making described interpolation Elements Diffusion, thereby form the metal hardened layer on described metallic plate top layer at described metallic plate.
9. as the manufacture method of each the described power module substrate in the claim 5 to 8, it is characterized in that,
In described set engineering, with described interpolation element set Al together.
10. as the manufacture method of each the described power module substrate in the claim 5 to 8, it is characterized in that,
Described set operation is come the described interpolation element of set by paste or the ink that plating, evaporation, CVD, sputter, cold spraying or coating are dispersed with the powder that contains described interpolation element, forms described fixation layer.
11. a power module substrate that carries radiator is characterized in that possessing:
The described power module substrate of in the claim 1 to 4 each; And
The radiator that this power module substrate is cooled off.
12. a power model is characterized in that possessing:
The described power module substrate of in the claim 1 to 4 each; And
Be equipped on the electronic component on this power module substrate.
CN2011100459470A 2010-03-03 2011-02-23 Substrate for power module, preparing method thereof, substrate with radiator and power module thereof Pending CN102194767A (en)

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