CN102186284A - Startup logic and circuits of light-emitting diode (LED) driver - Google Patents

Abstract

The invention provides a novel startup logic and circuits of a light-emitting diode (LED) driver applicable for the input of a mains supply, aims to smoothly complete power-on and startup processes of the driver under the condition of global universal mains supply input voltage (85 V AC to 265 V AC). The startup logic and the circuits comprise an LED driven sequential startup logic and circuits for implementing the logic; the circuits comprise a power supply power-on circuit, a chip pre-charging circuit, a band-gap reference circuit, a voltage regulator circuit, and a bootstrap undervoltage lock circuit, wherein the power supply circuit is used for rectifying and filtering and supplying startup current to the driver; the chip pre-charging circuit is used for generating a waiting-for voltage source in the chip at the first time so as to supply power to a module required by other startup; the band-gap reference circuit is used for providing reference voltage and current with a low-temperature coefficient in the chip; the voltage regulator circuit adopts a structure of a low dropout regulator, and generates 5V internal electric source voltage for power supply in the chip; and the bootstrap undervoltage lock circuit has a relatively large hysteresis voltage range (9.7V to 21.6V), and allows the driver to automatically start up when the input voltage of the driver exceeds threshold voltage 21.6V and to return to a startup mode when the input voltage of the driver is reduced to below 9.7V. Thus, the voltage transformation, power-on startup, and chip working process of the LED driver are accomplished.

Description

Led driver enable logic and circuit

Technical field

Patent of the present invention relates to the enable logic and the circuit of the led driver of civil power input and realizes.Belong to electric and electronic technical field and integrated circuit (IC) design field.

Background technology

White light LEDs has numerous advantages and application prospects as novel semiconductor illuminating light source.In the general illumination field, lighting sources such as the direct replace incandescent of white light LEDs, fluorescent lamp have become trend of the times.Although the technology of consumer electronics usefulness led driver and market is comparative maturity, and domestic lighting also has technical bottleneck to wait to break through with led driver, has become the competition field of numerous worlds well-known power supply Chevron Research Company (CRC) at present.

The start-up course of power supply and circuit thereof are realized the technology focus of the led driver of civil power input especially, are playing the part of very important, irreplaceable effect in all kinds of led drivers.If enable logic is relatively chaotic, the light then very big starting current of power up chips consumption, the one, cause the startup power consumption of chip higher, the operating efficiency of reduction chip; The 2nd, electric current may cause the start-up course chips hotter more greatly, brings heat dissipation problem.Heavy then cause driver normally not start, if starting current consumption is bigger, can cause the change in voltage scope of feeder ear outer meeting resistance bigger, if the voltage at electric capacity two ends is lower than the lower limit that under-voltage locking is set before the tertiary winding can normally be given chip power supply, chip will start repeatedly, and causing can't operate as normal.

Therefore, this patent is realized analyzing design to the enable logic and the concrete circuit of relevant led driver, makes every effort to provide a kind of clear, perfect in shape and function of powering on, high-efficiency reliable method.

Summary of the invention

The purpose of the utility model patent provides a kind of sequential enable logic of led driver and circuit thereof of being applicable to and realizes, to guarantee that chip for driving can normally realize starting.

The requirement of chip enable is one: starting current is little, is generally less than 100uA; Two: inner circuit module is operate as normal, comprises the power supply electrifying circuit, pre-charge circuit in the sheet, band-gap reference circuit, voltage regulator and bootstrapping undervoltage lockout circuit; Three: the input voltage of driver will satisfy certain requirement, will be higher than startup threshold voltage (being set to 21.6V) and start working in the utility model patent, if be lower than threshold voltage (being set to 9.7V), then restarts.

Optionally, described pre-charge circuit produces bias current by negative feedback structure; The PMOS of diode type of attachment realizes the current potential lifting; High voltage PMOS and nmos device are finished current mirror and power supply output.

Optionally, described band-gap reference circuit is produced by the positive temperature characteristic compensation principle of the negative temperature characteristic of BJT and BE junction voltage difference, adopts error amplifier clamped, realizes that the band gap voltage of low-temperature coefficient produces.

Optionally, described voltage regulator adopts the structure of LDO, and has the buffer stage isolation between error amplifier and adjustment pipe, to provide better frequency corresponding, improves the stability of output voltage.Realize by high voltage PMOS and NMOS.

Optionally, described bootstrapping undervoltage lockout circuit is used for chip input voltage is judged, adopts the structure of comparator and rest-set flip-flop, finishes different logics.

Description of drawings

Form 1 is the operation principle explanation (VIN uphill process) of bootstrapping under-voltage locking;

Form 2 is the operation principle explanation (VIN decline process) of bootstrapping under-voltage locking;

Fig. 1 is the circuit diagram that powers on of system's power supply;

Fig. 2 is the sequential enable logic schematic diagram of led driver;

Fig. 3 is the structural representation of pre-charge circuit and band-gap reference circuit;

Fig. 4 is the electrical block diagram of voltage regulator;

Fig. 5 is the electrical block diagram of bootstrapping under-voltage locking.

Embodiment

Below in conjunction with accompanying drawing the utility model patent is described further.

The circuit diagram that powers on of Fig. 1 system power supply is connected to the upper end of an external capacitor Cvin, the lower end ground connection of external capacitor through the line voltage of over commutation by charging resistor Rstartup.The voltage at electric capacity two ends is the VIN among the figure one, and we are called the input voltage of driver with it.

Fig. 2 is the sequential enable logic schematic diagram of led driver, the input voltage VIN scope of driver is bigger, if directly power to band-gap reference circuit with chip power voltage, the output of then very difficult assurance band-gap reference circuit keeps the irrelevance to voltage and temperature in so big supply voltage scope.Therefore in this enable logic, added pre-charge circuit.Along with the carrying out of charging raises gradually, chip power voltage is as the supply voltage of pre-charge circuit, pre-charge circuit can operate as normal during greater than 5V when chip power voltage, voltage about 5V of this circuit output, be used for powering to band-gap reference circuit, because the voltage of band-gap reference is relatively stable, so this band-gap reference has fabulous line regulation.

The output of band gap is as the reference voltage of voltage regulator, and the supply voltage of voltage regulator is chip input voltage.If the voltage regulator operate as normal, the voltage of a 5V of output to power supply and temperature-insensitive.

Continuous rising along with chip input voltage VIN, the bootstrapping undervoltage lockout circuit is monitored this voltage always, when this voltage reaches the upper voltage limit 21.6V of setting, bootstrapping undervoltage lockout circuit output high level signal, in case output high level signal, the thresholding of bootstrapping undervoltage lockout circuit becomes 9.7V, undervoltage lockout circuit ability output low level signal when promptly having only chip power voltage to be lower than lower voltage limit 9.7V, and this circuit has provided the hysteresis scope of 12V.Keep under certain situation at the chip exterior charging capacitor, to such an extent as to the enough big quantity of electric charge on charging capacitor before the power tube conducting tertiary winding normal power supply of this hysteresis scope is enough to chip power supply.

As can be seen start-up course chips inside enable do not begin; so other circuit of chip internal; oscillator for example; the PWM comparator; circuit such as error amplifier and protection module is work not; the chip consumed current is less, in typical case only less than the electric current of 100uA, makes the startup power consumption of chip less and can not bring heat dissipation problem.

Fig. 3 is the pre-charge circuit among Fig. 2 and the realization circuit diagram of band-gap reference circuit, and the supply voltage of pre-charge circuit is a chip input voltage, and the VDDS signal of output is the band-gap reference circuit power supply.The resistance R 3 in left side, NPN transistor Q4, Q5, Q6, Q7 and resistance R 4 are used to produce the insensitive electric current of a pair of power supply, this electric current PMOS transistor P1 that flows through, this electric current is mirrored to the branch road on the right by PMOS transistor P2 and P3, electric current sum in this two PMOS pipe flows through the PMOS pipe P4 that diode connects, P5, and P6, produce a voltage, this voltage adds base stage-emitting stage voltage difference of NPN transistor Q8 and Q9, and the gate source voltage difference that deducts NMOS pipe N1 again is the output voltage of pre-charge circuit, and its expression formula is:

$\mathrm{VDDS}\≈3\left|V_{\mathrm{thp}}\right|+{2V}_d-V_{\mathrm{GS}}=3\sqrt{\frac{2(I_{M1}+I_{M2})}{\mathrm{\μ}{C}_{\mathrm{ox}}W/L}}+{2V}_d-V_{\mathrm{GS}}$

Wherein Vthp is PMOS pipe P4, and the threshold voltage of P5 and P6, Vd are diode base stage emitting stage voltage difference.Band-gap reference circuit among Fig. 2 adopts classical band gap to produce structure, and wherein PMOS manages M15, and NMOS pipe M14, M12 are start-up circuit.The bandgap voltage reference of its generation is shown below:

V _ref＝V _BE3+(R ₂/R ₁)V _T?ln?n

Fig. 4 is the realization circuit diagram of voltage regulator, and the output voltage of band-gap reference is received the grid of PMOS transistor P2 among this figure among Fig. 3, produces inner 5V voltage to supply voltage and temperature-insensitive by negative feedback structure.The supply voltage of voltage regulator is the supply voltage of chip, and error amplifier adopts the folded common source and common grid operational amplifier, in order to improve the transient response of voltage regulator, has adopted the two-stage buffer structure.First order buffer stage is the CMOS source follower, and second level buffer stage is the Bipolar buffer stage, and PT is a power adjustment pipe.Resistance R 3 and the PMOS transistor P16 flow restriction effect that electrifies, when the electric current that flows through power tube was excessive, the voltage at resistance R 3 two ends was higher, and the source gate voltage difference of PMOS transistor P16 is greater than | V _Thp|, P16 manages conducting, the grid voltage of power tube is drawn high, thereby the electric current of power tube is flow through in restriction.The voltage expression formula of voltage regulator output is as follows:

$V_{\mathrm{out}}=V_{\mathrm{ref}}(1+\frac{R_2}{R_1})$

Fig. 5 is the bootstrapping undervoltage lockout circuit schematic diagram shown in Fig. 2, and wherein VIN is a chip input voltage, and Vref is the output voltage of band-gap reference among Fig. 3, and its operation principle is shown in form 1, the form 2.Wherein resistance R 1, and the value of R2 and R3 is determined by following formula:

$V_{\mathrm{ref}}=\frac{R_1}{R_1+R_2+R_3}{V}_{\mathrm{BH}}$

$V_{\mathrm{ref}}=\frac{R_1+R_2}{R_1+R_2+R_3}{V}_{\mathrm{BL}}$

VBH=21.6V wherein, VBL=9.7V, Vref=1.22V.Be applicable to sequential enable logic figure and circuit thereof that LED drives shown in Figure 2 since then realize that by the agency of finishes.After the normal establishment of the signal of judging band-gap reference circuit, voltage regulator, bootstrapping undervoltage lockout circuit, the work of enable logic flip chip produces pwm signal, begins Current Regulation is carried out in the LED load.

Need to prove that this enable logic is a kind of in numerous enable logics, starting current is lower than 100uA, and the hysteresis scope of bootstrapping under-voltage locking reaches 12V.Even adopt this kind enable logic, circuit realizes that different modes is also arranged, and lists a kind of typical circuit way of realization at this.Obviously, those skilled in the art can carry out various changes and modification to the present invention and not break away from the spirit and scope of the present invention.Like this, if of the present invention these are revised and modification belongs within the scope of claim of the present invention and equivalent technologies thereof, then the present invention also is intended to comprise these changes and modification interior.

Voltage range	S	R	Control	The chip operation state
					0＜VIN＜9.7V	1	0	0	Locking, the electric capacity charging
9.7＜VIN＜21.6V	0	0	0	Locking, the electric capacity charging
					VIN＞21.6V	0	1	1	Work has pwm signal

(' 1 ' represent high level, ' 0 ' represents low level, when VIN rises) form 1

Voltage range	S	R	Control	The chip operation state
					VIN＞21.6V	0	1	1	Work has pwm signal
9.7＜VIN＜21.6V	0	0	1	Work has pwm signal
					0＜VIN＜9.7V	1	0	0	Locking, the electric capacity charging

(' 1 ' represent high level, ' 0 ' represents low level, when VIN descends) form 2

Claims (8)

1. the enable logic and the circuit thereof of the led driver that is applicable to civil power input of a novelty, comprise the overall process of judging, finish startup from civil power input, rectifying and wave-filtering, resistance charging, builtin voltage generation, chip input voltage, it is characterized in that receiving the civil power input of global general-use, the complete circuit of voltage transitions and startup is finished in inside.

2. enable logic as claimed in claim 1 is characterized in that, the sequential that powers on and the judgement of voltage made different responses.And finish this enable logic circuitry needed: pre-charge circuit in the power supply electrifying circuit, sheet, band-gap reference circuit, voltage regulator and bootstrapping undervoltage lockout circuit.

3. power supply electrifying circuit as claimed in claim 2 is characterized in that, alternating current is carried out rectifying and wave-filtering, provides starting current by off chip resistor for driver, and to the capacity charge of sheet dispatch from foreign news agency, starts requirement so that the driver input voltage VIN satisfies.

4. as claimed in claim 2 interior pre-charge circuit is characterized in that, the very first time produces the voltage source of waiting in the sheet, thereby starts required module for power supply for other.

5. band-gap reference circuit as claimed in claim 2 is characterized in that, produces the reference voltage and the electric current of chip internal low-temperature coefficient.

6. voltage modulator circuit as claimed in claim 2 is characterized in that, adopts the principle of low-voltage-drop linear voltage regulator, produces the internal power source voltage of 5V, is used for the chip internal power supply.

7. bootstrapping undervoltage lockout circuit as claimed in claim 2 is characterized in that, (9.7V～21.6V), start voluntarily when allowing the driver input voltage to be higher than threshold voltage 21.6V reduces to 9.7V when following, is back to start-up mode to have big hysteresis voltage range.

8. as the described generation circuit of claim 3～7, it is characterized in that, after the described circuit operate as normal, produce the enable signal of driver, begin to carry out the constant current modulation of LED electric current.

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