Peak value searching method and device
Technical Field
The present invention relates to peak search technologies, and in particular, to a peak search method and apparatus.
Background
Peak search is often used in application scenarios such as cell search, multipath search, time slot synchronization, etc., and has a relatively high requirement on speed. For example, in Long-Term Evolution (LTE), when a cell is initially searched, 15 4800 sequences are searched every 5ms, and other processes may require 420k cycles (cycles); when the neighbor cell search is started, 3 4800 sequences are searched every 5ms, and other tasks such as downlink reception, measurement, neighbor cell search and the like may also be performed.
The existing peak search circuit reads in single energy data each time, and compares the read energy data with the maximum energy data obtained before until the energy data are read one by one, the maximum value of the energy data can not be obtained, and forward and reverse scanning needs to be repeatedly carried out to find other maximum values, for example, the chinese patent with the application number of 200510098701.4, the method for searching peaks in the WCDMA system is provided.
Disclosure of Invention
In view of the above, the main objective of the present invention is to provide a peak search method and apparatus, which can meet the requirement of high throughput of a vector processor.
In order to achieve the purpose, the technical scheme of the invention is realized as follows:
the invention provides a peak searching method, which comprises the following steps:
the method comprises the steps that a plurality of energy data are obtained, a first group of comparison circuits and a second group of comparison circuits are used for screening the obtained energy data together, after all the energy data needing to be searched are obtained and screened, a main peak candidate is obtained by the first group of comparison circuits, and a secondary peak candidate is obtained by the second group of comparison circuits;
and screening all the main peak value candidates obtained by the first group of comparison circuits and the secondary peak value candidates obtained by the second group of comparison circuits to obtain peak values.
In the above scheme, the first group of comparison circuits includes a plurality of adders and a plurality of data registers, and the second group of comparison circuits includes a plurality of adders and a plurality of data registers;
the first comparison circuit and the second comparison circuit jointly screen the acquired energy data, and the screening comprises the following processing executed on each energy data which is not acquired for the first time:
when the difference value between the address of the kth energy data which is not acquired for the first time and the energy data address currently stored by the kth first address register in the first group of comparison circuits is greater than a preset zero clearing threshold value, wherein k is used for representing the sequence number of the acquired energy data and is an integer not less than zero;
inputting the obtained kth energy data into a kth first adder in a first group of comparison circuits, wherein the kth first adder compares the input kth energy data with data currently stored in a kth first data register:
when the kth energy data is larger than the energy data currently stored in the kth first data register, inputting the main peak candidate currently stored in the kth first data register into a kth second data register in the second group of comparison circuits, updating the current secondary peak candidate of the kth second data register to the main peak candidate currently stored in the kth first data register, and updating the current main peak candidate stored in the kth first data register to the kth energy data;
when the kth energy data is not larger than a main peak candidate currently held by the kth first data register, inputting the kth energy data to a kth second adder of the second comparison circuit, wherein the kth second adder compares the kth energy data with a secondary peak candidate currently held by the kth second data register, and when the kth energy data is larger than the secondary peak candidate currently held by the kth second data register, updating the secondary peak candidate currently held by the kth second data register to the kth energy data.
In the above solution, the first comparing circuit and the second comparing circuit jointly screen the acquired multiple energy data, including performing the following processing on each non-first acquired energy data:
when the difference value between the address of the kth energy data which is not acquired for the first time and the energy data address currently stored in the kth first address register in the first group of comparison circuits is not larger than the preset zero clearing threshold value,
inputting the obtained kth energy data to the kth first adder, and comparing the input kth energy data with a main peak candidate currently held by the kth first data register by the kth first adder:
when the kth energy data is larger than the main peak candidate currently stored in the kth first data register, updating the main peak candidate currently stored in the kth first data register to the kth energy data;
and when the kth energy data is not larger than the main peak candidate currently stored in the kth first data register, not updating the kth first data register and the kth second data register.
In the above scheme, the first set of comparison circuits further includes a plurality of first address registers, and the second set of comparison circuits further includes a plurality of second address registers;
the method further comprises the following steps: when the first data register of the first group of comparison circuits is updated, correspondingly updating the main peak candidate address stored in the first address register of the first group of comparison circuits; when the second data register of the second group of comparison circuits is updated, the address of the secondary peak candidate stored in the second address register of the second group of comparison circuits is correspondingly updated.
In the above solution, when the first data register of the first group of comparison circuits is updated, correspondingly updating the main peak candidate address stored in the first address register of the first group of comparison circuits includes performing the following processing on each energy data that is not acquired for the first time: when the current sub-peak candidate stored in the kth first data register is updated to the kth energy data, the current data address stored in the kth first address register is also updated to the address of the kth energy data;
when the second data register of the second group of comparison circuits is updated, correspondingly updating the secondary peak candidate address stored in the second address register of the second group of comparison circuits, wherein the following processing is executed on each energy data which is not acquired for the first time: when the current sub-peak candidate stored in the kth second data register is updated to the kth energy data, the current data address stored in the kth second address register is also updated to the address of the kth energy data;
and/or when the current secondary peak candidate stored in the kth second data register is updated to the current primary peak candidate stored in the kth first data register, the current data address stored in the kth second address register is also updated to the current address stored in the kth first address register.
In the above scheme, before the acquiring the plurality of energy data, the method further includes:
and after performing correlation operation processing and filtering operation processing on the acquired sampling data, performing modular operation processing, extracting a real part from a result of the modular operation processing, obtaining the energy data and storing the energy data in a memory.
In the scheme, each row of the memory stores a plurality of energy data;
the acquiring of the plurality of energy data is: and reading a row of data from the memory.
In the above solution, before acquiring the plurality of energy data, the method further includes:
and clearing the obtained main peak candidate, the obtained secondary peak candidate, the preset clear threshold data on the left and right sides of the main peak candidate and the preset clear threshold data on the left and right sides of the secondary peak candidate from all the energy data needing to be searched.
In the above scheme, the screening all the primary peak candidates obtained by the first group of comparison circuits and the secondary peak candidates obtained by the second group of comparison circuits to obtain peaks includes:
the maximum sorting circuit acquires a main peak candidate from the first group of comparison circuits, acquires a secondary peak candidate from the second group of comparison circuits, and sorts, eliminates false peaks, compares and the like the acquired main peak candidate and the acquired secondary peak candidate to obtain a plurality of peaks.
In the above scheme, after obtaining the peak value, the method further includes:
verifying whether the number of the obtained peak values reaches a preset peak value number threshold value, if not, resetting the obtained peak values and one or more data on the left side and the right side of the peak values from all energy data to be searched, and then repeatedly searching the peak values; otherwise, ending the current peak search.
The present invention also provides a peak search apparatus, comprising: a first set of comparison circuits, a second set of comparison circuits, and a maximum ordering circuit, wherein,
the first group of comparison circuits is used for acquiring a plurality of energy data and screening the acquired energy data together with the second group of comparison circuits to obtain a main peak candidate;
the second group of comparison circuits is used for acquiring a plurality of energy data and screening the acquired energy data together with the first group of comparison circuits to obtain a main peak candidate;
and the maximum sorting circuit is used for screening all the main peak candidates obtained by the first group of comparison circuits and the secondary peak candidates obtained by the second group of comparison circuits to obtain peaks.
In the above solution, the apparatus further comprises: a memory and a vector processor, wherein,
the memory is used for storing all energy data to be searched;
and the vector processor is used for performing correlation operation processing and filtering operation processing on the acquired sampling data, then performing modular operation processing, extracting a real part from a result of the modular operation processing, obtaining the energy data and storing the energy data in a memory.
In the above scheme, the memory is further configured to store a plurality of energy data per row;
the first set of comparison circuits and the second set of comparison circuits are further used for reading one row of energy data at a time from the memory.
In the above scheme, the first group of comparison circuits includes a plurality of first adders and a plurality of first data registers, and the first adders are in one-to-one correspondence with and connected to the first data registers;
the first adder is used for acquiring a plurality of energy data, screening the acquired energy data to obtain a main peak candidate and storing the obtained main peak candidate in the first data register;
the first data register is used for storing the main peak candidate.
In the above solution, the first group of comparison circuits further includes a plurality of first address registers for storing addresses of the main peak candidates;
the first adder is also used for saving the addresses of the obtained main peak value candidates to the first address register;
the first address registers are in one-to-one correspondence and connected with the first adders and in one-to-one correspondence and connected with the first data registers.
In the above scheme, the second group of comparison circuits includes a plurality of second adders and a plurality of second data registers, and the first adders are in one-to-one correspondence with and connected to the first data registers;
the second adder is used for acquiring a plurality of energy data, screening the acquired energy data to obtain secondary peak candidate, and storing the secondary peak candidate to the second data register;
and the second data register is used for storing the secondary peak value candidate.
In the above solution, the second group of comparison circuits further includes a plurality of second address registers for storing addresses of the secondary peak candidates;
the second adder is also used for saving the address of the obtained secondary peak candidate to the second address register;
the second address registers are in one-to-one correspondence and connection with the second adders and in one-to-one correspondence and connection with the second data registers.
In the above solution, the apparatus further comprises: the device comprises a cycle control circuit and a zero clearing control circuit, wherein the cycle control circuit is used for verifying whether the number of peak values obtained by the second group of comparison circuits reaches a preset peak value number threshold value, if not, the zero clearing control circuit is informed to clear, the first group of comparison circuits, the second group of comparison circuits and a maximum value sorting circuit are started, and peak value searching is repeatedly carried out; otherwise, ending the current peak value search;
and the zero clearing control circuit is used for clearing the peak value obtained by the second group of comparison circuits and one or more energy data on the left side and the right side of the peak value from a memory storing all energy data to be searched when the notification of the cycle control circuit is received.
In the above scheme, the clear control circuit is further configured to clear the main peak candidate obtained by the first group of comparison circuits and the preset clear threshold energy data on the left and right sides of the main peak candidate, and clear the secondary peak candidate obtained by the second group of comparison circuits and the preset clear threshold energy data on the left and right sides of the secondary peak candidate from the memory in which all the energy data to be searched are stored.
The peak value searching method and the device provided by the invention have the advantages that a plurality of energy data are read out every clock period, the plurality of energy data which are read are subjected to parallel comparison twice, after all the energy data are subjected to parallel comparison, a main peak value candidate and a secondary peak value candidate are obtained, peak values are screened out from the obtained main peak value candidate and secondary peak value candidate, in the process of scanning the data, the plurality of data are compared in a row and in parallel, the data reading and the data comparison can be carried out in a streamline without pause in the middle, the speed is high, the requirement of high throughput rate of a vector processor can be met, at least two peak values can be obtained in each scanning cycle, the reading operation on a memory can be reduced, the power consumption is saved, and the speed of peak value searching and hardware logic resources, such as the area of a chip, are taken into consideration; in addition, the core part of the peak value searching device can be realized only by a series of adders and registers, and the peak value searching device is simple and easy to realize, small in area and low in cost.
Drawings
FIG. 1 is a flow chart of an implementation of the peak search method of the present invention;
FIG. 2 is a schematic diagram of a peak search apparatus according to the present invention;
FIG. 3 is a schematic diagram of a data memory according to an embodiment of the present invention;
FIG. 4 is a block diagram of each bank of the data store in accordance with an embodiment of the present invention;
FIG. 5 is a schematic diagram of two sets of comparison circuits of the peak search module according to an embodiment of the present invention;
fig. 6 is a schematic diagram of a maximum value sorting circuit (max _ sort) of the peak search module according to an embodiment of the present invention.
Detailed Description
The basic idea of the invention is: acquiring a plurality of energy data each time, comparing the energy data through a plurality of adders, and updating the stored energy data according to a comparison result; and comparing the stored energy data to obtain a peak value until all the energy data needing to be searched are acquired and compared, so that the multiple energy data are compared in parallel, the speed is high, the peak value searching efficiency is high, and the requirement of high throughput rate of a vector processor can be met.
Referring to fig. 1, the peak search method of the present invention mainly includes the following steps:
step 101: the method comprises the steps that a plurality of energy data are obtained, a first group of comparison circuits and a second group of comparison circuits are used for screening the obtained energy data together, after all the energy data needing to be searched are obtained and screened, a main peak candidate is obtained by the first group of comparison circuits, and a secondary peak candidate is obtained by the second group of comparison circuits;
step 102: and screening all the main peak value candidates obtained by the first group of comparison circuits and the secondary peak value candidates obtained by the second group of comparison circuits to obtain peak values.
The first group of comparison circuits comprises a plurality of first adders and a plurality of first data registers, and the second group of comparison circuits comprises a plurality of second adders and a plurality of second data registers. The first adders are in one-to-one correspondence with and connected to the first data registers, and the second adders are in one-to-one correspondence with and connected to the second data registers.
Specifically, in step 101, the following processing is performed on each non-first acquired energy data, so as to realize the screening of the energy data: when a difference value between an address of the kth energy data which is not acquired for the first time and an energy data address currently stored in the kth first address register in the first group of comparison circuits is greater than a preset zero clearing threshold, wherein k is used for representing a sequence number of the acquired energy data and is an integer which is not smaller than zero, and if p (p is an integer which is greater than 1) energy data are acquired at present, the value of k can be 0, 1, 2, 3, 1, p-1;
inputting the obtained kth energy data into a kth first adder in a first group of comparison circuits, wherein the kth first adder compares the input kth energy data with data currently stored in a kth first data register;
when the kth energy data is larger than the energy data currently stored in the kth first data register, inputting the main peak candidate currently stored in the kth first data register into a kth second data register in the second group of comparison circuits, updating the current secondary peak candidate of the kth second data register to the main peak candidate currently stored in the kth first data register, and updating the current main peak candidate stored in the kth first data register to the kth energy data;
when the kth energy data is not larger than a main peak candidate currently held by the kth first data register, inputting the kth energy data to a kth second adder of the second comparison circuit, wherein the kth second adder compares the kth energy data with a secondary peak candidate currently held by the kth second data register, and when the kth energy data is larger than the secondary peak candidate currently held by the kth second data register, updating the secondary peak candidate currently held by the kth second data register to the kth energy data.
Here, the clear threshold represents the number of data to be cleared/masked on both left and right sides of the main peak or the sub peak.
Here, in step 101, the above-mentioned performing processing on each non-first-acquired energy data may further include: when the difference value between the address of the kth energy data which is not acquired for the first time and the energy data address currently stored in the kth first address register in the first group of comparison circuits is not larger than the preset zero clearing threshold value,
inputting the acquired kth energy data into the kth first adder, and comparing the input kth energy data with a main peak candidate currently stored in the kth first data register by the kth first adder;
when the kth energy data is larger than the main peak candidate currently stored in the kth first data register, updating the main peak candidate currently stored in the kth first data register to the kth energy data;
and when the kth energy data is not larger than the main peak candidate currently stored in the kth first data register, not updating the kth first data register and the kth second data register.
Here, the first group of comparison circuits further includes a plurality of first address registers, and the second group of comparison circuits further includes a plurality of second address registers, wherein the first address registers are connected to the first adders in a one-to-one correspondence and connected to the first data registers, and the second address registers are connected to the second adders in a one-to-one correspondence and connected to the second data registers.
In the screening process, when a first data register of the first group of comparison circuits is updated, the main peak value candidate address stored in a first address register in the first group of comparison circuits is correspondingly updated; when the second data register of the second group of comparison circuits is updated, the address of the secondary peak candidate stored in the second address register of the second group of comparison circuits is correspondingly updated.
Specifically, when the current sub-peak candidate stored in the kth first data register is updated to the kth energy data, the current data address stored in the kth first address register is also updated to the address of the kth energy data; when the current sub-peak candidate stored in the kth second data register is updated to the kth energy data, the current data address stored in the kth second address register is also updated to the address of the kth energy data; and when the current secondary peak candidate stored in the kth second data register is updated to the current primary peak candidate stored in the kth first data register, the current data address stored in the kth second address register is also updated to the current address stored in the kth first address register.
Prior to acquiring the plurality of energy data, the method further comprises: and clearing each first data register and/or first address register in the first group of comparison circuits.
When the energy data is acquired for the first time and screened, the method further comprises the following steps: and respectively inputting the energy data acquired for the first time into each first data register in the first group of comparison circuits for storage, and clearing each second data register in the second group of comparison circuits.
Meanwhile, the address of the energy data acquired for the first time can be input into each first address register in the first group of comparison circuits for storage, and each second address register in the second group of comparison circuits is cleared.
Here, before acquiring the plurality of energy data, the method may further include: and clearing the obtained main peak candidate, the obtained secondary peak candidate, the energy data of the left and right preset clear threshold of the main peak candidate and the energy data of the left and right preset clear threshold of the secondary peak candidate from all the energy data to be searched. If the screening is carried out for the first time, the zero clearing operation is not required to be carried out before the energy data is acquired.
In practical application, after one round of scanning is finished, if i peak values are found and i is smaller than the number n of peak values to be searched, before the next round of scanning is performed, the found peak values and the zero clearing threshold energy data preset on the left and right sides of each peak value must be cleared.
Prior to the acquiring the plurality of energy data, the method may further comprise: and after performing correlation operation processing and filtering operation processing on the acquired sampling data, performing modular operation processing, extracting a real part from a result of the modular operation processing, obtaining the energy data and storing the energy data in a memory.
Wherein each row of the memory stores a plurality of energy data; the acquiring of the plurality of energy data is: a row of energy data is read from the memory.
The screening of all primary peak candidates obtained by the first group of comparison circuits and secondary peak candidates obtained by the second group of comparison circuits to obtain peaks may include: and the maximum sorting circuit (max _ sort circuit) acquires a main peak candidate from the first group of comparison circuits, acquires a secondary peak candidate from the second group of comparison circuits, and respectively sorts, eliminates false peaks, compares and the like the acquired main peak candidate and the acquired secondary peak candidate to obtain a plurality of peaks.
Specifically, the max _ sort circuit sorts the main peak candidate and the secondary peak candidate according to the descending order and eliminates the false peak value; and then comparing the largest secondary peak candidate with each primary peak candidate, if the largest secondary peak candidate is smaller than the smallest primary peak candidate, determining all primary peak candidates and all secondary peak candidates as peaks, and otherwise, determining each primary peak candidate larger than the largest secondary peak candidate and each primary peak candidate larger than the largest secondary peak candidate as peaks.
Wherein after obtaining the peak value, the method may further comprise: verifying whether the number of the obtained peak values reaches a preset peak value number threshold value, if not, clearing the obtained peak values and one or more data on the left side and the right side of the peak values from all energy data to be searched, and repeatedly searching the peak values; otherwise, ending the current peak search.
Correspondingly, the invention also provides a peak value searching device, which comprises: the device comprises a first group of comparison circuits, a second group of comparison circuits and a maximum value sorting circuit, wherein the first group of comparison circuits is used for acquiring a plurality of energy data and screening the acquired energy data together with the second group of comparison circuits to obtain a main peak candidate; the second group of comparison circuits is used for acquiring a plurality of energy data and screening the acquired energy data together with the first group of comparison circuits to obtain a main peak candidate; and the maximum sorting circuit is used for screening all the main peak candidates obtained by the first group of comparison circuits and the secondary peak candidates obtained by the second group of comparison circuits to obtain peaks.
Specifically, the first group of comparison circuits includes a plurality of first adders and a plurality of first data registers, and the first adders are in one-to-one correspondence with and connected to the first data registers; the first adder is used for acquiring a plurality of energy data, screening the acquired energy data to obtain a main peak candidate and storing the obtained main peak candidate in the first data register; the first data register is used for storing the main peak candidate.
Wherein the first set of compare circuits further comprises a plurality of first address registers for holding addresses of the primary peak candidates; the first adder is also used for saving the addresses of the obtained main peak value candidates to the first address register; the first address registers are in one-to-one correspondence and connected with the first adders and in one-to-one correspondence and connected with the first data registers.
Specifically, the second group of comparison circuits includes a plurality of second adders and a plurality of second data registers, and the first adders are in one-to-one correspondence with and connected to the first data registers. The second adder is used for acquiring a plurality of energy data, screening the acquired energy data to obtain secondary peak candidate, and storing the secondary peak candidate to the second data register; and the second data register is used for storing the secondary peak value candidate.
Wherein the second set of compare circuits further comprises a plurality of second address registers for storing addresses of the secondary peak candidates; the second adder is also used for saving the address of the obtained secondary peak candidate to the second address register; the second address registers are in one-to-one correspondence and connection with the second adders and in one-to-one correspondence and connection with the second data registers.
Wherein the apparatus further comprises: the vector processor is used for processing the energy data, and comprises a memory and a vector processor, wherein the memory is used for storing all energy data; the vector processor is used for performing correlation operation processing and filtering operation processing on the acquired sampling data, then performing modular operation processing, extracting a real part from a result of the modular operation processing, obtaining the energy data and storing the energy data in the memory;
here, the memory is further configured to store a plurality of energy data per line; the first set of comparison circuits and the second set of comparison circuits are further used for reading one row of energy data at a time from the memory.
The device further comprises: the device comprises a cycle control circuit and a zero clearing control circuit, wherein the cycle control circuit is used for verifying whether the number of peak values obtained by the second group of comparison circuits reaches a preset peak value number threshold value, if not, the zero clearing control circuit is informed to clear, the first group of comparison circuits, the second group of comparison circuits and a maximum value sorting circuit are started, and peak value searching is repeatedly carried out; otherwise, the zero clearing control circuit is not informed, and the current peak value searching is finished;
and the zero clearing control circuit is used for clearing the peak value obtained by the second group of comparison circuits and one or more energy data on the left side and the right side of the peak value from a memory storing all energy data to be searched when the notification of the cycle control circuit is received.
Here, the clear control circuit may be further configured to clear the main peak candidate obtained by the first group of comparison circuits and the preset clear threshold energy data on the left and right sides of the main peak candidate, and the sub peak candidate obtained by the second group of comparison circuits and the preset clear threshold energy data on the left and right sides of the sub peak candidate from the memory in which all the energy data to be searched is stored.
Example one
In practical application, the calculation task before the peak search is completed by the vector processor, and the peak search process can be realized by a hardware accelerator.
As shown in fig. 2, the peak searching means may include: the device comprises a radio frequency receiving module, a data memory, a vector processor and a peak value searching module, wherein the radio frequency receiving module is used for receiving data sampled by an ADC (analog-to-digital converter) and storing the obtained adopted data into the data memory; the vector processor is used for reading the sampling data from the data memory, processing the read sampling data to obtain energy data and storing the obtained energy data into the data memory; and the peak value searching module is used for reading the energy data from the data memory, carrying out peak value searching processing, finding a needed peak value, storing the found peak value and returning the peak value to the vector processor.
Specifically, the radio frequency receiving module receives data sampled by the ADC and stores the sampled data in the data memory, the vector processor reads the sampled data from the data memory, performs correlation operation, filtering operation and module taking operation on the sampled data, extracts a real part to obtain energy data, and stores the obtained energy data in the data memory; after the vector processor sets parameters of the peak value searching module, the peak value searching module reads energy data from the data memory, performs peak value searching processing, finds a peak value and returns the peak value to the vector processor.
In practical applications, the processing of the sample data by the vector processor may include: the vector processor reads sampling data from a data memory in a pipeline mode, then carries out operations such as correlation and filtering of downlink sampling data and a Primary Synchronization Sequence (PSS), stores obtained operation results (including correlation and filtering results of an I channel and correlation and filtering results of a Q channel) in the data memory, reads the correlation and filtering results from the data memory for carrying out modular operation processing when carrying out modular operation processing, then extracts a real part from the results of the modular operation processing to obtain energy data, and writes the obtained energy data into the data memory.
After the vector processor performs the modulus operation processing according to the formula (1), the real part of the obtained result is energy data and is stored in the low 16 bits of the data memory, and the imaginary part of the obtained result is 0 and is stored in the high 16 bits of the data memory.
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Wherein,represents a complex signal, Re isReal part of (Im) isThe imaginary part of (c). Originally, each bank stores p/2 data, after compression processing of extracting a real part is carried out, vacancy of an imaginary part of the data is removed, and then p energy data are stored in one bank of the data memory, so that the storage space of the data memory is compressed/saved, and in the subsequent peak value search, the organization structure of the data memory determines that a peak value search module can read out a plurality of energy data at one time, the efficiency of reading the energy data is correspondingly improved by one time, and the throughput rate of parallel search can also be improved by one time. In practical application, the vector processor can extract a real part through oneThe real part extraction process described above.
In particular, to adapt the throughput rate of the vector processor, the data memory has the following structural features: the data storage format is complex energyStoring a complex energy data by using a 32-bit unit, wherein low 16 bits are real parts, and high 16 bits are imaginary parts; as shown in fig. 3, the width (width) of the memory is 16 × P × 4 bits (P is an even number greater than 0), the memory is divided into 4 banks, each bank has P/2 32-bit memory cells, and the vector processor can read one column of data of the memory at a time, i.e., P × 2 energy data. If the vector processor does not perform the operation of extracting the real part after performing only the correlation operation, the filtering operation, etc., and then writes the result back to the memory, the result still has P × 2 energy data in a column of the memory, but each 32-bit storage unit stores the modulus of the complex energy, whose upper 16 bits are 0 and lower 16 bits are real parts (not 0), and actually, the peak search includes the operation of extracting the real part, that is, after the correlation operation, the filtering operation, the operation of extracting the real part is performed by the instruction of extracting the real part, and then the result is written back to the memory, and then a column of the memory stores (16 × P4)/16 × P4 energy data, that is, one 32-bit unit stores two energy data, and one bank can store P energy data, as shown in fig. 4.
It was described above that the vector processor can access the same column of 4 banks of the memory at a time, while the peak search module can access one row of one bank of the memory at a time, i.e. 16 × P bits of data, i.e. P energy data (if the vector processor has not performed the operation of extracting the real part, then P/2 data are read and written at a time).
In practical applications, the data memory may be a synchronous static memory (sram).
And the vector processor is also used for setting parameters of the peak search module. And the peak searching module performs peak searching processing on the read energy data according to the parameter setting of the vector processor.
The peak search module can be realized by a hardware accelerator, and can access a data memory, read out 16 × p bits of energy data from the data memory each time, that is, read out p energy data, and compare the energy data read out each time in a pipeline manner by dividing the energy data read out each time into two times, that is, the energy data read out each time are simultaneously sent to a first group of comparison circuits and a second group of comparison circuits for comparison, after all the energy data are read and compared, the comparison result is screened to find a peak search, and each scanning can find a plurality of peaks.
The peak value searching module mainly comprises two groups of comparison circuits and a max _ sort circuit, wherein the two groups of comparison circuits scan the data memory line by line to obtain energy data, meanwhile, after each row of the obtained energy data is compared and screened, a peak value candidate is obtained, and then the max _ sort circuit screens the obtained peak value candidate to obtain a peak value. The two groups of comparison circuits are similar in structure, the first group of comparison circuits obtains a main peak candidate from the obtained energy data, the second group of comparison circuits obtains a secondary peak candidate from the obtained energy data, after all the energy data needing to be searched are read and screened, the max _ sort circuit obtains the main peak candidate from the first group of comparison circuits, the second group of comparison circuits obtains the secondary peak candidate, and the obtained main peak candidate and the secondary peak candidate are respectively sorted, false peaks are eliminated, comparison and the like, and a plurality of peaks are obtained. Thus, after one round of search, 2 to 2p peaks can be searched, where p is the number of energy data read per line. And if the number of the found peak values is smaller than the preset threshold value n of the number of the peak values, continuing to perform next scanning until the number of the found peak values reaches the preset threshold value n of the number of the peak values.
As shown in fig. 4, the first group of comparison circuits includes p first adders, p first data registers max _ vec0[ ], and p first address registers addr _ vec0[ ], wherein each first adder in the first group of comparison circuits is used to obtain the maximum value in the read data sequence, i.e. to obtain the main peak candidate, the first data register max _ vec0[ ] is used to store the main peak candidate, e.g. max _ vec0[ p ] indicated by a dashed box in fig. 5 is used to store the p-th main peak candidate, and the first address register addr _ vec0[ ] is used to store the address of the main peak candidate; the second set of compare circuits includes p second adders, p second data registers max _ vec1[ ], and p second address registers addr _ vec1[ ]. Each second adder in the second group of comparison circuits is used for obtaining the second largest value of the read data sequence, namely obtaining the second peak candidate, the second data register max _ vec1[ ] is used for storing the second peak candidate, and the second address register addr _ vec1[ ] is used for storing the address of the second peak candidate. As shown in fig. 5, the max _ sort circuit includes p comparison units, each of which includes an adder, a data register, and an address register.
In practical application, if p energy data are stored in one bank of the data memory, where p is an integer greater than 0, the p energy data are read into the first group of comparison circuits at a time, and in order to implement parallel comparison, the first group of comparison circuits needs to include p adders, and the second group of comparison circuits also needs to include p adders. The number of adders in the first group of comparison circuits can also be adjusted according to the number of energy data which are actually required to be processed in parallel.
Specifically, the peak search module performs a peak search process, which includes the following specific steps:
step 0: the vector processor writes a peak search parameter to be configured in the peak search module and configures the peak search parameter for the peak search module;
specifically, the peak search parameters configured by the vector processor may include: the data reading method comprises the steps of a source data address src _ data _ addr for indicating an address of energy data to be read, a data length data _ len for reading the energy data, a peak value number threshold value n, a clear threshold value m which is the number of data to be cleared/masked on the left side and the right side of a main peak value candidate or a secondary peak value candidate, an address addr _ vec0 of a main peak value, an address addr _ vec1 of a secondary peak value, an address Dest _ add for storing the peak value in a data memory, a parameter Dest _ se1 for indicating whether the data is stored in a register or a data memory, and the like.
In practical application, the number m of data to be cleared/shielded on the left and right sides of the peak value is an empirical parameter, and a smaller value can be set if the filtering effect is good or the signal-to-noise ratio of the radio frequency signal is high.
Step 1: when starting, the clear control circuit clears the p data registers and the p address registers in the first group of comparison circuits.
Step 2: the first p energy data are directly stored in the first data register max _ vec0[ ], and the second data register max _ vec1[ ] is cleared.
Here, p energy data may be read in each clock cycle, where p is an integer greater than 0, and is related to an organization structure of a data memory storing the energy data, and specifically may be the number of energy data stored in each row of the data memory.
And step 3: verifying whether unread energy data exist in the data memory, if so, reading p energy data from the data memory storing the energy data, and continuing to the step 4, otherwise, continuing to the step 6;
and 4, step 4: respectively executing the following processing procedures on each energy data in the read p data to find a primary peak candidate and a secondary peak candidate, and continuing to the step 5:
step A, obtaining a difference value addr _ gap between an address addr _ cur of the current read-in kth energy data and a current stored main peak value candidate address addr _ pre of a kth first address register addr _ vec0[ k ] in a first group of comparison circuits, judging whether the obtained difference value addr _ gap is larger than a zero clearing threshold value m, and if so, continuing to step B; otherwise, continuing the step F;
step B, the k-th energy data k read in is sent to a k-th first adder of the first group of comparison circuits, the k-th first adder compares the input k-th energy data with a main peak candidate currently stored in a k-th first data register max _ vec0[ k ], if the k-th energy data is larger than the main peak candidate currently stored in a k-th first data register max _ vec0[ k ], the step C is continued; otherwise, continuing the step D;
step C, updating a kth first data register max _ vec0[ k ] and a kth second data register max _ vec1[ k ], inputting the value of the main peak candidate currently stored in the kth first data register max _ vec0[ k ] into a kth second data register max _ vec1[ k ] by a kth second adder, modifying the value of the current stored secondary peak candidate of the kth second data register max _ vec1[ k ] into the value of the current stored main peak candidate of the kth first data register max _ vec0[ k ], the read kth energy data are input into a kth first data register max _ vec0[ k ] by a kth first adder, and the kth first data register max _ vec0[ k ] modifies the value of the main peak candidate currently stored by the kth first adder into the kth energy data;
meanwhile, the kth second adder inputs the address of the main peak candidate currently stored in the kth first address register addr _ vec0[ k ] into the kth second address register addr _ vec1[ k ], and the kth second address register addr _ vec1[ k ] modifies the address of the current-stored secondary peak candidate into the address of the current-stored main peak candidate in the kth first address register addr _ vec0[ k ]; the kth first adder inputs the read address of the kth energy data into a kth first address register addr _ vec1[ k ], and the kth first address register addr _ vec1[ k ] modifies the current main peak candidate address stored by the kth first address register addr _ vec1[ k ] into the address of the kth energy data;
step D, inputting the read energy data k into a kth second adder of a second group of comparison circuits, comparing the input kth energy data with a current stored secondary peak candidate of a kth second data register max _ vec1[ k ], and continuing to the step E if the kth energy data is larger than the current stored secondary peak candidate of the kth second data register max _ vec1[ k ]; otherwise, ending the current flow;
step E, the kth second adder updates the kth second data register max _ vec1[ k ], the read-in kth energy data is input into the kth second data register max _ vec1[ k ], and the value of the current stored secondary peak candidate of the kth second data register max _ vec1[ k ] is modified into the kth energy data;
meanwhile, the kth second adder inputs the read address of the kth energy data into the kth second address register addr _ vec1[ k ], and the kth second address register addr _ vec1[ k ] modifies the current saved sub-peak candidate address into the address of the kth energy data, and the current process is ended.
Step F, inputting the read k-th energy data k into a k-th first adder, comparing the input k-th energy data with a main peak candidate currently stored in a k-th first data register max _ vec0[ k ], and if the k-th energy data is larger than the main peak candidate currently stored in the k-th first data register max _ vec0[ k ], continuing to the step G; otherwise, ending the current flow;
and G, updating the kth first data register max _ vec0[ k ], inputting the read-in kth energy data into the kth first data register max _ vec0[ k ] by the kth first adder, modifying the value of the main peak candidate currently stored by the kth first data register max _ vec0[ k ] into the kth energy data, and ending the current process.
Meanwhile, the kth first adder inputs the read address of the kth energy data into the kth first address register addr _ vec0[ k ], the kth first address register addr _ vec0[ k ] modifies the current saved main peak candidate address into the address of the kth energy data, and the current process is ended.
And 5: clearing/shielding the obtained main peak candidate, the obtained secondary peak candidate, the zero clearing threshold m data on the left side and the right side of the main peak candidate and the zero clearing threshold m data on the left side and the right side of the secondary peak candidate from a data memory, and returning to the step 3;
in practical applications, it is necessary to perform the zero/mask operation after each peak scan.
Thus, after data _ len/p cycles, after all energy data have been read, the first data register max _ vec0[ ] holds p primary peak candidates, and the second data register max _ vec1[ ] holds p secondary peak candidates.
Step 6: the max _ sort circuit screens the primary peak candidates stored in each data register in the first group of comparison circuits and the secondary peak candidates stored in each data register in the second group of comparison circuits to find two or more peaks, and the specific process is as follows:
step a: the max _ sort circuit acquires a main peak candidate from each data register in the first group of comparison circuits and acquires a secondary peak candidate from each data register in the second group of comparison circuits, and the acquired main peak candidate and the secondary peak candidate are sorted from large to small respectively and are subjected to false peak elimination processing;
step b: the max _ sort circuit compares the largest secondary peak candidate among the secondary peak candidates with each of the primary peak candidates, determines all the primary peak candidates and all the secondary peak candidates as peaks to be searched if the largest secondary peak candidate is smaller than the smallest primary peak candidate among the primary peak candidates, and otherwise determines each of the primary peak candidates and the largest secondary peak candidate larger than the largest secondary peak candidate as a peak.
In order to avoid searching false peaks, false peaks in the primary peak candidates and the secondary peak candidates need to be eliminated when the primary peak candidates and the secondary peak candidates are sorted.
Here, the false peak is a peak of any one of the left and right threshold energy data of the primary peak candidate and/or the secondary peak candidate.
In practical application, the process of sorting the main peak candidates and eliminating the false peaks may be as follows:
step c, a max _ sort circuit reads a main peak candidate from a first data register max _ vec0[ ] for the first time, simultaneously reads the address of the main peak candidate from a first address register addr _ vec0[ ], stores the main peak candidate as max0, clears max _1, max _2, and max _ p-1, stores the address of the main peak candidate as addr _0, and clears addr _1, and addr _ p-1;
d, verifying whether p main peak value candidates have been read by a max _ sort circuit, if so, continuing to the step h, otherwise, continuing to the step e;
step e, the max _ sort circuit continues to read the main peak candidate from the first data register max _ vec0[ ], and simultaneously, reads the address of the main peak candidate from the first address register addr _ vec0[ ];
step f, a max _ sort circuit compares the read-in main peak value rear selector with max _0, max _1,. and max _ p-1, and simultaneously compares the address of the read-in main peak value rear selector with the difference value between addr _0, addr _1,. and addr _ p-1 and a zero clearing threshold value m;
step g, according to the comparison result in the step f, the max _ sort circuit stores the read main peak candidate as max _ k (k is 0, 1, 2,.. multidot.p-1), and stores the address of the main peak candidate as the corresponding addr _ k;
the operations in this step involve copy and shift operations between max _0, max _ 1.
For example, if the read main peak candidate is smaller than the data in max _1 and larger than max _2, the difference between the address addr _ in and the address addr _1 of the main peak candidate is larger than a zero clearing threshold m, and the difference between the address addr _ in and the address addr _2 of the main peak candidate is larger than the zero clearing threshold m, then max _2 is stored as max _3, and the read main peak candidate is stored as max _ 2; if the read main peak candidate is smaller than max _1 and larger than max _2, the difference value between the address addr _ in and the address addr _1 of the main peak candidate is larger than the zero clearing threshold m, and the difference value between the address addr _ in and the address addr _2 of the main peak candidate is not larger than the zero clearing threshold m, then max _2 is a false peak value and is invalid, at this time, only max _1 needs to be stored as max _2, and so on.
Step h, finishing sorting p main peak value candidates from large to small by a max _ sort circuit to obtain a main peak value candidate sequence (max _0, max _1,.. multidot., max _ p-1) and a corresponding main peak value candidate address sequence (addr _0, addr _1,. multidot., addr _ p-1);
similarly, the max _ sort circuit may sort the p secondary peak candidates in the second data register max _ vec1[ ] from large to small, and at the same time, eliminate the false peaks therein to obtain a secondary peak candidate sequence (smax _0, smax _1,. once.smax _ p-1) and a corresponding secondary peak candidate address sequence (saddr _0, saddr _1,. once.saddr _ p-1).
Finally, the max _ sort circuit compares the maximum value smax _0 in the secondary peak candidate sequence with each primary peak candidate in the primary peak candidate sequence (max _0, max _ 1.,. max _ p-1), and if max _ k-1 < smax _0 < max _ k, k is 0, 1.., p-1, then k primary peak candidates in max _0, max _ 1.,. max _ k and the maximum value smax _0 in the secondary peak candidate sequence are determined as peaks, and k peaks are finally searched; if smax _0 is smaller than the minimum value max _ p-1 of the primary peak candidates, p secondary peak candidates in the secondary peak candidate sequence (smax _0, smax _ 1.,. smax _ p-1) and p primary peak candidates in the primary peak candidate sequence (max _0, max _ 1.,. max _ p-1) are determined as peaks, and finally 2p maximum values are searched.
In practical applications, when relatively large data in the energy data is dispersed, the address difference values of p primary peak candidates in the first data register max _ vec0[ ] are greater than m, the address difference values of p secondary peak candidates in the second data register max _ vec1[ ] are also greater than m, and the probability of finding the number of peaks is shown in table 1 below, where x depends on the number of peaks screened by the second group of comparison circuits.
TABLE 1
The average number of peaks found (weighted average) according to the above method is: (2+3+4+5+. + p +2p)/p, for example, p ═ 8, and the average number of peaks found per search run is about 6.
Here, after each round of search, the max _ sort circuit may also save the resulting peak to the address Dest _ addr of the data memory, or to a register for easy access, according to the setting of the parameter Dest _ sel.
And 7: and (3) judging whether the number of the searched peak values reaches a preset 'peak value number threshold value n', if so, ending the current process, otherwise, returning to the step 1, repeating the peak value searching process, performing the next round of peak value searching, and repeating the steps until the number of the searched peak values reaches the preset 'peak value number threshold value n'.
The peak search process described above has the following characteristics:
firstly, two groups of comparison circuits are adopted, each column is searched in parallel in the searching process, and the parallel searching is carried out according to each column, so that the reading operation of a memory can be reduced, the power consumption is saved, and the peak searching speed and hardware logic resources, such as the area of a chip, are considered.
Secondly, two groups of comparison circuits are adopted, so that only 1/p of probability obtains 2 maximum values after each round of scanning, the probability of obtaining 3 maximum values is 1/p, and the maximum value can be obtained at most 2p, and the input-output ratio is very high.
The above description is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention.