CN102184087A - RFID (Radio Frequency Identification Device) tag chip true random number generator - Google Patents

RFID (Radio Frequency Identification Device) tag chip true random number generator Download PDF

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CN102184087A
CN102184087A CN2011101037508A CN201110103750A CN102184087A CN 102184087 A CN102184087 A CN 102184087A CN 2011101037508 A CN2011101037508 A CN 2011101037508A CN 201110103750 A CN201110103750 A CN 201110103750A CN 102184087 A CN102184087 A CN 102184087A
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random number
counter
seed
ring oscillator
true random
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CN102184087B (en
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胡建国
王德明
丁颜玉
张俊
谭洪舟
陈宇
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Sun Yat Sen University
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GUANGZHOU SYSUR MICROELECTRONICS Inc
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Abstract

The invention discloses an RFID (Radio Frequency Identification Device) tag chip true random number generator which has high university, and less power consumption and a smaller area, can be tested through various random number properties, and comprises a high-frequency ring-shaped oscillator, a sampler, a controller, a counter, a seed register and an element cellular automata, wherein the high-frequency ring-shaped oscillator can generate a high-frequency signal under the control of the controller, the high-frequency signal output by the high-frequency ring-shaped oscillator is sampled by the sampler to obtain a seed value, under the control of the counter, the seed value is stored in the seed register, the seed register is connected with the element cellular automata, and a true random number is obtained after the processing of the element cellular automata. The seed register is a 32-position register, the element cellular automata is a 37-level cellular automata displacement register, the counter is a counter with 32 bit, and the high-frequency ring-shaped oscillator is a high-frequency ring-shaped oscillator with RC (Remote Control) delay.

Description

RFID label chip true Random Number Generator
Technical field
The present invention relates to a kind of true Random Number Generator, specifically, it is less to relate to a kind of versatility height, power consumption and area, and can be by the RFID label chip true Random Number Generator of various random number performance tests.
Background technology
RFID reader and label chip are in communication process, normal operation generally is through seeking flow processs such as card, anti-collision, choosing card, safety certification and transaction, the purpose of safety certification operation is that reader and label chip are authenticated, guarantee the legitimacy of intercommunication, prevent the reader forged or the label chip flow process of participating in business.The higher label chip of level of security adopts this three of authentication protocol, cryptographic algorithm and tandom number generator to protect the safety of label key and data jointly usually.
There is several different methods in the RFID label chip, to realize true random number at present, mainly contains following several: directly amplify the thermonoise method, based on the random-number generating method of chaos and the SRAM random noise source extracting method that powers on.Though directly amplify the thermonoise method and can obtain random statistical characteristic preferably based on the random-number generating method of chaos, hardware is realized the cost height, is presented as that mainly area and power consumption are bigger, the complexity height.The SRAM random noise source extracting method that powers on needs integrated SRAM, and versatility is not high, and this method random statistical characteristic is relatively poor, is difficult to by every performance test at random.
Summary of the invention
At above deficiency, the invention provides a kind of versatility height, power consumption and area are less, and can be by the RFID label chip true Random Number Generator of various random number performance tests, it comprises the high frequency ring oscillator, sampling thief, controller, counter, seed register and first cellular automaton, described high frequency ring oscillator produces high-frequency signal under the control of controller, sampling obtains seed to the high-frequency signal of described high frequency ring oscillator output through sampling thief, and under the control of counter, described seed is kept in the seed register, seed register is connected with first cellular automaton again, obtains true random number after handling through first cellular automaton.
Described seed register is 32 bit registers, and described first cellular automaton is 37 grades of first cellular automaton shift registers, and described counter is the counter of 32 bits.
Described high frequency ring oscillator is to have the high frequency ring oscillator that RC postpones, it comprises phase inverter I1 ~ I3, Sheffer stroke gate U1, rejection gate X0 ~ X4, postpone electric capacity C1 ~ C10 and cmos switch pipe M1 ~ M10, each postpones electric capacity and a switching tube of controlling its access or disconnection is formed a delay control circuit, postpone electric capacity C1 ~ C5 and cmos switch pipe M1 ~ M5 and form first order delay control circuit, postpone electric capacity C6 ~ C10 and cmos switch pipe M6 ~ M10 and form second level delay control circuit, the Sheffer stroke gate U1 of two inputs forms third level delay control circuit, three grades of delay control circuits connect by phase inverter I1 ~ I3, and rejection gate X0 ~ X4 connects first cellular automaton and forms 5 tunnel feedbacks.
RFID label chip true Random Number Generator of the present invention utilizes one to have the high frequency ring oscillator generation high-frequency signal that RC postpones, this high-frequency signal is produced by annular oscillation circuit self-sustained oscillation, do not need dynamic excitation, signal is influenced by outside noise also simultaneously, frequency has skew, in order to make the high-frequency signal frequency constantly change within the specific limits, the present invention adds delay capacitor on ring oscillator, the access of these electric capacity is controlled by the output of shift register, constantly changes oscillation frequency.In addition, the oscillator method of sampling has very strong versatility, generally is fit to various circuit needs, and its area and power consumption are less and easy simultaneously by every performance test at random, thereby have obtained widespread use.
Description of drawings
Fig. 1 is the functional framework figure of RFID label chip true Random Number Generator of the present invention;
Fig. 2 realizes schematic diagram for high frequency ring oscillator of the present invention.
Embodiment
Below in conjunction with accompanying drawing the present invention is further set forth.
As shown in Figure 1, RFID label chip true Random Number Generator of the present invention comprises high frequency ring oscillator 1, sampling thief 2, controller 3, counter 4, seed register 5 and first cellular automaton 6, described high frequency ring oscillator 1 produces high-frequency signal under the control of controller 3,2 samplings obtain seed to the high-frequency signal of described high frequency ring oscillator 1 output through sampling thief, and under the control of counter 4, described seed is kept in the seed register 5, seed register 5 is connected with first cellular automaton 6 again, through obtaining true random number after first cellular automaton processing 6.Wherein, described seed register is 532 bit registers, and described first cellular automaton 6 is 37 grades of first cellular automaton shift registers, and described counter 4 is the counter of 32 bits.
As shown in Figure 2, described high frequency ring oscillator 1 is for having the high frequency ring oscillator that RC postpones, it comprises phase inverter I1 ~ I3, Sheffer stroke gate U1, rejection gate X0 ~ X4, postpone electric capacity C1 ~ C10 and cmos switch pipe M1 ~ M10, each postpones electric capacity and a switching tube of controlling its access or disconnection is formed a delay control circuit, postpone electric capacity C1 ~ C5 and cmos switch pipe M1 ~ M5 and form first order delay control circuit, postpone electric capacity C6 ~ C10 and cmos switch pipe M6 ~ M10 and form second level delay control circuit, the Sheffer stroke gate U1 of two inputs forms third level delay control circuit, three grades of delay control circuits connect by phase inverter I1 ~ I3, and rejection gate X0 ~ X4 connects first cellular automaton and forms five tunnel feedbacks.Wherein, one of them of Sheffer stroke gate U1 is input as the enable signal of control lag circuit, another input then is the loop of high frequency ring oscillator, five the tunnel are fed back to wherein five outputs from 37 grades of first cellular automaton shift registers, this five tunnel feedback is being controlled the access of the first order and partial five electric capacity by five rejection gates, has reached the purpose of controlled frequency; The frequency of high frequency ring oscillator vibration 1 output is constantly to change, the variation of its frequency is subjected to five tunnel FEEDBACK CONTROL, vibration output is input to behind over-sampling in 37 grades of first cellular automaton shift registers, and 32 bit shifts output wherein is 32 final true random number outputs.
The signal of described high frequency ring oscillator 1 " enable " is the output enable signal that comes self-controller 3, when enable is high level, U1 is equivalent to a phase inverter, the circuit of this moment is equivalent to the ring oscillator that is together in series by three phase inverters, output terminal at phase inverter increases delay electric capacity, the circuit oscillation frequency can be reduced, circuit is started working; When enable was low level, circuit was closed, and high frequency ring oscillator 1 failure of oscillation is no longer exported high-frequency signal output.
The signal q0 to q4 of described high frequency ring oscillator 1 is five feedback outputs from 37 grades of first cellular automatons 6, this five tunnel feedback signal is controlled the conducting and the disconnection of these metal-oxide-semiconductor switches of M1 to M5, M6 to M10 respectively, thereby these accesses that postpone electric capacity of control C1 to C10 whether.
The signal of described high frequency ring oscillator 1 " control " is the output control signal of coming self-controller 3, the access of control q0 to q4, when control is high level, nq0 to nq4 is low level entirely, the grid that is M1 to M10 is a low level, not conducting of M1 to M10, all delay capacitors of C1 to C10 have been turn-offed, at this time oscillation frequency is the fastest, when control is low level, nq0 to nq4 is respectively the result of q0 to q4 signal negate, and the on off state of M1 to the M10 gate circuit of this moment is determined that by q0 to q4 oscillation frequency is then determined by the C1 to C10 that inserts.Signal q0 to q4 is input to the high frequency ring oscillator from 37 grades of first cellular automatons 6 under the effect of controller 3.
2 pairs of high frequency ring oscillators of described sampling thief output signal is sampled, because the high-frequency signal frequency is higher, in the scope of 15MHZ to 20MHZ, therefore the clock signal of sampling thief 2 should adopt lower frequency, must be less than 7.5MHZ, here our sampling thief and other circuit clocks use the 2MHZ frequency, and purpose is to reduce power consumption and sample random signal preferably.
Described controller 3 will produce the control signal of control high frequency ring oscillator, as control signal, enable signal and q0 ~ q4 signal etc.
Described counter 4 is the counter of 32 bits, is used for controlling sampled result and preserves the into relevant position of 32 seed register.
Because the random number that circuit of the present invention produces is 32 bits, therefore described 32 seed register 5 have just been used the register of 32 bits, under the control of counter, 1 Bit data of at every turn sampling are deposited in the corresponding seed register.
Described 37 bit cellular automatons 6 are shift register, adopt 90/150 rule of first cellular automaton, and this rule has irreducible function, is particularly suitable for producing random number, and its polynomial expression is
Figure 2011101037508100002DEST_PATH_IMAGE001
(scope of i is 0 to 36, represents i shift register; T represents current state, and t+1 represents next state; a iWhether the output of representing i shift register inserts, and 0 expression does not insert, and 1 expression inserts), wherein work as a iRepresent rule 90 at=0 o'clock, work as a iRepresented rule 150 at=1 o'clock.In the present invention, define one 37 register CASR_reg [36:0], CASR_reg [27] adopts 150 rules, i.e. CASR_reg [27]=CASR_reg [26]+CASR_reg [27]+CASR_reg [28], and all the other all adopt 90 rules.When 37 bit cellular automaton shift registers are started working, the value assignment of seed register the inside is advanced CASR_reg[31:0], remaining CASR_reg is set to " 1010 ".At this moment first cellular automaton just can constantly produce 37 displacement output, wherein CASR_reg[31:0] output will be as 32 final true random numbers, CASR_reg [36:32] then feeds back to the q0 to q4 of high frequency ring oscillator.
The above only is a better embodiment of the present invention, the present invention is not limited to above-mentioned embodiment, in implementation process, may there be local small structural modification, if various changes of the present invention or modification are not broken away from the spirit and scope of the present invention, and belong within claim of the present invention and the equivalent technologies scope, then the present invention also is intended to comprise these changes and modification.

Claims (3)

1. RFID label chip true Random Number Generator, it is characterized in that, it comprises high frequency ring oscillator, sampling thief, controller, counter, seed register and first cellular automaton, described high frequency ring oscillator produces high-frequency signal under the control of controller, sampling obtains seed to the high-frequency signal of described high frequency ring oscillator output through sampling thief, and under the control of counter, described seed is kept in the seed register, seed register is connected with first cellular automaton again, obtains true random number after handling through first cellular automaton.
2. RFID label chip true Random Number Generator according to claim 1 is characterized in that described seed register is 32 bit registers, and described first cellular automaton is 37 grades of first cellular automaton shift registers, and described counter is the counter of 32 bits.
3. RFID label chip true Random Number Generator according to claim 1, it is characterized in that, described high frequency ring oscillator is to have the high frequency ring oscillator that RC postpones, it comprises phase inverter I1 ~ I3, Sheffer stroke gate U1, rejection gate X0 ~ X4, postpone electric capacity C1 ~ C10 and cmos switch pipe M1 ~ M10, each postpones electric capacity and a switching tube of controlling its access or disconnection is formed a delay control circuit, postpone electric capacity C1 ~ C5 and cmos switch pipe M1 ~ M5 and form first order delay control circuit, postpone electric capacity C6 ~ C10 and cmos switch pipe M6 ~ M10 and form second level delay control circuit, the Sheffer stroke gate U1 of two inputs forms third level delay control circuit, three grades of delay control circuits connect by phase inverter I1 ~ I3, and rejection gate X0 ~ X4 connects first cellular automaton and forms 5 tunnel feedbacks.
CN201110103750.8A 2011-04-25 2011-04-25 RFID (Radio Frequency Identification Device) tag chip true random number generator Expired - Fee Related CN102184087B (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113961171A (en) * 2021-10-21 2022-01-21 无锡沐创集成电路设计有限公司 Random signal generation device and physical unclonable function generation system

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1534454A (en) * 2003-03-31 2004-10-06 �����ɷ� Pseudo-random number generator
US6862605B2 (en) * 2001-08-15 2005-03-01 Scott A. Wilber True random number generator and entropy calculation device and method
CN1642005A (en) * 2003-12-08 2005-07-20 海力士半导体有限公司 Oscillator circuit operating with a variable driving voltage
US20070133790A1 (en) * 2005-12-12 2007-06-14 Industrial Technology Research Institute Random number generator and method for generating random number
CN1991859A (en) * 2005-12-30 2007-07-04 财团法人工业技术研究院 Random number producer and its seed counting value producing unit
US20070180009A1 (en) * 2005-03-30 2007-08-02 Impinj, Inc. RFID tag with random number generator having a noise-based input
CN101673351A (en) * 2008-09-11 2010-03-17 北京同方微电子有限公司 Pseudo-random number generating circuit and generating method of radio frequency identification tag chip
CN101814907A (en) * 2009-02-20 2010-08-25 凌通科技股份有限公司 Signal delay circuit and oscillator using signal delay circuit

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6862605B2 (en) * 2001-08-15 2005-03-01 Scott A. Wilber True random number generator and entropy calculation device and method
CN1534454A (en) * 2003-03-31 2004-10-06 �����ɷ� Pseudo-random number generator
CN1642005A (en) * 2003-12-08 2005-07-20 海力士半导体有限公司 Oscillator circuit operating with a variable driving voltage
US20070180009A1 (en) * 2005-03-30 2007-08-02 Impinj, Inc. RFID tag with random number generator having a noise-based input
US20070133790A1 (en) * 2005-12-12 2007-06-14 Industrial Technology Research Institute Random number generator and method for generating random number
CN1991859A (en) * 2005-12-30 2007-07-04 财团法人工业技术研究院 Random number producer and its seed counting value producing unit
CN101673351A (en) * 2008-09-11 2010-03-17 北京同方微电子有限公司 Pseudo-random number generating circuit and generating method of radio frequency identification tag chip
CN101814907A (en) * 2009-02-20 2010-08-25 凌通科技股份有限公司 Signal delay circuit and oscillator using signal delay circuit

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
罗刚 等: "细胞自动机及其在数字VLSI测试中的应用", 《四川大学学报》 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113961171A (en) * 2021-10-21 2022-01-21 无锡沐创集成电路设计有限公司 Random signal generation device and physical unclonable function generation system

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