CN102163114A - Multi-point touch screen - Google Patents

Multi-point touch screen Download PDF

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Publication number
CN102163114A
CN102163114A CN2011100759193A CN201110075919A CN102163114A CN 102163114 A CN102163114 A CN 102163114A CN 2011100759193 A CN2011100759193 A CN 2011100759193A CN 201110075919 A CN201110075919 A CN 201110075919A CN 102163114 A CN102163114 A CN 102163114A
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input layer
lead
wire
input
row
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CN2011100759193A
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唐小英
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Individual
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Abstract

The invention discloses a multi-point touch screen, and relates to a touch screen. The multi-point touch screen comprises a display unit, a touch panel positioned on the display unit, a touch panel main control chip in signal connection with the touch panel and a scratch resistant plastic layer attached to the surface of the touch panel; the touch panel comprises a first input layer, a second input layer, a third input layer and a fourth input layer; the first input layer comprises a plurality of first input layer blocks arranged in parallel, and the second input layer comprises a plurality of second input layer blocks arranged in parallel; and the touch screen also comprises row critical lines and column critical lines, wherein a row critical line passes between the two adjacent first input layer blocks, and a column critical line passes between the two adjacent second input layer blocks. When a touch point is at a critical position, the position of the touch point can be uniquely judged through the row critical lines and the column critical lines, the design structure further improves the accuracy of the multi-point touch screen, and the calculation method of identification software is simpler.

Description

The multipoint mode touch-screen
Technical field
The present invention relates to touch-screen, relate in particular to the multipoint mode touch-screen.
Background technology
Touch-screen has been widely used on the electronic equipments such as computing machine, mobile phone realizing operation to main frame making man-machine exchange more simple and direct by icon on the finger touch display screen and literal.
From the developing history of touch-screen, but touch-screen has developed into the multi-point touch panel of multiple point touching from single-point touches, and the characteristics of multi-point touch panel maximum are the operations that can a plurality of fingers realizes simultaneously screen, makes the convenient and hommization of touch-screen.
The multi-point touch panel of present stage mainly is the condenser type multi-point touch panel, and the IC manufacturing technology difficulty of condenser type multi-point touch panel is big, touch screen panel board machining process complexity and production cost height.Existing resistance four-wire system touch-screen, its production cost is low and be easy to processing, but can only carry out single-point touch.
In view of the continuous development and the application prospects of touch-screen, people need a kind of production cost multi-point touch panel low, that be easy to process to satisfy widely with touch-screen to carry out demand that main frame is controlled.
Summary of the invention
The present invention is directed to the deficiency of above-mentioned technical matters, aim to provide a kind of many formula point touch-screens,, make the low and convenient and practical height of a kind of production cost multipoint mode electric resistance touch screen accurately by electric resistance touch screen is improved.
The present invention is achieved through the following technical solutions: a kind of multipoint mode touch-screen comprises display unit, is positioned at touch panel, the touch panel main control chip that is connected with the touch panel signal on the described display unit and is attached to the scratch resistant plastic layer on touch panel surface; Described touch panel comprises first input layer, second input layer, the 3rd input layer and the 4th input layer; Described first input layer comprises the first input layer piece that plurality of parallel is provided with, and the first input layer piece comprises some interconnective first input layer row electrode lines; Described second input layer comprises the second input layer piece that plurality of parallel is provided with, and the second input layer piece comprises some interconnective second input stratose electrode wires; The stacked formation matrix that is provided with of the first input layer piece and the second input layer piece; The first input layer row electrode lines of described first input layer is provided with a lead-in wire jointly, and the second input stratose electrode wires of described second input layer is provided with a lead-in wire jointly; Described the 3rd input layer comprises some the 3rd input layer row electrode lines, and described the 3rd input layer row electrode lines is interspersed between the described first input layer row electrode lines; Described the 4th input layer comprises some the 4th input stratose electrode wires, and described the 4th input stratose electrode wires is interspersed between the described second input stratose electrode wires; Described the 3rd input layer row electrode lines and described the 4th input stratose electrode wires all are provided with lead-in wire; All be provided with isolation resistance on the lead-in wire of the lead-in wire of the lead-in wire of the described first input layer row electrode lines, the second input stratose electrode wires, the lead-in wire of the 3rd input layer row electrode lines and the 4th input stratose electrode wires; The present invention also comprises capable critical line and row critical line, interspersed capable critical line between per two first adjacent input layer pieces, interspersed row critical line between per two second adjacent input layer pieces; Described capable critical line and row critical line all are provided with lead-in wire, and the lead-in wire of described capable critical line and row critical line is provided with isolation resistance.
Below above technical scheme is further elaborated:
Described touch panel main control chip comprises CPU, pull-up resistor, comparer and CMOS pipe; The lead-in wire of the lead-in wire of the described first input layer row electrode lines, the second input stratose electrode wires, the lead-in wire of the 3rd input layer row electrode lines, the lead-in wire of the 4th input stratose electrode wires, the lead-in wire of row critical line and the lead-in wire of row critical line all are provided with power connector end and signal connection end; The power connector end of described lead-in wire electrically connects with power supply after being connected in series a pull-up resistor; The signal connection end of described lead-in wire is connected with the signal input part of described comparer, and the signal output part of described comparer is connected with described cpu signal; The drain electrode of described CMOS pipe is connected with the signal connection end signal of described lead-in wire, and the control utmost point of described CMOS pipe is connected with described cpu signal, the source ground line of described CMOS pipe.
Beneficial effect of the present invention is: one, multipoint mode touch-screen of the present invention, form first input layer by a plurality of first input layer pieces, and the first input layer piece is made up of a plurality of interconnective first input layer row electrode lines; A plurality of second input layer pieces are formed second input layer, and the second input layer piece is made up of a plurality of interconnective second input stratose electrode wires; Wherein, first input layer piece of first input layer and the second input layer piece of second input layer are divided into some big zones with touch panel, can roughly judge the position at place, touch point when touching on touch panel by the first input layer piece and the second input layer piece; In addition, the present invention also is provided with the 3rd input layer and the 4th input layer, and the 3rd input layer has the 3rd input layer row electrode lines that is interspersed in the first input layer row electrode lines, and the 4th input layer has the 4th input stratose electrode wires that is interspersed in the second input stratose electrode wires; Like this, after judging the approximate location at place, touch point by first input layer and second input layer, can judge the exact position of touch more accurately by the 3rd input layer row electrode lines and the 4th input stratose electrode wires, compare with electric resistance touch screen in the market, can determine more touch point by electrode wires still less, make that the degree of accuracy of touch-screen is higher; In addition, interspersed capable critical line between per two first adjacent input layer pieces, interspersed row critical line between per two second adjacent input layer pieces; Such project organization, when the touch point was between two the first input layer pieces, at this moment, what might discern was respectively point in two first input layer pieces; When the touch point was between four the first input layer pieces, at this moment, what might discern was respectively four different points in four the first input layer pieces, and so, identification promptly leads to errors; The present invention is interspersed capable critical line between per two first adjacent input layer pieces, interspersed row critical line between per two second adjacent input layer pieces, like this, can be in critical localisation in unique institute touch point of judging by row critical line and row critical line when the touch point is in critical localisation, the computing method that the design's structure has further improved the degree of accuracy of multipoint mode touch-screen of the present invention and identification software are simpler; Two, touch panel main control chip of the present invention is equipped with pull-up resistor, comparer and CMOS pipe, pull-up resistor provides high level for touch panel, comparer is changed the level of the touch panel of reception, with the level conversion of touch panel is the discernible level of CPU, and the CMOS pipe provides low level as a switching device for touch panel; Three, the present invention is simple in structure, and production cost is low, and needed control circuit is simple, and stability is strong.
Description of drawings
Fig. 1 is a structural principle synoptic diagram of the present invention.
Embodiment
The present invention will be further described below in conjunction with drawings and Examples:
With reference to shown in Figure 1, the multipoint mode touch-screen that the present invention discloses comprises display unit, be positioned at touch panel, the touch panel main control chip that is connected with the touch panel signal on the display unit and be attached to the scratch resistant plastic layer on touch panel surface; Touch panel comprises first input layer, second input layer, the 3rd input layer and the 4th input layer; First input layer comprises two first input layer piece RA1, RA2, and the second input layer piece comprises two second input layer piece CA1, CA2, the first input layer piece RA1, RA2 and the stacked formation matrix that is provided with of the second input layer piece CA1, CA2; First first input layer piece of first input layer is provided with lead-in wire RA1_DR, second first input layer piece of first input layer is provided with lead-in wire RA2_DR, first second input layer piece of second input layer is provided with lead-in wire CA1_DR, and second second input layer piece of second input layer is provided with lead-in wire CA2_DR; The 3rd input layer comprises the 3rd input layer row electrode lines RP11, RP21, RP31, RP41, RP51, RP61, RP71, RP81, RP12, RP22, RP32, RP42, RP52, RP62, RP72 and RP82, and described the 3rd input layer row electrode lines RP11, RP21, RP31, RP41, RP51, RP61, RP71, RP81, RP12, RP22, RP32, RP42, RP52, RP62, RP72 and RP82 are interspersed between the described first input layer row electrode lines; The 4th input layer comprises the 4th input stratose electrode wires CP11, CP21, CP31, CP41, CP51, CP61, CP71, CP81, CP12, CP22, CP32, CP42, CP52, CP62, CP72 and CP82, and the 4th input stratose electrode wires CP11, CP21, CP31, CP41, CP51, CP61, CP71, CP81, CP12, CP22, CP32, CP42, CP52, CP62, CP72 and CP82 are interspersed between the second input stratose electrode wires; The lead-in wire of the lead-in wire of the first input layer row electrode lines, the second input stratose electrode wires all is provided with isolation resistance; Simultaneously, the 3rd input layer row electrode lines RP11, the lead-in wire of RP12 is connected on the lead-in wire RP1_DR after connecting an isolation resistance respectively jointly, the 3rd input layer row electrode lines RP21, the lead-in wire of RP22 is connected on the lead-in wire RP2_DR after connecting an isolation resistance respectively jointly, the 3rd input layer row electrode lines RP31, the lead-in wire of RP32 is connected on the lead-in wire RP3_DR after connecting an isolation resistance respectively jointly, the 3rd input layer row electrode lines RP41, the lead-in wire of RP42 is connected on the lead-in wire RP4_DR after connecting an isolation resistance respectively jointly, the 3rd input layer row electrode lines RP51, the lead-in wire of RP52 is connected on the lead-in wire RP5_DR after connecting an isolation resistance respectively jointly, the 3rd input layer row electrode lines RP61, the lead-in wire of RP62 is connected on the lead-in wire RP6_DR after connecting an isolation resistance respectively jointly, the 3rd input layer row electrode lines RP71, the lead-in wire of RP72 is connected on the lead-in wire RP7_DR the 3rd input layer row electrode lines RP81 after connecting an isolation resistance respectively jointly, the lead-in wire of RP82 is connected on the lead-in wire RP8_DR after connecting an isolation resistance respectively jointly; Equally, the 4th input stratose electrode wires CP11, the lead-in wire of CP12 is connected on the lead-in wire CP1_DR after connecting an isolation resistance respectively jointly, the 4th input stratose electrode wires CP21, the lead-in wire of CP22 is connected on the lead-in wire CP2_DR after connecting an isolation resistance respectively jointly, the 4th input stratose electrode wires CP31, the lead-in wire of CP32 is connected on the lead-in wire CP3_DR after connecting an isolation resistance respectively jointly, the 4th input stratose electrode wires CP41, the lead-in wire of CP42 is connected on the lead-in wire CP4_DR after connecting an isolation resistance respectively jointly, the 4th input stratose electrode wires CP51, the lead-in wire of CP52 is connected on the lead-in wire CP5_DR after connecting an isolation resistance respectively jointly, the 4th input stratose electrode wires CP61, the lead-in wire of CP62 is connected on the lead-in wire CP6_DR after connecting an isolation resistance respectively jointly, the 4th input stratose electrode wires CP71, the lead-in wire of CP72 is connected on the lead-in wire CP7_DR after connecting an isolation resistance respectively jointly, the 4th input stratose electrode wires CP81, the lead-in wire of CP82 is connected on the lead-in wire CP8_DR after connecting an isolation resistance respectively jointly; In addition, be interspersed with capable critical line RB1 between the first input layer piece RA1 and the first input layer piece RA2, be interspersed with row critical line CB1 between the second input layer piece CA1 and the second input layer piece CA2, row critical line RB1 is provided with lead-in wire RB1_DR, row critical line CB1 is provided with lead-in wire CB1_DR, and the lead-in wire of row critical line RB1 and row critical line CB1 is provided with isolation resistance.
When concrete the application, by first input layer, the first input layer piece RA1, the second input layer piece CA1 of the RA2 and second input layer, the stacked setting of CA2 formed the rectangle square formation, wherein, the first input layer piece RA1, the RA2 and the second input layer piece CA1, CA2 is divided into four big zones with touch panel, can pass through the first input layer piece RA1 when on touch panel, touching, the RA2 and the second input layer piece CA1, CA2 roughly judges the position at place, touch point, in addition, the 3rd input layer has the 3rd input layer row electrode lines RP11 that is interspersed in the first input layer row electrode lines, RP21, RP31, RP41, RP51, RP61, RP71, RP81, RP12, RP22, RP32, RP42, RP52, RP62, RP72, RP82, the 4th input layer has the 4th input stratose electrode wires CP11 that is interspersed in the second input stratose electrode wires, CP21, CP31, CP41, CP51, CP61, CP71, CP81, CP12, CP22, CP32, CP42, CP52, CP62, CP72, CP82, like this, when passing through the first input layer piece RA1, the RA2 and the second input layer piece CA1, after CA2 judges the approximate location at place, touch point, again by the 3rd input layer row electrode lines RP11, RP21, RP31, RP41, RP51, RP61, RP71, RP81, RP12, RP22, RP32, RP42, RP52, RP62, RP72, RP82 and the 4th input stratose electrode wires CP11, CP21, CP31, CP41, CP51, CP61, CP71, CP81, CP12, CP22, CP32, CP42, CP52, CP62, CP72, CP82 can judge the exact position of touch accurately.
In addition, in the structure of the present invention at the first input layer piece RA1, the lead-in wire of RA2, the second input layer piece CA1, the lead-in wire of CA2, the 3rd input layer row electrode lines RP11, RP21, RP31, RP41, RP51, RP61, RP71, RP81, RP12, RP22, RP32, RP42, RP52, RP62, RP72, the lead-in wire of RP82 and the 4th input stratose electrode wires CP11, CP21, CP31, CP41, CP51, CP61, CP71, CP81, CP12, CP22, CP32, CP42, CP52, CP62, CP72, all be provided with isolation resistance on the lead-in wire of CP82, difference can make the present invention carry out multiple point touching accurately like this, when not required.
Once more, be interspersed with capable critical line RB1 between the first input layer piece RA1 and the first input layer piece RA2, be interspersed with row critical line CB1 between the second input layer piece CA1 and the second input layer piece CA2, when the touch point is in critical localisation, can uniquely judge the institute touch point and be in critical localisation by row critical line RB1 and row critical line CB1.
Further, touch panel main control chip of the present invention is provided with CPU, pull-up resistor, comparer and CMOS pipe; Lead-in wire CA1_DR, the CA2_DR of lead-in wire RA1_DR, the RA2_DR of the first input layer row electrode lines, the second input stratose electrode wires, lead-in wire RP1_DR, RP2_DR, RP3_DR, RP4_DR, RP5_DR, RP6_DR, RP7_DR, RP8_DR, lead-in wire CP1_DR, CP2_DR, CP3_DR, CP4_DR, CP5_DR, CP6_DR, CP7_DR, CP8_DR, the lead-in wire RB1_DR of row critical line RB1 and the lead-in wire CB1_DR of row critical line CB1 all are provided with power connector end and signal connection end; After being connected in series a pull-up resistor, the power connector end of lead-in wire electrically connects with power supply; The signal connection end of lead-in wire is connected with the signal input part of described comparer, and the signal output part of comparer is connected with described cpu signal; The drain electrode of CMOS pipe is connected with the signal connection end signal of lead-in wire, and the control utmost point of CMOS pipe is connected with cpu signal, the source ground line of CMOS pipe.
The announcement of book and instruction according to the above description, those skilled in the art in the invention can also carry out suitable change and modification to above-mentioned embodiment.Therefore, the embodiment that discloses and describe above the present invention is not limited to also should fall in the protection domain of claim of the present invention modifications and changes more of the present invention.In addition, although used some specific terms in this instructions, these terms do not constitute any restriction to the present invention just for convenience of description.

Claims (2)

1. multipoint mode touch-screen comprises display unit, is positioned at touch panel, the touch panel main control chip that is connected with the touch panel signal on the described display unit and is attached to the scratch resistant plastic layer on touch panel surface;
Described touch panel comprises first input layer, second input layer, the 3rd input layer and the 4th input layer;
Described first input layer comprises the first input layer piece that plurality of parallel is provided with, and the first input layer piece comprises some interconnective first input layer row electrode lines; Described second input layer comprises the second input layer piece that plurality of parallel is provided with, and the second input layer piece comprises some interconnective second input stratose electrode wires; The stacked formation matrix that is provided with of the first input layer piece and the second input layer piece; The first input layer row electrode lines of described first input layer is provided with a lead-in wire jointly, and the second input stratose electrode wires of described second input layer is provided with a lead-in wire jointly;
Described the 3rd input layer comprises some the 3rd input layer row electrode lines, and described the 3rd input layer row electrode lines is interspersed between the described first input layer row electrode lines; Described the 4th input layer comprises some the 4th input stratose electrode wires, and described the 4th input stratose electrode wires is interspersed between the described second input stratose electrode wires; Described the 3rd input layer row electrode lines and described the 4th input stratose electrode wires all are provided with lead-in wire;
All be provided with isolation resistance on the lead-in wire of the lead-in wire of the lead-in wire of the described first input layer row electrode lines, the second input stratose electrode wires, the lead-in wire of the 3rd input layer row electrode lines and the 4th input stratose electrode wires;
It is characterized in that: also comprise capable critical line and row critical line, interspersed capable critical line between per two first adjacent input layer pieces, interspersed row critical line between per two second adjacent input layer pieces;
Described capable critical line and row critical line all are provided with lead-in wire, and the lead-in wire of described capable critical line and row critical line is provided with isolation resistance.
2. multipoint mode touch-screen according to claim 1 is characterized in that: described touch panel main control chip comprises CPU, pull-up resistor, comparer and CMOS pipe;
The lead-in wire of the lead-in wire of the described first input layer row electrode lines, the second input stratose electrode wires, the lead-in wire of the 3rd input layer row electrode lines, the lead-in wire of the 4th input stratose electrode wires, the lead-in wire of row critical line and the lead-in wire of row critical line all are provided with power connector end and signal connection end;
The power connector end of described lead-in wire electrically connects with power supply after being connected in series a pull-up resistor; The signal connection end of described lead-in wire is connected with the signal input part of described comparer, and the signal output part of described comparer is connected with described cpu signal;
The drain electrode of described CMOS pipe is connected with the signal connection end signal of described lead-in wire, and the control utmost point of described CMOS pipe is connected with described cpu signal, the source ground line of described CMOS pipe.
CN2011100759193A 2011-03-28 2011-03-28 Multi-point touch screen Pending CN102163114A (en)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62125946U (en) * 1986-01-28 1987-08-10
JPH05250085A (en) * 1992-03-04 1993-09-28 Mitsubishi Electric Corp Coordinate input device
CN101286107A (en) * 2008-05-27 2008-10-15 张文 Multi-point electric resistance touch screen
CN101907939A (en) * 2009-06-08 2010-12-08 万达光电科技股份有限公司 Microelectrode matrix and touch panel with same

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62125946U (en) * 1986-01-28 1987-08-10
JPH05250085A (en) * 1992-03-04 1993-09-28 Mitsubishi Electric Corp Coordinate input device
CN101286107A (en) * 2008-05-27 2008-10-15 张文 Multi-point electric resistance touch screen
CN101907939A (en) * 2009-06-08 2010-12-08 万达光电科技股份有限公司 Microelectrode matrix and touch panel with same

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Application publication date: 20110824