CN102161469A - Method for forming suspending object on monolithic substrate - Google Patents
Method for forming suspending object on monolithic substrate Download PDFInfo
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- CN102161469A CN102161469A CN2010101106876A CN201010110687A CN102161469A CN 102161469 A CN102161469 A CN 102161469A CN 2010101106876 A CN2010101106876 A CN 2010101106876A CN 201010110687 A CN201010110687 A CN 201010110687A CN 102161469 A CN102161469 A CN 102161469A
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Abstract
The invention discloses a method for forming a suspending object on a monolithic substrate. In the method, a silicon-based layer of the monolithic substrate is provided with a circuit layer consisting of at least one wet etching region, at least one circuit region and at least one microstructure region; and the wet etching region serves as a compartment of the circuit region and the microstructure region and extends downwards to the surface of the silicon-based layer so as to form an etching route of etching the silicon-based layer from above the substrate and then etching the upper surface and the lower surface of the silicon-based layer in a dry etching mode to suspend the microstructure region.
Description
Technical field
The present invention is relevant a kind of method that forms the suspension object on monocrystal substrate, especially refer to a kind of on the monocrystal substrate of an integration IC circuit and micro-structural, utilization is in conjunction with the dry-etching method of anisotropic and the technology of wet etching, and precisely discharges and suspend described micro-structural on monocrystal substrate.
Background technology
Along with the fast development of IC technology and the differentiation of the market demand, the integrated circuit of heterogeneity different process can be incorporated into gradually on the same wafer and finish, thereby the single-chip system that forms is compared with the system that used a plurality of wafers can reach via the routing engagement arrangement in the past, not only the IC production capacity is higher more stable, and the single-chip system of compact, power saving, high degree of integration also makes the market competition advantage of product improve much.
On the other hand, the single-chip system also can be applicable in the technology of integrating micromechanics, and microactuator suspension structure and IC is circuit integrated on single wafer.Wherein, CMOS-MEMS (CMOS-Compatible MEMS) integrates the technology that forms with semiconductor CMOS circuit technology and MEMS (MEMS), IC circuit and MEMS are incorporated on the silicon wafer with identical design interface, the silicon micromachining technology (silicon micromachining) that is aided with MEMS again, and on silicon wafer, produce the microactuator suspension structure of MEMS, make described microactuator suspension structure can produce mechanical movement.According to the order that MEMS and cmos circuit are made, its technology can be divided into (A): the etching process of MEMS structure is cooperated with IC technology, come out in the empty etching of laying or desire to etch below in the lump with the MEMS structure during etching IC circuit; And (B): earlier IC circuit and MEMS structure are incorporated on the wafer with identical design interface, then, on Silicon Wafer, produce the microactuator suspension structure with the silicon micromachining technology (silicon micromachining) of MEMS.Yet, above-mentioned (A) is though mode can be easy to etch the cavity of MEMS structure below, but it must foundries changes original processing step and cooperates MEMS technology, and it is with high costs, need more accurate calculating to increase the product yield, if not having a considerable amount of products, be to adopt foundries to make MEMS.
Therefore, most micro electronmechanical product is to use the post processing of above-mentioned (B) mode to make more, earlier micro electromechanical structure is stacked on the etched layer of one deck, processes discharges described MEMS structure again, does not need to be the new Silicon Wafer technology of specific micro electronmechanical product design one cover though its etched step is loaded down with trivial details; Simultaneously, with above-mentioned (A) mode by contrast, (B) mode of utilizing existing standardization CMOS technology be easier to the exploitation, also save many costs of manufacture.
Traditional engraving method is divided into two kinds: a kind of wet etching (wet etching) for using always, utilize chemical solution that etching is carried out in the particular chemical reaction of wafer; Another kind is dry-etching (dry etching), it typically is a kind of electric paste etching (plasma etching), utilizing the material of the ion pair wafer surface in the electricity slurry to clash into it is come off, can also be to utilize the chemical action of atom on living radical in the electricity slurry and the wafer to carry out etching.
Wet etching can find usually specially specific materials is carried out etching solution for etching (etchant), so, though wet etching is the isotropic etching (isotropic etching) that belongs to diffused, but, etch pattern on the wafer so can utilize the light shield of wafer top layer special substance to be arranged on because etching solution has selectivity to material; Yet because etched mode still is an isotropic etching, its etched depth-to-width ratio is not high usually.
Because the etching mode of dry-etching method is to utilize the bump power of ion to reach etched effect, so anisotropic etching (anisotropic etching) that the dry-etching method can travel direction, and its depth-to-width ratio can reach 5: 1 above degree of depth, or even uses deep reaction ion(ic) etching (Deep RIE) and reach depth-to-width ratio up to 30: 1.
Therefore, when etching in tradition (B) mode more than five times the suspension object structure of depth-to-width ratio, be mostly the reactive ion etching method that adopts dry type (reactive ion etching, RIE), to reach the bigger unidirectional of depth-to-width ratio (anisotropic) etching purpose.People's such as Zhao the U.S. the 6th, 712, No. 983 the patent case has disclosed a kind of two stage dry-etching methods, shown in Fig. 4 A-4B, it is to be shade (as 4B figure) with the photoresist layer a2 above the circuit layer a1 earlier, unidirectional etches the two-dimensional pattern of micro-structural a 0, and the silicon base layer a 3 (shown in Fig. 4 C) under its etch depth is through, again with the silicon base layer a3 (as Fig. 4 D) below the described micro-structural a0 of dry ecthing mode (semi-anisptropic etch) etching of half anisotropic, further the silicon base layer a3 of micro-structural a0 below is etched a cavity again in iso dry ecthing mode at last, and discharge and the described micro-structural a0 that suspends (shown in Fig. 4 D-4F).Yet though the 6th, 712, No. 983 patent cases of the above-mentioned U.S. can etch the high micro-structural of depth-to-width ratio, its processing step is loaded down with trivial details and technological requirement is harsh, consuming time taking a lot of work, and can't precisely etch empty size and the shape in microstructured area below; In addition, shown in Fig. 5 A-5C, it is after etching finishes and finishes the encapsulation of described single-chip, in the time will separating each micro-structural a0, must behind cutting cap a4, carry out an etching again, this not only increases the complexity and the cost of technology, and this technology also need be done detailed considering and calculating at the mechanical structure of micro-structural.
Though the dry-etching method can reach higher depth-to-width ratio, but its etch-rate is higher much smaller than the cost that Wet-type etching and its took, and when the size of micro electromechanical structure changes, new dry-etching flow process, component ratio, etching period or the like be must test again, and development time and the human and material resources and the material cost of micro electronmechanical wafer significantly increased.
In view of this, how can be in conjunction with the advantage of the high-aspect-ratio of quick and cheap etching mode of Wet-type etching and dry-etching, simplifying and to accelerate technology, and reduce and make and material cost, long-pending experience and the constantly research and development improvement for many years of inventor has generation of the present invention then.
Summary of the invention
Main purpose of the present invention is providing a kind of method that forms the suspension object on monocrystal substrate, wherein said monocrystal substrate is made up of the circuit layer of a silicon base layer and described silicon base layer top, has at least one Wet-type etching district in the described circuit layer, at least one circuit region and at least one microstructured area, described Wet-type etching district is arranged between circuit region and the microstructured area, and down extend to the surface of silicon base layer, can be when discharging described microstructured area, remove material in the Wet-type etching district in the mode of wet etching, to form etched path for etching silicon basic unit, then in the dry ecthing mode of anisotropic, via described etched path the silicon base layer bottom the Wet-type etching district is etched to a predetermined etch depth, then the silicon base layer to the microstructured area below carries out the dry ecthing of anisotropic, forms the suspension object on monocrystal substrate to discharge described microstructured area.
Another object of the present invention is providing a kind of method that forms the suspension object on monocrystal substrate, the circuit layer of wherein said monocrystal substrate is to have a plurality of circuit regions and a plurality of Wet-type etchings district, and described Wet-type etching district is the border that is arranged at circuit region, to separate described a plurality of circuit region, can be when forming the suspension object, between described a plurality of circuit regions, form the through hole that separates each circuit region, after finishing in the cap encapsulation, directly the position between each circuit region is cut described a plurality of cap and is separated each circuit region.
Another object of the present invention by the etched mode in behind, etches needed microstructured area thickness in that a kind of method that forms the suspension object on monocrystal substrate is being provided, and with the structural strength of reinforcement microstructured area, and increases its performance sensitivity and reliability.
In order to achieve the above object, the set a kind of method that forms the suspension object on monocrystal substrate of the present invention is to comprise the following steps:
(a) provide a monocrystal substrate, its circuit layer by a silicon base layer and described silicon base layer top is formed, and have at least one Wet-type etching district in the described circuit layer, and described Wet-type etching district is the surface that extends to described silicon base layer;
(b) remove material in the Wet-type etching district in the mode of wet etching, until described silicon base layer;
(c) in the dry ecthing mode of anisotropic, the silicon base layer bottom the Wet-type etching district is carried out etching, to a predetermined etch depth; And
(d) remove silicon base layer partly, the predetermined etch depth position in step (c) from described monocrystal substrate lower surface.
For further understanding the present invention, below lift preferred embodiment, cooperates graphic, figure number, with concrete constitution content of the present invention and the effect reached describes in detail as after:
Description of drawings
Figure 1A-1F forms the partial cutaway schematic of monocrystal substrate described in the method for suspension object on monocrystal substrate for the present invention;
Fig. 2 A forms another partial cutaway schematic of monocrystal substrate described in the method for suspension object on monocrystal substrate for the present invention;
Fig. 2 B-2C is the step schematic diagram of embodiment when separating each microcomputer electric component of Fig. 2 A;
Fig. 3 forms another partial cutaway schematic of monocrystal substrate described in the method for suspension object on monocrystal substrate for the present invention;
Fig. 4 A-4F has the step schematic diagram that forms the method for suspension object on monocrystal substrate now;
Fig. 5 A-5C has the step schematic diagram that separates when respectively suspending object now on monocrystal substrate.
Description of reference numerals: 1-monocrystal substrate; The 1a-microstructured area; The 1b-circuit region; 1c-Wet-type etching district; The 1e-microcomputer electric component; The 101-silicon base layer; The 10-circuit layer; 11a, 11b, 11c, 11d-non-metallic layer; 12a, 12b, 12c-metal level; The 13-metal vias; 14-locatees metal level; The 15-on-metallic protective coating; The 16-etched channels; The 2-cap; The 3-etchant resistive layer; D-etch depth position; A 0-has micro-structural now; A1-available circuit layer; A2-has photoresist layer now; A 3-has silicon base layer now.
The specific embodiment
See also Figure 1A-1F, it is the present invention forms the suspension object on monocrystal substrate a method, is to comprise the following steps:
(a) provide a monocrystal substrate 1, its circuit layer 10 by a silicon base layer 101 and described silicon base layer top is formed, has at least one Wet-type etching district 1c in the described circuit layer 10, and described Wet-type etching district 1c is the surface that down extends to silicon base layer 101, be with the main material of metal in this embodiment, but therefore do not limit the material of described Wet-type etching district 1c as described Wet-type etching district 1c;
(b) remove metal in the Wet-type etching district 1c in the mode of wet etching, until described silicon base layer 101;
(c) in the dry ecthing mode of anisotropic, silicon base layer 101 to Wet-type etching district 1c bottom carries out etching, to a predetermined etch depth d, be the effect of reinforced bottom dry ecthing in addition, form that the material of metope is an oxide around the described Wet-type etching district 1c, can make the silicon (Si) in the bottom silicon basic unit 101 have higher ion activity reaction; And
(d) remove silicon base layer 101 partly, the predetermined etch depth d position in step (c) from described monocrystal substrate 1 lower surface.
Shown in Figure 1A, it is the partial cutaway schematic of monocrystal substrate 1 described in the above-mentioned steps (a), described monocrystal substrate 1 is made with CMOS monocrystalline (CMOS) standard technology, on a silicon base layer 101 respectively with lithography process, depositing operation and etch process alternately form described circuit layer 10, described circuit layer 10 is to comprise a plurality of non-metallic layers that are staggeredly stacked (as silica) 11a, 11b, 11c, 11d and metal level 12a, 12b, 12c, described top layer non-metallic layer 11d is formed on the top layer metallic layer 12c, and non-metallic layer 11a, 11b, be provided with a plurality of among the 11c for connecting upward lower metal layer 12a, 12b, the metal vias of 12c (via) 13.
Described Wet-type etching district 1c mainly is in order to carve out the required external form of described microstructured area 1a, with most MEMS micro-structural, also have part to be connected between described microstructured area 1a and described circuit region 1b and etched away fully, make described microstructured area 1a after finishing upper and lower etching, still be suspended on the described monocrystal substrate 1.If the slight movement of described microstructured area 1a in described monocrystal substrate 1 is to learn by the capacitance variations between described microstructured area 1a and the described circuit region 1b, it is relative across described Wet-type etching district 1c each other with metal level among the described circuit region 1b also can be provided with the number of metal floor among the then described microstructured area 1a, so just can learn distance between described microstructured area 1a and the described circuit region 1b as long as measure voltage change between described two metal levels.Voltage on the metal level among the described microstructured area 1a also can measure by the part conducting that is connected between described microstructured area 1a and described circuit region 1b.
Shown in Figure 1B, follow mode with wet etching, utilize metal etch liquid that location metal level 14 and Wet-type etching district 1c are carried out metal etch, to remove the metal material that piles up in location metal level 14 and the described a plurality of Wet-type etchings district 1c, until described silicon base layer 101, to expose the part of described silicon base layer 101 upper surfaces to the open air.Thus,, form an etched channels 16 for the described silicon base layer 101 of etching, and define the shape of microstructured area 1a because of etched circuit floor 10 left cavity in Wet-type etching district 1c.Described a plurality of non-metallic layer 11a, 11b, 11c can be made of oxides such as silica, when avoiding the metal wet etching, other structure divisions are come to harm.
Shown in Fig. 1 C, follow anisotropic Deep Reaction ion(ic) etching (DRIE) mode with dry type, via the etched channels 16 of before having punched etching is carried out in silicon base layer 101 positions of Wet-type etching district 1c bottom, be etched to a predetermined etch depth position d by controlling the etched time.After etching is finished, with the top of the described microstructured area 1a of a cap 2 encapsulation, and at silicon base layer 101 lower surfaces silicon base layer 101 is carried out attenuate in the mode of disc sharpener and process, make reduced thickness to a predetermined thickness (shown in Fig. 1 D) of silicon base layer 101.
Then, shown in Fig. 1 E, the position of the described relatively circuit region 1b of silicon base layer 101 lower surfaces after thinning forms an etchant resistive layer 3, continue anisotropic Deep Reaction ion(ic) etching mode again with dry type, from the lower surface of silicon base layer 101 silicon base layer 101 below microstructured area 1a and the Wet-type etching district 1c is carried out the dry ecthing of anisotropic, up to the above-mentioned described etch depth position d of etching, to discharge described microstructured area 1a.Because described microstructured area 1a still not still linked with circuit region 1b by etched coupling part, makes described microstructured area 1a form the suspension object on monocrystal substrate 1.Moreover, above-mentioned silicon base layer 101 lower surfaces are carried out in the etched step, can also the mode with wet etching carry out etching according to technological design to silicon base layer 101 lower surfaces.At last, encapsulate (shown in Fig. 1 F) with the lower position of 2 pairs of silicon base layers of another cap, 101 relative microstructured area 1a again.In above-mentioned encapsulation step, the material of described a plurality of caps 2 is to comprise glass, silicon or plastic cement.
See also Fig. 2 A, foregoing circuit district 1b, microstructured area 1a and Wet-type etching district 1c constitute a microcomputer electric component 1e, and have a plurality of described microcomputer electric component 1e on the described monocrystal substrate 1.Wherein, be provided with Wet-type etching district 1c between the circuit region 1b of adjacent microcomputer electric component 1e, to separate the circuit region 1b of adjacent microcomputer electric component 1e as above-mentioned microstructured area 1a edge; The top of described Wet-type etching district 1c is provided with a metal alignment layers 14, with when above-mentioned wet etch step is carried out, remove location metal level 14 on the described Wet-type etching district 1c and interior laminated metal part thereof simultaneously, when the step of microactuator suspension structural area 1a is finished, only need the position between each microcomputer electric component 1e to cut the packaged cap 2 of described monocrystal substrate 1 upper and lower, can separate each microcomputer electric component 1e (shown in 2B, 2C figure) fast.In addition, also can on each the microcomputer electric component 1e on the monocrystal substrate 1, be provided with a location metal level 14, as shown in Figure 3, and be provided with Wet-type etching district 1c between each microcomputer electric component 1e as above-mentioned microstructured area 1a edge, with when carrying out above-mentioned wet etch step, remove the laminated metal part in described location metal level 14 and each the Wet-type etching district 1c simultaneously, when the step of microactuator suspension structural area 1a is finished, only need the position between each microcomputer electric component 1e to cut the packaged cap 2 of described monocrystal substrate 1 upper and lower, can separate each microcomputer electric component 1e fast.
Therefore, the present invention has following advantage:
1. the present invention is the step that can be simplified in microactuator suspension structure on the monocrystal substrate, and effectively shortens the time of technology, to reduce manufacturing cost, makes its made microcomputer electric component possess higher price competitiveness.
2. the present invention integrates the engraving method of wet type and dry type, except utilizing Wet-type etching to etch the vertical stratification shape of microstructured area exactly in the Wet-type etching district, and precisely etch the silicon base layer structure of microstructured area bottom in the mode of dry type DRIE, can in technology, control the precision of etched progress and manufactured goods really, to keep the yield of product.
3. the present invention can be by the silicon base layer structure of described microcomputer electric component below, the back that suspends, and the structure of strengthening microcomputer electric component also prevents its deformation, obtaining bigger rigidity, and increases its durability and sensitivity.
4. the present invention can etch required microcomputer electric component thickness by adjusting the etching period of dry type DRIE, allows the user come the choice structure layer thickness according to the needs in its design, to increase the practicality of technology.
5. the technology that dried wet etching of the present invention is integrated is simple, and the technology of light shield that need not be extra, exposure and development, and process repeatability height can be applicable on the single wafer of the microcomputer electric component that has multiple kenel simultaneously and control circuit.
In sum, according to the content that is above disclosed, the present invention really can reach the intended purposes of invention, a kind of technology that can integrate dried wet etching is provided, to simplify and to accelerate the technology of microcomputer electric component, and be accurately to form the micro-structural that suspends on the monocrystal substrate, have the value of utilizing on the industry, application for a patent for invention is proposed in accordance with the law.
More than explanation is just illustrative for the purpose of the present invention, and nonrestrictive, those of ordinary skills understand; under the situation of the spirit and scope that do not break away from following claims and limited, can make many modifications, change; or equivalence, but all will fall within the scope of protection of the present invention.
Claims (18)
1. method that forms the suspension object on monocrystal substrate is characterized in that it comprises:
(a) provide a monocrystal substrate, its circuit layer by a silicon base layer and described silicon base layer top is formed, and have at least one Wet-type etching district in the described circuit layer, and described Wet-type etching district is the surface that extends to silicon base layer;
(b) remove material in the Wet-type etching district in the mode of wet etching, until described silicon base layer;
(c) in the dry ecthing mode of anisotropic, the silicon base layer bottom the Wet-type etching district is carried out etching, to a predetermined etch depth; And
(d) remove silicon base layer partly, the predetermined etch depth position in step (c) from described monocrystal substrate lower surface.
2. the method that forms the suspension object on monocrystal substrate according to claim 1 is characterized in that in step (a), described Wet-type etching district is piled up by multiple layer metal floor and a plurality of metal vias to form.
3. the method that forms the suspension object on monocrystal substrate according to claim 1 is characterized in that in step (a), the depth-to-width ratio in described Wet-type etching district is greater than 3: 1.
4. the method that forms the suspension object on monocrystal substrate according to claim 1 is characterized in that, is made with CMOS monocrystalline standard technology at monocrystal substrate described in the step (a).
5. the method that on monocrystal substrate, forms the suspension object according to claim 1, it is characterized in that, in step (a), described circuit layer has at least one circuit region and at least one microstructured area, and described Wet-type etching district is arranged between described circuit region and the described microstructured area.
6. the method that forms the suspension object on monocrystal substrate according to claim 5 is characterized in that, described circuit region is that part links to each other with described microstructured area.
7. the method that forms the suspension object on monocrystal substrate according to claim 5 is characterized in that, above the part of the Wet-type etching district between described circuit region and the microstructured area is covered in microstructured area.
8. the method that forms the suspension object on monocrystal substrate according to claim 5 is characterized in that described step (c) more comprises the following steps: to encapsulate the top of described at least one microstructured area with a cap after etching is finished.
9. the method that forms the suspension object on monocrystal substrate according to claim 5 is characterized in that described step (d) more comprises the following steps: the mode with the anisotropic dry-etching, removes the silicon base layer of microstructured area and Wet-type etching district below.
10. the method that on monocrystal substrate, forms the suspension object according to claim 5, it is characterized in that, described step (d) more comprises the following steps: the thickness of elder generation with the mode attenuate silicon base layer of polishing, removes the silicon base layer of microstructured area and below, Wet-type etching district again in etched mode.
11. the method that forms the suspension object on monocrystal substrate according to claim 10 is characterized in that the etching mode of described step (d) is dry-etching or Wet-type etching.
12. the method that on monocrystal substrate, forms the suspension object according to claim 5, it is characterized in that, described step (d) more comprises the following steps: to encapsulate the lower position of the described relatively at least one microstructured area of described silicon base layer with a cap after etching is finished.
13. the method that on monocrystal substrate, forms the suspension object according to claim 5, it is characterized in that in step (a), described circuit layer is to have a plurality of circuit regions and a plurality of Wet-type etchings district, and described Wet-type etching district is the border that is arranged at circuit region, to separate described a plurality of circuit region.
14. the method that forms the suspension object on monocrystal substrate according to claim 13 is characterized in that, is the top that part is covered in circuit region in order to the Wet-type etching district that separates described a plurality of circuit regions in step (a).
15. the method that forms the suspension object on monocrystal substrate according to claim 13 is characterized in that described step (c) more comprises the following steps: to encapsulate the top of described monocrystal substrate with a cap after etching is finished.
16. the method that forms the suspension object on monocrystal substrate according to claim 13 is characterized in that described step (d) more comprises the following steps: to encapsulate the below of described monocrystal substrate with a cap after etching is finished.
17., it is characterized in that the material of described cap is to comprise glass, silicon or plastic cement according to claim 15 or the 16 described methods that on monocrystal substrate, form the suspension object.
18. the method that forms the suspension object on monocrystal substrate according to claim 1 is characterized in that in step (c), described anisotropic dry ecthing is the Deep Reaction ion(ic) etching.
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| CN107777658A (en) * | 2016-08-27 | 2018-03-09 | 深圳市诺维创科技有限公司 | A kind of method of back side deep reactive ion etch |
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| US20070120445A1 (en) * | 2005-11-30 | 2007-05-31 | Samsung Electronics Co., Ltd. | Piezoelectric RF MEMS device and method of fabricating the same |
| CN101434376A (en) * | 2007-11-16 | 2009-05-20 | 微智半导体股份有限公司 | Method for manufacturing suspension micro electromechanical structure |
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