CN102157441A - Method for manufacturing composite covering layer - Google Patents
Method for manufacturing composite covering layer Download PDFInfo
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- CN102157441A CN102157441A CN2011100492962A CN201110049296A CN102157441A CN 102157441 A CN102157441 A CN 102157441A CN 2011100492962 A CN2011100492962 A CN 2011100492962A CN 201110049296 A CN201110049296 A CN 201110049296A CN 102157441 A CN102157441 A CN 102157441A
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Abstract
The invention discloses a method for manufacturing composite covering layer, comprising the steps of providing a substrate and forming a composite covering layer on the surface of the substrate. The composite covering layer at least comprises a first covering layer and a second covering layer formed on the first covering layer. A patterned metal hard mask layer is formed on the surface of the composite covering layer, and an etching process is performed; the patterned metal hard mask layer etches the composite covering layer to form at least one opening in the second covering layer.
Description
The application is to be dividing an application of on April 25th, 2007 and No. 200710101861.9 application for a patent for invention that is entitled as " composite coating and preparation method thereof " applying date.
Technical field
The present invention relates to a kind of composite coating and preparation method thereof, refer to a kind of composite coating that is used for inlaying inner connecting line technology and preparation method thereof especially.
Background technology
The inlaying inner connecting line technology is the major technique of multi-metal intra-connection (multi-levelinterconnects) in the present integrated circuit, the main production method of copper conductor in the present semi-conductor industry of also can saying so, it can generally be divided into singly inlays (single damascene) technology and dual damascene (dual damascene) technology.Wherein dual-damascene technics be because of can reducing processing step, reduce contact resistance between lead and connector, promote advantage such as reliability, and significantly is used in the inlaying inner connecting line technology.In addition, for reducing the resistance value and the parasitic capacitance effect of metal interconnecting, to increase the signal transmission speed, existing dual-damascene technics is the double-mosaic pattern that etches have groove (trench) and fairlead (via) in low dielectric (low-K) dielectric layer that material constituted mostly, insert copper metal and in addition planarization again, and then finish the making of metal interconnecting.Distinguish according to the mode of etched pattern in dielectric layer, dual-damascene technics can be subdivided into preferential (trench-first) technology of groove, fairlead preferential (via-first), preferential (partial-via-first) technology of part fairlead again again and aim at (self-aligned) technology etc. voluntarily.
See also Fig. 1 to Fig. 5, Fig. 1 to Fig. 5 is the schematic diagram of the known preferential dual-damascene technics of groove.As shown in Figure 1, at first provide substrate 10, have conductive layer 12 on it, then have the bottom 14 that constitutes by silicon nitride (silicon nitride) on the conductive layer 12.Has ultralow dielectric (ultra low-K on the bottom 14 in regular turn, be designated hereinafter simply as ULK) layer 16, cover layer (cap layer) 18, metal hard mask layer (metal hard mask) 20 and antireflection bottom (bottom anti-reflective coating, BARC) 22.Subsequently, on anti-reflecting layer 22, form photoresist layer 30, and utilize known photoetching technique to form opening 32, in order to define the channel patterns of inlaying lead.
See also Fig. 2.Then carry out etch process, up to cover layer 18, form groove recess 34 thus via the opening 32 etching metal mask layers 20 of photoresist layer 30.Then, remove remaining photoresist layer 30 and bottom anti-reflection layer 22.
Next see also Fig. 3.Another anti-reflecting layer 36 of deposition in substrate 10, and anti-reflecting layer 36 fills up groove recess 34.Then, form another photoresist layer 40 again on anti-reflecting layer 36, and utilize known photoetching technique to form opening 42, its position is just directly over groove recess 34, in order to define the fairlead pattern of inlaying lead.And as shown in Figure 4, utilize photoresist layer 40 as etch hard mask, and carry out etch process, via opening 42 etching anti-reflecting layers 36, cover layer 18 and ULK layer 16, form part fairlead 44 at ULK layer 16 first half thus.Then, utilize modes such as oxygen gas plasma to remove remaining photoresist layer 40 and anti-reflecting layer 36.
As shown in Figure 5, next, utilize metallic mask layer 20, carry out etch process as etch hard mask, cover layer 18 and ULK layer 16 that etching is not downwards covered by metallic mask layer 20, the groove recess 34 and the part fairlead 44 that will before form thus are transferred in the ULK layer 16.Etching bottom 14 again, have the double-mosaic pattern 50 of groove and fairlead with formation, and it comprises groove opening 52 and fairlead opening 54.
In general, cover layer 18 is a silica layer, for example with the TEOS silica layer of tetraethyl oxosilane (tetraethylorthosilicate is designated hereinafter simply as TEOS) as the presoma gained.This TEOS silica layer has compression stress (compressive stress), when this compression stress directly puts on the ULK layer 16 of its following tool low mechanical strength (mechanical strength) and tensile stress (tensile stress), will cause the situation that circuit distortion (line distortion) takes place in the ULK layer 16.In addition, because the TEOS silica layer very easily adsorbs aqueous vapor, and the aqueous vapor of being adsorbed by the TEOS silica layer is after the subsequent technique desorption comes out, enter ULK layer 16 easily and cause the effect of Kai Shi hole opening (Kelvin via open) within it, reduce the stability of technology, even influence the electricity performance of the metal interconnecting of follow-up formation.
Summary of the invention
Therefore, the present invention provides a kind of composite coating and preparation method thereof that utilizes in this, can effectively reduce the problem that the distortion of circuit in the ULK layer (line distortion) and Kai Shi hole produce.
According to claim of the present invention, the manufacture method of a kind of composite coating (multi cap layer) is provided, this method includes provides the substrate that includes conductive layer, bottom and dielectric layer at least, form composite coating at this substrate surface.This composite coating includes first cover layer at least and is formed at this first supratectal second cover layer.Next form the metal hard mask layer (metal hard mask layer) of patterning on this composite coating surface, and carry out etch process, via this composite coating of metal hard mask layer etching of this patterning, and in this second cover layer, form at least one opening.
According to claim of the present invention, other provides a kind of manufacture method of composite coating.This method includes provides the substrate that includes conductive layer, bottom and dielectric layer at least, and forms composite coating at this substrate surface.This composite coating includes tensile stress layer and first protective layer (protecting layer) at least, and the thickness of this tensile stress layer is greater than the thickness of this first protective layer.
According to claim of the present invention, a kind of composite coating is provided, include first protective layer and tensile stress layer.The thickness of this tensile stress layer is greater than the thickness of this first protective layer.
According to claim of the present invention, a kind of composite coating more is provided, include first protective layer, be arranged at the tensile stress layer on this first protective layer and be arranged at second protective layer on this tensile stress layer.
The composite coating and preparation method thereof that utilizes provided by the present invention; utilize composite coating that stress with respect to its anterior layer is provided; the distortion that causes of ply stress before avoiding utilizes the protective layer of composite coating to avoid the adsorbed aqueous vapor of anterior layer to come out and the Kai Shi hole opening that forms at the subsequent technique desorption simultaneously.
Description of drawings
Fig. 1 to Fig. 5 is the schematic diagram of the known preferential dual-damascene technics of groove.
Fig. 6 to Figure 11 is first preferred embodiment of the manufacture method of composite coating provided by the present invention.
Figure 12 is the comparison diagram according to the formed mosaic texture rate of finished products of composite coating provided by the present invention.
Figure 13 is the comparison diagram of hole for the influence of mosaic texture rate of finished products.
Figure 14 to Figure 17 is second preferred embodiment of the manufacture method of composite coating provided by the present invention.
Description of reference numerals
10 substrates, 12 conductive layers
14 bottoms, 16 ultralow dielectric number of plies layers
18 cover layers, 20 metallic mask layer
22 antireflection bottoms, 30 photoresist patterns
32 groove opening, 34 groove recesses
36 antireflection bottoms, 40 photoresist patterns
42 fairlead openings, 44 part fairleads
50 double-mosaic patterns, 52 groove opening
54 fairlead openings
100 substrates, 102 conductive layers
104 bottoms, 106 dielectric layers
110 composite coatings, 112 first cover layers
114 second cover layers, 120 metal hard mask layer
122 openings, 124 fairleads or groove
130 antireflection bottoms, 132 photoresist layers
134 openings, 136 part fairleads
150 double-mosaic patterns, 152 groove opening
154 fairlead openings
200 substrates, 202 conductive layers
204 bottoms, 206 dielectric layers
210 composite coatings, 212 first cover layers
214 second cover layers 216 the 3rd cover layer
220 hard mask layers, 222 openings
Embodiment
See also Fig. 6 to Figure 11, Fig. 6 to Figure 11 is first preferred embodiment of the manufacture method of composite coating provided by the present invention.As shown in Figure 6, at first provide substrate 100, have conductive layer 102 on it, then have the bottom 104 that constitutes by silicon nitride on the conductive layer 102.Be formed with dielectric layer 106 on the bottom 104.Dielectric layer 106 includes the ULK dielectric material, has tensile stress simultaneously, and this tensile stress is about 30 to 80 Megapascals (mega Pascal is designated hereinafter simply as MPa).
See also Fig. 7.Next utilize depositing operation on dielectric layer 106, to form first cover layer 112 and second cover layer, 114, the first cover layers 112 and second cover layer 114 respectively as a composite coating 110.This depositing operation is to utilize plasma enhanced chemical vapor deposition (plasma-enhancedchemical vapor deposition, be designated hereinafter simply as PECVD) technology, subatmospheric chemical vapour deposition (CVD) (sub-atmosphere chemical vapor deposition, being designated hereinafter simply as SACVD) technology or low pressure gas phase deposition (low pressure chemical vapor deposition is designated hereinafter simply as LPCVD) implemented.And the depositing operation that forms first cover layer 112 and second cover layer 114 can utilize coordination (in-situ) mode to carry out.Can feed silicomethane (silane, SiH simultaneously in this depositing operation
4), TEOS, tetramethylsilane (tetra-methyl silane, be designated hereinafter simply as 4MS), tetramethyl-ring tetrasiloxane (tetra-methyl cyclo tetra-siloxane, be designated hereinafter simply as TMCTS), diethoxymethyl silane (diethoxy-methyl-silane, be designated hereinafter simply as DEMS) or other silicon-containing compounds as presoma (precursor), and with carbon dioxide (CO
2), nitrous oxide (N
2O), oxygen (O
2), ozone (O
3) wait oxidant (oxidizing agents) as first cover layer 112 and second cover layer 114.Before this external formation first cover layer 112 and second cover layer 114, this first preferred embodiment also can utilize helium (He), argon gas (Ar), nitrogen (N
2), ammonia (NH
3), CO
2, or O
2Carry out pre-treatment (pre-treatment); Perhaps can be again with identical component after forming first cover layer 112 and second cover layer 114, respectively first cover layer 112 and second cover layer 114 are carried out reprocessing (post-treatment).
It should be noted that tensile stress TEOS layer has is about 50 to 100MPa tensile stress, and this airtight TEOS layer has and is about-150 to-300MPa compression.
See also Fig. 8.Next be the hard mask layer that forms patterning on composite coating 110 surfaces, as the metal hard mask layer (metal hard mask layer) 120 of patterning.In addition, also can on metal hard mask layer 120, form the antireflection bottom again.And carry out etch process, and seeing through the metal hard mask layer 120 etching composite coatings 110 of patterning, and in second cover layer 114, form at least one opening 122, opening 122 is in order to fairlead opening or groove opening as mosaic texture.Can and aim at technological requirement such as (self-aligned) technology voluntarily according to preferential (trench-first) technology of groove, fairlead preferential (via-first), preferential (partial-via-first) technology of part fairlead subsequently, carry out subsequent technique, to obtain mosaic texture.As in this first preferred embodiment, opening 122 is in order to as the groove opening in the preferential dual-damascene technics of groove.
See also Fig. 9.Follow process deposition of antiglare layer 130 in substrate 100, and anti-reflecting layer 130 fills up opening 122.Then, form photoresist layer 132 again on anti-reflecting layer 130, and utilize the well known photolithography technology to form opening 134, its position is just in time directly over opening 122, in order to define the fairlead pattern of inlaying lead.And as shown in figure 10, utilize photoresist layer 132 as etching mask, and carry out etch process subsequently, via opening 134 etching anti-reflecting layers 130, composite coating 110 and ULK layer 106, form part fairlead 136 at ULK layer 106 first half thus.Then, utilize modes such as oxygen gas plasma to remove remaining photoresist layer 132 and anti-reflecting layer 130.
See also Figure 11.Next, utilize metallic mask layer 120 as etch hard mask, carry out etch process, composite coating 110 and ULK layer 106 that etching is not downwards covered by metallic mask layer 120, the opening 122 and the part fairlead 136 that will before form thus are transferred in the ULK layer 106.Etching bottom 104 again, have the double-mosaic pattern 150 of groove and fairlead with formation, and it comprises groove opening 152 and fairlead opening 154.
See also Figure 12 and Figure 13, Figure 12 is the comparison diagram according to the formed mosaic texture electricity performance of composite coating provided by the present invention; And Figure 13 is the comparison diagram of Kai Shi hole opening for mosaic texture electricity performance influence.In Figure 12 and Figure 13, number the tectal mosaic texture of individual layer TEOS that 3～No. 6 chip includes in the known technology to be adopted; The formed mosaic texture of bilayer (bi-layer) composite coating that is provided according to this first preferred embodiment then is provided the chip of numbering 7～No. 9.The composite coating 110 that is provided according to this first preferred embodiment, the compression that second cover layer 114 (being airtight TEOS layer) provides, cushion the distortion that causes so can avoid directly influencing dielectric layer 106 by first cover layer 112 (being tensile stress TEOS layer) as one.The aqueous vapor that is produced in the etch process can block by second cover layer 114 (being airtight TEOS layer) simultaneously, is difficult for being absorbed by first cover layer 112.Therefore as Figure 12 and shown in Figure 13, the electricity of the mosaic texture of composite coating 110 gained that provided according to first preferred embodiment shows and can significantly promote.
Next, see also Figure 14 to Figure 17, Figure 14 to Figure 17 is second preferred embodiment of the manufacture method of composite coating provided by the present invention, and in like manner the composite coating that provided of this second preferred embodiment also is used for inlaying inner connecting line technology.As shown in figure 14, at first provide substrate 200, have conductive layer 202 on it, then have the bottom 204 that constitutes by silicon nitride on the conductive layer 202.Be formed with dielectric layer 106 on the bottom 204.106 of dielectric layers include the ULK material, and have and be about 30 to 80MPa tensile stress.
See also Figure 15.Next utilize depositing operation on dielectric layer 206, to form first cover layer 212 and second cover layer 214 respectively; first cover layer 212 is as first protective layer (protecting layer), and first cover layer 212 and second cover layer 214 are as composite coating 210.This depositing operation includes pecvd process, SACVD technology or LPCVD.And the depositing operation that forms first cover layer 212 and second cover layer 214 utilizes coordination (in-situ) mode to carry out.Can feed silicomethane (SiH in this depositing operation simultaneously
4), material such as TEOS, 4MS, TMCTS or DEMS is as presoma, and with CO
2, N
2O, O
2, O
3In oxidant as first cover layer 212 and second cover layer 214.Before this external formation first cover layer 212 and second cover layer 214, this second preferred embodiment also can utilize He, Ar, N
2, NH
3, CO
2, or O
2Carry out pre-treatment; Perhaps can be again with identical component to after forming first cover layer 212 and second cover layer 214, respectively first cover layer 212 and second cover layer 214 are carried out reprocessing.
See also Figure 16.According to second preferred embodiment provided by the present invention, more can after forming second cover layer 214, form the 3rd cover layer 216 thereon again, as second protective layer.The 3rd cover layer 216 is also for utilizing depositing operation, be formed at airtight TEOS layer on second cover layer 214 as pecvd process, SACVD technology or LPCVD technology, and the high frequency radio wave power that uses in this depositing operation is for being about 230 to 330 watts, low frequency radio wave power is about 10 to 100 watts, and the 3rd cover layer 216 has and is about-150 to-300Mpa compression.And in order to form first cover layer 212, second cover layer 214, can utilize the coordination mode to carry out with the depositing operation of the 3rd cover layer 216.In addition, the 3rd cover layer 216 has thickness Z.Thickness Y that it should be noted that second cover layer 214 is greater than the summation of the thickness Z of the thickness X of first cover layer 212 and the 3rd cover layer 216.The thickness Y of the thickness X of first cover layer 212, second cover layer 214, with the ratio of the thickness Z of the 3rd cover layer 216 be 1: 2: 1 to 1: 10: 1, and preferable with 1: 3: 1.
See also Figure 17.As previously mentioned, next be the mask layer 220 that forms patterning on composite coating 210 surfaces, as silicon nitride, silica or the metal hard mask layer of patterning.In addition, also can on hard mask layer 220, form the antireflection bottom again.And carry out etch process, see through the hard mask layer 220 etching composite coatings 210 of patterning, and in second cover layer 214 and the 3rd cover layer 216, form at least one opening 222.In this second preferred embodiment, opening 222 is in order to fairlead opening or groove opening as mosaic texture.Carry out etch process subsequently again, to bottom 204, remove the bottom 204 that comes out at last and form the fairlead or the groove of mosaic texture by downward etching first cover layers 212 of opening 222 and dielectric layer 206.Because this step is described identical with first preferred embodiment, so in this second preferred embodiment, repeat no more.
The composite coating 210 that is provided according to this second preferred embodiment, the compression that first cover layer 212 and the 3rd cover layer 216 provide, therefore obtain buffering by the second thicker cover layer 214 of thickness, can avoid dielectric layer 206 directly to be subjected to its stress influence and cause distortion.In addition, because the 3rd cover layer 216 is airtight TEOS layer, it can block moisture by the higher tensile stress TEOS layer of water absorption in the middle of etch process, and promptly second cover layer 214 absorbs.First cover layer 212 then can be avoided still absorbed aqueous vapor to discharge in subsequent technique and enter causing Kai Shi hole opening in the dielectric layer 206.Please consult Figure 12 and Figure 13 again, in Figure 12 and Figure 13, the chip of numbering 11～No. 18 includes the formed mosaic texture of three floor (tri-layer) composite coating that this second preferred embodiment is provided.As Figure 12 and Figure 13 as can be known, the inlaying inner connecting line of the composite coating gained that is provided according to this second preferred embodiment, its electricity performance is stable and significantly surmount known technology.
Please consult Fig. 7 once more.According to first preferred embodiment provided by the present invention, the invention provides a kind of composite coating 110 that is used to make inlaying inner connecting line, include first cover layer 112 and second cover layer 114.First cover layer 112 is the tensile stress layer; Second cover layer 114 is then in order to as first protective layer.And as shown in Figure 7, the thickness of tensile stress layer (i.e. first cover layer 112) is greater than first protective layer (i.e. second cover layer 114).
Please continue to consult Fig. 7.First cover layer 112 and second cover layer 114 include TEOS, and second cover layer 114 is airtight TEOS layer.In addition, first cover layer 112 has and is about 50 to 100Mpa tensile stress, and second cover layer 114 then has and is about-150 to-300Mpa compression.
Please consult Figure 15 once more.According to second preferred embodiment provided by the present invention, composite coating 210 is provided, include first cover layer 212 and second cover layer 214.First cover layer 212 is in order to as first protective layer; Second cover layer 214 then is the tensile stress layer.And as shown in figure 13, the thickness of tensile stress layer (i.e. second cover layer 214) is greater than first protective layer (i.e. first cover layer 212).
Please continue to consult Figure 15.First cover layer 212 and second cover layer 214 include TEOS, and first cover layer 212 is airtight TEOS layer.In addition, second cover layer 214 has and is about 50 to 100Mpa tensile stress, and first cover layer 212 then has and is about-150 to-300Mpa compression.
The stress that composite hard mask layer 110,210, the first protective layers that provided according to first preferred embodiment and second preferred embodiment are provided by tensile stress layer buffering, therefore can avoid the stress of first protective layer directly to have influence on anterior layer and cause distortion.Simultaneously; because first protective layer is airtight TEOS layer; it can avoid the higher tensile stress layer of water absorption to absorb aqueous vapor at etch process, and therefore the aqueous vapor that should be absorbed by the tensile stress layer is released the shortcoming that causes anterior layer Kai Shi hole opening in subsequent technique, can be airtight TEOS layer and avoids.
Next see also Figure 16.According to second preferred embodiment provided by the present invention, composite coating 210 more can comprise the 3rd cover layer 216,, be arranged on second cover layer 214, in order to as second protective layer.The 3rd cover layer protective layer 216 also includes TEOS, and is airtight TEOS layer.Have as the 3rd cover layer 216 of second protective layer and to be about-150 to-300Mpa compression.
As shown in figure 16, first cover layer 212, second cover layer 214, have thickness: X, Y, Z respectively, and the thickness Y of second cover layer 214 is greater than the summation of the thickness Z of the thickness X of first cover layer 212 and the 3rd cover layer 216 with the 3rd cover layer 216.The thickness Y of the thickness X of first cover layer 212, second cover layer 214, with the ratio of the thickness Z of the 3rd cover layer 216 be 1: 2: 1 to 1: 10: 1, and preferable with 1: 3: 1.
The composite hard mask layer 210 that is provided according to second preferred embodiment; the stress that can be provided by first protective layer and second protective layer; therefore can slow down by the thicker tensile stress of thickness, can avoid follow-up formed inlaying inner connecting line because of distortion that its stress caused.Simultaneously; because second protective layer is airtight TEOS layer; it can avoid the higher tensile stress layer of water absorption to absorb aqueous vapor at etch process, and the aqueous vapor that first protective layer then can be avoided the tensile stress layer and absorbed is disengaged in subsequent technique and entered the shortcoming that anterior layer causes the anterior layer hole.
In sum, the composite coating that is used for inlaying inner connecting line technology provided by the present invention can be extenuated stress by thicker tensile stress layer, avoids anterior layer directly to be subjected to stress influence and causes distortion; Utilize the protective layer of composite coating simultaneously, can avoid anterior layer absorption aqueous vapor, and avoid its adsorbed aqueous vapor to come out and influence process results, show so composite coating provided by the present invention can definitely promote the electricity of inlaying inner connecting line at the subsequent technique desorption.
The above only is the preferred embodiments of the present invention, and all equalizations of doing according to claim of the present invention change and modify, and all should belong to covering scope of the present invention.
Claims (48)
1. the manufacture method of a composite coating includes following steps:
Substrate is provided, and this substrate includes conductive layer, bottom and dielectric layer at least;
Form composite coating at this substrate surface, and this composite coating includes first cover layer at least and is formed at this first supratectal second cover layer;
Form the metal hard mask layer of patterning on this composite coating surface; And
Carry out etch process,, and in this second cover layer, form at least one opening via this composite coating of metal hard mask layer etching of this patterning.
2. the method for claim 1, wherein this dielectric layer includes ultra-low dielectric materials.
3. method as claimed in claim 2, wherein this dielectric layer has tensile stress, and this tensile stress is 30 to 80MPa.
4. the method for claim 1, wherein this first cover layer and this second cover layer are respectively and utilize the formed tetraethyl oxosilane of depositing operation layer.
5. method as claimed in claim 4, wherein this depositing operation includes plasma enhanced chemical vapor deposition technology, subatmospheric chemical vapor deposition method or low pressure gas phase deposition.
6. method as claimed in claim 4 wherein forms this first cover layer and this second tectal this depositing operation utilizes the coordination mode to carry out.
7. method as claimed in claim 4, wherein this first cover layer is a tensile stress tetraethyl oxosilane layer, and this second cover layer is airtight tetraethyl oxosilane layer.
8. method as claimed in claim 7, wherein this tensile stress tetraethyl oxosilane bed thickness is in this airtight tetraethyl oxosilane layer.
9. method as claimed in claim 7, wherein forming the high frequency radio wave power that uses in this depositing operation of this tensile stress tetraethyl oxosilane layer is 750 to 850 watts, low frequency radio wave power is 100 to 200 watts.
10. method as claimed in claim 7, wherein forming the high frequency radio wave power that uses in this depositing operation of this airtight tetraethyl oxosilane layer is 230 to 330 watts, low frequency radio wave power is 10 to 100 watts.
11. method as claimed in claim 7, wherein this tensile stress tetraethyl oxosilane layer includes 50 to 100MPa tensile stress, and this airtight tetraethyl oxosilane layer includes-150 to-300MPa compression.
12. method as claimed in claim 4, wherein this first cover layer is airtight tetraethyl oxosilane layer, and this second cover layer is a tensile stress tetraethyl oxosilane layer.
13. method as claimed in claim 12, wherein this tensile stress tetraethyl oxosilane bed thickness is in this airtight tetraethyl oxosilane layer.
14. method as claimed in claim 12, wherein forming the high frequency radio wave power that uses in this depositing operation of this airtight tetraethyl oxosilane layer is 230 to 330 watts, and low frequency radio wave power is 10 to 100 watts.
15. method as claimed in claim 12, wherein forming the high frequency radio wave power that uses in this depositing operation of this tensile stress tetraethyl oxosilane layer is 750 to 850 watts, and low frequency radio wave power is 100 to 200 watts.
16. method as claimed in claim 12, wherein to have be 50 to 100MPa tensile stress to this tensile stress tetraethyl oxosilane layer, and this airtight tetraethyl oxosilane layer has the compression for-150 to-300MPa.
17. method as claimed in claim 12, wherein this composite coating also includes the 3rd cover layer.
18. method as claimed in claim 17, wherein the 3rd cover layer is formed at this second supratectal airtight tetraethyl oxosilane layer for utilizing depositing operation.
19. method as claimed in claim 18, wherein this depositing operation includes the formed airtight tetraethyl oxosilane layer of plasma enhanced chemical vapor deposition technology, subatmospheric chemical vapor deposition method or low pressure gas phase deposition.
20. method as claimed in claim 18 wherein forms this airtight tetraethyl oxosilane layer and includes-150 to-300MPa compression.
21. method as claimed in claim 18, wherein this first cover layer of this formation, this second cover layer, utilize the coordination mode to carry out with the 3rd tectal this depositing operation.
22. method as claimed in claim 18, wherein forming the high frequency radio wave power that uses in this depositing operation of this airtight tetraethyl oxosilane layer is 230 to 330 watts, and low frequency radio wave power is 10 to 100 watts.
23. method as claimed in claim 17, wherein this opening is formed in this second cover layer and the 3rd cover layer.
24. the method for claim 1, wherein this opening includes the groove opening or the fairlead opening of mosaic texture.
25. the method for claim 1, wherein this first cover layer and this second cover layer comprise the tetraethyl oxosilane.
26. the manufacture method of a composite coating includes following steps:
Substrate is provided, and this substrate includes conductive layer, bottom and dielectric layer at least; And
Form composite coating at this substrate surface, include the tensile stress layer and first protective layer at least, and the thickness of this tensile stress layer is greater than the thickness of this first protective layer.
27. method as claimed in claim 26, wherein this dielectric layer includes ultra-low dielectric materials.
28. method as claimed in claim 27, wherein this dielectric layer has tensile stress, and this tensile stress is 30 to 80MPa.
29. method as claimed in claim 26, wherein this tensile stress layer includes 50 to 100MPa tensile stress.
30. method as claimed in claim 26, wherein this tensile stress layer and this first protective layer are respectively and utilize the formed tetraethyl oxosilane layer that utilizes of depositing operation.
31. method as claimed in claim 30, wherein this depositing operation includes plasma enhanced chemical vapor deposition technology, subatmospheric chemical vapor deposition method or low pressure gas phase deposition.
32. method as claimed in claim 30, wherein this depositing operation of this tensile stress layer and this first protective layer utilizes the coordination mode to carry out.
33. method as claimed in claim 30, wherein forming the high frequency radio wave power that uses in this depositing operation of this tensile stress layer is 750 to 850 watts, and low frequency radio wave power is 100 to 200 watts.
34. method as claimed in claim 30, wherein this first protective layer is airtight tetraethyl oxosilane layer.
35. method as claimed in claim 34, wherein forming the high frequency radio wave power that uses in this depositing operation of this airtight tetraethyl oxosilane layer is 230 to 330, and low frequency radio wave power is 10 to 100 watts.
36. method as claimed in claim 34, wherein this airtight tetraethyl oxosilane layer has the compression for-150 to-300MPa.
37. method as claimed in claim 26, wherein this first protective layer is formed on this tensile stress layer.
38. method as claimed in claim 26, wherein this tensile stress layer is formed on this first protective layer.
39. method as claimed in claim 38 also comprises the step of utilizing depositing operation to form second protective layer, be carried out to form after this composite coating, and this second protective layer covers this tensile stress layer.
40. method as claimed in claim 39, wherein this second protective layer is airtight tetraethyl oxosilane layer.
41. method as claimed in claim 39, wherein this depositing operation includes plasma enhanced chemical vapor deposition technology, subatmospheric chemical vapor deposition method or low pressure gas phase deposition technology.
42. method as claimed in claim 39 wherein forms this tensile stress layer, this first protective layer, utilizes the coordination mode to carry out with this depositing operation of this second protective layer.
43. method as claimed in claim 39, wherein forming the high frequency radio wave power that uses in this depositing operation of this second protective layer is 230 to 330 watts, and low frequency radio wave power is 10 to 100 watts.
44. method as claimed in claim 39 wherein forms this second protective layer and includes-150 to-300MPa compression.
45. method as claimed in claim 39, wherein the thickness of this tensile stress layer is greater than the summation of the thickness of this first protective layer and this second protective layer.
46. method as claimed in claim 45, wherein second protective layer, this tensile stress layer, have a ratio with the thickness of this first protective layer, and the scope of this ratio is 1: 2: 1 to 1: 10: 1.
47. method as claimed in claim 46, wherein this second protective layer, this tensile stress layer, with the thickness proportion of this first protective layer be 1: 3: 1.
48. method as claimed in claim 26, wherein this tensile stress layer includes the tetraethyl oxosilane.
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| CN2011100492962A CN102157441A (en) | 2007-04-25 | 2007-04-25 | Method for manufacturing composite covering layer |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102324401A (en) * | 2011-09-28 | 2012-01-18 | 上海华力微电子有限公司 | Method for manufacturing copper interconnection structure |
| CN102324400A (en) * | 2011-09-28 | 2012-01-18 | 上海华力微电子有限公司 | Method for manufacturing copper interconnection structure |
| CN103871961A (en) * | 2012-12-17 | 2014-06-18 | 中芯国际集成电路制造(上海)有限公司 | Interconnection structure and manufacturing method for same |
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2007
- 2007-04-25 CN CN2011100492962A patent/CN102157441A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102324401A (en) * | 2011-09-28 | 2012-01-18 | 上海华力微电子有限公司 | Method for manufacturing copper interconnection structure |
| CN102324400A (en) * | 2011-09-28 | 2012-01-18 | 上海华力微电子有限公司 | Method for manufacturing copper interconnection structure |
| CN102324401B (en) * | 2011-09-28 | 2013-10-23 | 上海华力微电子有限公司 | Method for manufacturing copper interconnection structure |
| CN103871961A (en) * | 2012-12-17 | 2014-06-18 | 中芯国际集成电路制造(上海)有限公司 | Interconnection structure and manufacturing method for same |
| CN103871961B (en) * | 2012-12-17 | 2017-08-25 | 中芯国际集成电路制造(上海)有限公司 | Interconnection structure and its manufacture method |
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