CN102154626A - Surface treatment method for measuring diffusion length of silicon wafer - Google Patents

Surface treatment method for measuring diffusion length of silicon wafer Download PDF

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CN102154626A
CN102154626A CN 201010620796 CN201010620796A CN102154626A CN 102154626 A CN102154626 A CN 102154626A CN 201010620796 CN201010620796 CN 201010620796 CN 201010620796 A CN201010620796 A CN 201010620796A CN 102154626 A CN102154626 A CN 102154626A
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silicon chip
silicon wafer
rinsing
sintering
surface treatment
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张驰
陈雪
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Changzhou Trina Solar Energy Co Ltd
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Changzhou Trina Solar Energy Co Ltd
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Abstract

The invention provides a surface treatment method for measuring the diffusion length of a silicon wafer. The surface treatment method comprises the following steps of: rinsing a raw silicon wafer in acid liquid; cleaning with de-ionized water after rinsing; removing residual rinsing liquid and drying; depositing a silicon nitride film on the surface of the silicon wafer by adopting a plasma chemical vapor deposition method; putting the silicon wafer on which the silicon nitride film is deposited into a sintering furnace for sintering; and cooling the sintered silicon wafer to room temperature, putting into a sample table of SemiLab PV 2000 testing equipment for testing. A result indicates that SPV8 and SPV6 signals are remarkably enhanced, the linear ratio (LR) is increased remarkably, and the requirement of the testing equipment is completely met.

Description

A kind of surface treatment method of measuring the silicon chip diffusion length
Technical field
The invention provides a kind of surface treatment method of measuring the silicon chip diffusion length.
Background technology
Minority carrier lifetime is an important parameter of semiconductor silicon crystalline material, and the photoelectric transformation efficiency of it and crystal silicon solar energy battery has direct relation.Therefore testing the intravital minority carrier lifetime of crystalline silicon is the important means of before producing silicon material being carried out quality examination and carry out performance analysis in research process, and mainly utilize unstable state photoconductivity decay technology at present, be called for short the PCD technology, test minority carrier lifetime, its result is actual, and what embody is the comprehensive life of entire sample, it is the net result that occurs in silicon chip surface, intravital all complex superposition, thereby can not embody the quality of silicon chip body fully.
Diffusion length (L) is the notion that minority carrier lifetime (τ) extends out, and it and minority carrier lifetime exist
Figure BDA0000042481700000011
Relation, wherein D is the spread coefficient of minority carrier lifetime, for same block semiconductor material, the spread coefficient of its current carrier is generally constant.Therefore, generally influence the machine-processed identical of the physical mechanism of semi-conductor minority carrierdiffusion length and minority carrier lifetime.
At present, the most frequently used method of test minority carrierdiffusion length is a surface photovoltaic method, is called for short the SPV method, this is a kind of steady method, irrelevant with time course, thus avoided that surface recombination is to result's influence in the unstable state test, and test result more can embody the quality of material bodies.Thereby SemiLab PV2000 equipment utilization surface photovoltage test philosophy is measured the diffusion length of silicon chip and is reached the purpose that characterizes the silicon chip quality.In utilizing SemiLab PV2000 device measuring silicon chip diffusion length process, silicon chip surface potential barrier, SPV strength of signal, linear ratio (LR) all can influence test result, and utilize its surface potential barrier of silicon chip, SPV signal, linear ratio (LR) after usual ways such as sodium hydroxide or hydrofluoric acid aqueous solution immersion are handled to strengthen limited, be difficult to reach the testing of equipment requirement, measuring accuracy is relatively poor, and the result is insincere.Testing of equipment require for SPV8, SPV6 signal all greater than 5mv, linear ratio LR is greater than 1.6.
Summary of the invention
The technical problem to be solved in the present invention is: based on the problems referred to above, the invention provides a kind of surface treatment method of rational measurement silicon chip diffusion length, overcome silicon chip surface potential barrier that SemiLab PV2000 equipment occurs when measuring the diffusion strong point of P type silicon chip a little less than, test signal is poor, linear ratio is lower, do not reach testing apparatus and require to cause the test result error big, shortcoming such as confidence level is little.
The technical solution adopted for the present invention to solve the technical problems is: a kind of surface treatment method of measuring the silicon chip diffusion length is provided, comprises the steps:
The first step, rinsing: it is 47%~49% hydrofluoric acid that primary silicon chip is immersed by mass percent, rinsing in the acidic rinse liquid that 65%~68% nitric acid mixing deionized water makes, and the time is 1min~5min, acidic rinse liquid proportioning is V Hydrofluoric acid: V Nitric acid: V Deionized water=(1~1.5): (2~4.5): (1.7~3);
Second step, cleaning: with the silicon chip washed with de-ionized water after the rinsing, the time is 2min~5min;
The 3rd step, oven dry: the silicon chip that will clean is put into the stoving oven oven dry, and the time is 8min~10min;
The 4th step, deposition: the silicon chip after will drying deposits 7min~10min in plasma body chemical vapor deposition equipment, source of the gas is silane and nitrogen mixture, and silicon nitride gas membrane thickness reaches 70nm~90nm on the silicon chip;
The 5th step, sintering: the silicon chip that will deposit the silicon nitride gas membrane is put into the sintering oven sintering, and sintering temperature is 230 ℃~910 ℃, and the time is 2min~3min;
The 6th step, test: above-mentioned material print is cooled to room temperature, puts into the sample table test of testing apparatus, material records the result must satisfy SPV8, SPV6 strength of signal all greater than 5mv, and linear ratio is greater than 1.6.Testing apparatus adopts SemiLab PV2000 testing apparatus.
Described silicon chip is a P type polysilicon chip, and resistivity is 0.5~3 ohmcm, and thickness is 170~200um.
The invention has the beneficial effects as follows: its surface potential barrier of P type silicon chip of handling through surface treatment method of the present invention increases, SPV8, SPV6 strength of signal are all greater than 5mv when carrying out the diffusion length test, linear ratio is greater than 1.6, SPV strength of signal, LR value all strengthen and reach the testing apparatus requirement simultaneously, and measuring accuracy improves.
Description of drawings
The present invention is further described below in conjunction with accompanying drawing embodiment.
Fig. 1 is P type polysilicon chip carries out the diffusion length test without any processing a pattern.
Fig. 2 is that P type polysilicon chip adopts the pattern that carries out the diffusion length test after the treatment process of the present invention.
Embodiment
It is 0.5~3 ohmcm that present embodiment adopts resistivity, and thickness is that the P type polysilicon chip of 170~200um is a raw material, is that position serial sampling obtains in the crystal bar middle and lower part, and it is identical to guarantee that like this silicon chip surface crystal grain distributes, and guarantees that the silicon chip crystal mass is close.The sample table that this silicon chip surface is directly put into SemiLab PV2000 testing apparatus without any processing is tested, record SPV8, SPV6 and be respectively 0.012mv, 0.011mv, LR is 1.226, does not satisfy the testing of equipment requirement, and the result is insincere.
The invention will be further described in conjunction with specific embodiments now, and following examples are intended to illustrate the present invention rather than limitation of the invention further.
Embodiment 1
It is 48% hydrofluoric acid that primary silicon chip is immersed by mass percent, 66% nitric acid mixing deionized water, and proportioning is V Hydrofluoric acid: V Nitric acid: V Deionized water=1.1: rinsing 3min in the acidic rinse liquid that makes at 2.5: 2.3; With the washed with de-ionized water 4min of the silicon chip after the rinsing; Silicon chip after the oven dry is deposited 9min in having mixed the plasma body chemical vapor deposition equipment of silane and nitrogen, silicon nitride gas membrane thickness reaches 70nm~90nm on the silicon chip; The silicon chip that has deposited the silicon nitride gas membrane is put into sintering oven sintering 3min, and regulating sintering temperature is 850 ℃; Above-mentioned material print is cooled to room temperature, puts into the sample table test of SemiLab PV2000 testing apparatus, record SPV8, SPV6 and be respectively 29.856mv, 22.486mv, LR is 1.911, and the result satisfies the testing apparatus requirement.
After testing, the SPV signal all obviously strengthens, and linear ratio LR enlarges markedly, measuring accuracy height, credible result.
Table (one): P type polysilicon silicon chip diffusion length test result
Figure BDA0000042481700000041
Shown in table (), first group of data are that P type test silicon wafer is put into SPV signal that the sample table of SemiLabPV2000 testing apparatus tests to draw and the test result of linear ratio LR after surface treatment, second group of data SPV signal that to be P type test silicon wafer surface draw without any processing test and the test result of linear ratio LR, two groups of data among comparison diagram 1, Fig. 2 and the Biao, can obviously find out, surface treated P type silicon chip SPV signal all obviously strengthens, linear ratio LR enlarges markedly, the measuring accuracy height, credible result.
With above-mentioned foundation desirable embodiment of the present invention is enlightenment, and by above-mentioned description, the related work personnel can carry out various change and modification fully in the scope that does not depart from this invention technological thought.The technical scope of this invention is not limited to the content on the specification sheets, must determine its technical scope according to the claim scope.

Claims (2)

1. a surface treatment method of measuring the silicon chip diffusion length is characterized in that: comprise the steps:
The first step, rinsing: it is 47%~49% hydrofluoric acid that primary silicon chip is immersed by mass percent, rinsing in the acidic rinse liquid that 65%~68% nitric acid mixing deionized water makes, and the time is 1min~5min, acidic rinse liquid proportioning is V Hydrofluoric acid: V Nitric acid: V Deionized water=(1~1.5): (2~4.5): (1.7~3);
Second step, cleaning: with the silicon chip washed with de-ionized water after the rinsing, the time is 2min~5min;
The 3rd step, oven dry: the silicon chip that will clean is put into the stoving oven oven dry, and the time is 8min~10min;
The 4th step, deposition: the silicon chip after will drying deposits 7min~10min in plasma body chemical vapor deposition equipment, source of the gas is silane and nitrogen mixture, and silicon nitride gas membrane thickness reaches 70nm~90nm on the silicon chip;
The 5th step, sintering: the silicon chip that will deposit the silicon nitride gas membrane is put into the sintering oven sintering, and sintering temperature is 230 ℃~910 ℃, and the time is 2min~3min;
The 6th step, test: above-mentioned material print is cooled to room temperature, puts into the sample table test of testing apparatus.
2. a kind of surface treatment method of measuring the silicon chip diffusion length according to claim 1 is characterized in that: described silicon chip is a P type polysilicon chip, and resistivity is 0.5~3 ohmcm, and thickness is 170~200um.
CN 201010620796 2010-12-31 2010-12-31 Surface treatment method for measuring diffusion length of silicon wafer Pending CN102154626A (en)

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Cited By (1)

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CN112271144A (en) * 2020-10-13 2021-01-26 中国科学院上海微系统与信息技术研究所 Method for testing humidity and heat resistance reliability of solar cell

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CN101154608A (en) * 2006-09-30 2008-04-02 中芯国际集成电路制造(上海)有限公司 Method for forming grid medium layer and estimating its electrical parameter
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CN101906616A (en) * 2009-06-04 2010-12-08 胡本和 Coating process for silicon solar cells
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112271144A (en) * 2020-10-13 2021-01-26 中国科学院上海微系统与信息技术研究所 Method for testing humidity and heat resistance reliability of solar cell
CN112271144B (en) * 2020-10-13 2024-01-30 中国科学院上海微系统与信息技术研究所 Method for testing humidity and heat resistance reliability of solar cell

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Application publication date: 20110817