CN102148161B

CN102148161B - Method for preparing P-type Si3N4 nano wire field effect transistor

Info

Publication number: CN102148161B
Application number: CN2011100208434A
Authority: CN
Inventors: 陈友强; 张新霓
Original assignee: Qingdao University
Current assignee: Qingdao University
Priority date: 2011-01-19
Filing date: 2011-01-19
Publication date: 2012-11-14
Anticipated expiration: 2031-01-19
Also published as: CN102148161A

Abstract

The invention relates to a new method for preparing a P-type field effect tube based on a Si3N4 nano wire, comprising the following steps: (1) uniformly mixing organic precursor polysilazane and a certain amount of aluminium nitrate, carrying out low-temperature crosslinking curing at the temperature of 260 DEG C under the protective atmosphere of N2 or Ar to obtain an amorphous solid, and then carrying out ball milling and smashing; (2) placing the obtained smashed powder at the bottom of a Al2O3 crucible and placing a C substrate above the smashed powder; (3) placing the Al2O3 crucible in a sintering furnace, carrying out high-temperature thermal decomposition at the temperature of 1200-1550 DEG C under the protective atmosphere of N2, and insulating for 5-120 minutes; (4) cooling to room temperature along with the furnace, thus an in-situ Al doped Si3N4 nano wire is obtained on the C substrate; and (5) dispersing the obtained in-situ Al doped Si3N4 nano wire in ethanol solution, coating the suspension on a silicon wafer with an oxidation layer in a spinning way, respectively preparing a source electrode and a drain electrode at the two ends of the Si3N4 nano wire by adopting a photoetching-evaporating-stripping process, and taking a silicon substrate as a back grid. The resistance of pure Si3N4 is extremely high, and the pure Si3N4 is generally used as an insulating dielectric material; and in the method provided by the invention, Al is doped in situ, the resistance of the Si3N4 nano wire is greatly reduced, the power transmission performance of the Si3N4 nano wire is improved, and the P-type Si3N4 nano wire field effect tube can be prepared.

Description

A kind of preparation P type Si 3N 4The method of nanometer wire field effect tube

Technical field

The present invention relates to a kind of preparation P type Si ₃N ₄The method of nanometer wire field effect tube belongs to technical field of material.

Technical background

Therefore scientist professor Lieber of Harvard University thinks: " the one dimension system is to can be used for electronics effect spread and light activated smallest dimension structure are arranged, and possibly become to realize the integrated key with function of nano-device ".So become the research focus and the focus of whole world science and technology based on the research and development of the device of one-dimensional nano structure.Field-effect transistor is because its importance in microelectronics industry becomes one of main devices of research one-dimensional nano structure electronic transport performance again, because its nanostructure has given its field-effect transistor more excellent performance.

Low dimension Si ₃N ₄That material has is in light weight, intensity is high, thermal shock and the good characteristics of oxidation resistance, thereby has very widely at a lot of industrial circles and to use, simultaneously it also be a kind of wide bandgap semiconductor materials (～5.3eV), so one dimension Si ₃N ₄The research of nano material receives common concern.As everyone knows, the various elements that in semiconductor, selectively mix are a kind of effective methods for its electricity of regulation and control, optics and magnetic property, and this is a crucial effects to semi-conductive practical application.Tested the electric property of boron-doped nanometer silicon line such as people such as Lee, find the boron-doping of silicon line after electrical conductance be greatly improved.People such as Munakata pass through Si ₃N ₄Monocrystal carries out Al and mixes, and discovery can be with it from 5.3eV and be reduced to 2.4eV.

According to bibliographical information, there is not the Si that mixes ₃N ₄Resistance very big, generally can only be used as the dielectric material, and the present invention greatly reduces Si through in-situ doped Al ₃N ₄The resistance value of nano wire has improved its transmission performance, and has realized P type Si ₃N ₄The preparation of nanometer wire field effect tube.

Summary of the invention

Technical problem to be solved by this invention provides a kind of preparation based on Si ₃N ₄The new method of the P type FET of nano wire.

The present invention solves the problems of the technologies described above the technical scheme that is adopted: this P type Si ₃N ₄The preparation method of nanometer wire field effect tube comprises following concrete steps:

(1) the mixture heat cross-linking of polysilazane and aluminum nitrate solidifies and pulverizes;

(2) powder that pulverizing is obtained places Al ₂O ₃The bottom of crucible is placed C (carbon) substrate above it;

(3) with Al ₂O ₃Crucible places atmosphere sintering furnace, at N ₂In 1200～1550 ℃ of scopes, carry out high temperature pyrolysis under the atmosphere protection, insulation 5～120min;

(4) cool to room temperature with the furnace, can on the C substrate, obtain the Si of in-situ doped Al thus ₃N ₄Nano wire;

The Si of the in-situ doped Al that (5) will obtain ₃N ₄Nano wire is dispersed in the ethanolic solution, this suspension is spin-coated on the silicon chip of oxide layer, adopts photoetching-vapor deposition-stripping technology at Si ₃N ₄The nano wire two ends make source electrode and drain electrode respectively, and silicon substrate is made back grid.

In the said step (1), the mixture heat cross-linking of polysilazane and aluminum nitrate carries out in atmosphere sintering furnace, and technology is 260 ℃ of pyrolysis insulation 30～120min, and protective gas is Ar or N ₂, ball mill grinding then.

In the said step (1), aluminum nitrate content is 0.01%～10% of polysilazane mass fraction.

In the said step (3), the atmosphere sintering furnace that is adopted is the graphite resistance atmosphere sintering furnace.

In the said step (5), the silicon chip that is adopted is N type or P type silicon chip, and oxidated layer thickness is 100nm～800nm, and the source, very Ti/Au or Ni/Au or Au or Pt leak electricity.

Compared with prior art, the invention has the advantages that:

The Si that does not have doping ₃N ₄Resistance very big, generally as the dielectric material, the present invention greatly reduces Si through in-situ doped Al ₃N ₄The resistance value of nano wire has improved its transmission performance, and has realized P type Si ₃N ₄The preparation of nanometer wire field effect tube.

Description of drawings

Fig. 1 is the prepared Si of the present invention ₃N ₄The structural representation of FET;

Fig. 2 is the embodiment of the invention one a prepared single crystalline Si ₃N ₄The ESEM of nano wire (SEM) figure;

Fig. 3 is the embodiment of the invention one a prepared single crystalline Si ₃N ₄The Raman scatter diagram of nano wire;

Fig. 4 is the embodiment of the invention one a prepared single crystalline Si ₃N ₄The power spectrum of nano wire (EDS) figure;

Fig. 5 is the embodiment of the invention one a prepared single crystalline Si ₃N ₄The high-resolution-ration transmission electric-lens of nano wire (HTEM) figure;

Fig. 6 is that the embodiment of the invention one is prepared based on single Si ₃N ₄The ESEM of the FET of nano wire (SEM) figure;

Fig. 7 is that the embodiment of the invention one prepared FET is at different gate voltage (V _G) following source-drain current and source-drain voltage (I _DS-V _DS) curve chart;

Fig. 8 is source-drain current and gate voltage (I under the situation of 30V at source-drain voltage for the embodiment of the invention one prepared FET _DS-V _G) curve chart.

Embodiment

Below in conjunction with accompanying drawing embodiment the present invention is made further detailed description.

Embodiment one

After initial feed is chosen polysilazane and is mixed with the aluminum nitrate that accounts for its 0.5% mass fraction, at N ₂Carrying out heat cross-linking in 260 ℃ of insulation 30min under the atmosphere protection solidifies.The solid that curing is obtained is packed in the nylon resin ball grinder, the ball mill grinding powdered.Cut 20 * 6 * 4mm (long * wide * thick) C substrate, tilt to place alumina crucible, and be placed in the graphite resistance atmosphere sintering furnace.Atmosphere furnace is evacuated to 10～20Pa earlier, charges into high-purity N again ₂Gas (99.99%), until pressure be an atmospheric pressure (～0.11Mpa), constant pressure after this.Speed with 30 ℃/min is rapidly heated to 1350 ℃ from room temperature then.Be incubated 10min down at 1350 ℃, cool off with stove then.The Si that on the C substrate, grows ₃N ₄The SEM of low-dimensional nano structure, Raman, EDS and high-resolution-ration transmission electric-lens show that prepared nanostructure is to mix the Si of A1 shown in Fig. 2～5 ₃N ₄Monocrystalline.Si with the in-situ doped Al that obtains ₃N ₄Nano wire is dispersed in the ethanolic solution, this suspension is spin-coated on the N type silicon chip of 300nm oxide layer, adopts photoetching-vapor deposition-stripping technology at Si ₃N ₄The nano wire two ends make Ni/Au (10/200nm) source electrode and drain electrode respectively, and make back grid with silicon substrate, and are prepared based on single Si ₃N ₄Figure is as shown in Figure 6 for the ESEM of the FET of nano wire (SEM).Prepared FET is at different gate voltage (V _G) following source-drain current and source-drain voltage (I _DS-V _DS) curve is as shown in Figure 7; The FET that makes is source-drain current and gate voltage (I under the situation of 30V at source-drain voltage _DS-V _G) curve is as shown in Figure 8, Fig. 7 and Fig. 8 show that all the source-drain current of prepared FET reduces along with the increase of gate voltage, are P type FET.

Claims

1. one kind prepares based on Si ₃N ₄The method of the P type FET of nano wire, it comprises following concrete steps:

(1) organic precursor polysilazane and a certain amount of aluminum nitrate mix the back at protective atmosphere N ₂Or under the Ar gas atmosphere, carry out crosslinked at low temperature in 260 ℃ and solidify, obtain non-crystalline solids;

(2) non-crystalline solids are carried out ball mill grinding in ball mill;

(3) powder that pulverizing is obtained places Al ₂O ₃The bottom of crucible is placed the C substrate above it;

(4) with Al ₂O ₃Crucible places atmosphere sintering furnace, at N ₂In 1200～1550 ℃ of scopes, carry out high temperature pyrolysis under the atmosphere protection, insulation 5～120min;

(5) cool to room temperature with the furnace, can on the C substrate, obtain the α phase Si of doped with Al thus ₃N ₄Nano wire;

The Si of the in-situ doped Al that (6) will obtain ₃N ₄Nano wire is dispersed in the ethanolic solution, this suspension is spin-coated on the silicon chip of oxide layer, adopts photoetching-vapor deposition-stripping technology at Si ₃N ₄The nano wire two ends make source electrode and drain electrode respectively, and make back grid with silicon substrate.

2. preparation Si according to claim 1 ₃N ₄The method of the P type FET of nano wire is characterized in that:

The aluminum nitrate content that uses in the said step (1) is 0.01%～10% of polysilazane mass fraction.

3. preparation Si according to claim 1 ₃N ₄The method of the P type FET of nano wire is characterized in that:

The silicon chip that is adopted in the said step (6) is N type or P type silicon chip, and oxidated layer thickness is 100nm～800nm, source electrode and leak electricity very Ti/Au or Ni/Au or Au or Pt.