CN102117409B - Hardware feature box for searching and traversing feathers based on integrogram - Google Patents
Hardware feature box for searching and traversing feathers based on integrogram Download PDFInfo
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Abstract
The invention discloses a hardware feather box for searching and traversing feathers based on an integrogram, and the hardware feather box comprises a feature extraction box and three buffer areas, wherein the three buffer areas are positioned at the upper part, the lower part and the right part of the feature extraction frame respectively; in the feature extraction frame, except the uttermost X row, the lowermost X row and the rightmost Y line, each register is connected with a register which is away from the register at a distance of X in the upper and lower directions and is connected with a register which away from the register at a distance of Y in the right direction; each register in the upper buffer area is connected with a register which is away from the register at a distance of X in the lower feature extraction frame; each register in the lower buffer area is connected with a register which is away from the register at a distance of X in the upper feature extraction box; each register in the right buffer area is connected with a register which is away from the register at a distance of Y in the left feature extraction box; and X is row step and Y is line step. By adopting the scheme of the invention, hardware resources can be effectively reduced and the required resources for images with higher resolutions can be effectively reduced.
Description
Technical field
The present invention relates to the searching image features technical field, be specifically related to search and travel through for feature, take the less hardware characteristics frame of resource.
Background technology
Along with the increase to the man-machine interaction demand, people have proposed more and more higher requirement to man-machine interactive system.One of them very important index is exactly the resolution of system.But its inherent characteristics of man-machine interaction is that data processing amount is large, and requirement of real-time is high.Here it is hinders the large bottleneck that it moves towards the high resolution system application.
Field of human-computer interaction has been used a large amount of mode identification methods.But the difference of both maximums is---the given width of cloth figure of pattern-recognition (be 20*20 such as size), go to identify whether required target of looking for (such as people's face) of this width of cloth figure again; And the given width of cloth figure of man-machine interaction (be 640*480 such as size), whether go to identify where going up among this width of cloth figure has required target of looking for (be the people face of 20*20 such as size) again.Therefore, compare with pattern-recognition, man-machine interaction has had more a process of searching in the entire image traversal.
Specific objective (such as people's face) searched to use feature.Feature is generally done by a plurality of pixels and is formed, and its pixel number that comprises of different features is different.Therefore calculate number of calculations that each feature needs and also be operation time different, this is unfavorable for the realization of hardware.So generally all adopt now the method based on the integrogram calculated characteristics.The value of each point is its upper left gray-scale value sum of having a few in the integrogram.Therefore when calculating each feature, only need to carry out 2 sub-addition computings and 1 subtraction gets final product with the integrated value of its 4 end points.So not only reduce computational complexity but also guaranteed each operation time.
Man-machine interaction is large because of its data processing amount, and the high characteristics of requirement of real-time become the large bottleneck that it is applied to general procedure.Recent years, also begun some man-machine interactions all over the world and processed the trial of accomplishing on FPGA or the ASIC.Consider the factors such as computational complexity, arithmetic speed, power consumption, the way of main flow all adopts based on the integration Graph Character and searches and travel through now.Wherein, 3 kinds of typical methods are arranged.First method stores the integrogram of entire image in the register (register) into.Second method stores integrogram among the RAM into by row or by row.The third method, the capable buffer(such as the image that add specific quantity between RAM and register are 640*480, the size that detects target is 20*20, then adding (20+ stepping) individual length is 640 capable buffer), data are first from RAM to buffer, arrive at last again register (referring to Proposed FPGA Hardware Architecture for High Frame Rate (〉 100fps) Face Detection Using Feature Cascade Classifiers---Hung-Chih Lai, Marios Savvides, Tsuhan Chen Department of Electrical and Computer Engineering Carnegie Mellon University; FPGA-Based Face Detection System Using Haar Classifiers---Junguk Cho, Shahnam Mirzaei, Jason Oberg, Ryan Kastner Department of Computer Science and Engineering University of California).
No matter adopt above any design, in the middle of practical application, all can have restriction.First method, its required register number of using is a lot, can only be used for the smaller situation of entire image.Second method, the speed of extracting feature will be dragged the speed of slow whole system too slowly.Process although method three has been carried out compromise to the two kinds of methods in front, additive decrementation a lot of buffer resources.Present stage searches and travels through maximum difficult point based on the integration Graph Character and is: how to carry out fast as far as possible feature extraction with the least possible hardware resource.
Summary of the invention
The object of the invention is to overcome the prior art above shortcomings, the hardware characteristics of searching and traveling through based on integration Graph Character frame is provided.The present invention can obtain compromise at extraction rate and hardware resource well, and concrete technical scheme is as follows.
The hardware characteristics frame of searching and traveling through based on the integration Graph Character, comprise a feature extraction frame and be positioned at three upper and lower, right-hand buffer zones of feature extraction frame, described feature extraction frame is comprised of the register array that is used for storage integrogram data of a row * classify as M * N, M is the natural number greater than 2, and N is the natural number greater than 1; In described feature extraction frame, capable except the top X, capable, the rightmost Y row of below X, each register upwards links to each other with the register that apart from this register is X at upper and lower, on right, link to each other with the register that apart from this register is Y, X is the row stepping, the X value is the natural number less than M/2, and Y is the row stepping, and the Y value is the natural number less than N; Described upper and lower buffer zone forms by the register array that is used for storage integrogram data of row * classify as X * N; Right buffer zone is comprised of the register array of row * classify as the storage integrogram data of M * Y; Each register in the described upper buffer zone and this register of below feature extraction frame middle distance are that the register of X links to each other, each register in the described lower buffer zone and this register of top feature extraction frame middle distance are that the register of X links to each other, and each register in the right buffer zone and this register of left feature extraction frame middle distance are that the register of Y links to each other.
In the above-mentioned hardware characteristics frame, described feature extraction frame is the many input registers array that is used for storage integrogram data of M * N; Described upper and lower buffer zone is single many Output Shift Registers of the input array that is used for storage integrogram data of X * N; Described right buffer zone is single many Output Shift Registers of the input array that is used for storage integrogram data of M * Y.
The present invention is by moving, move down on the above-mentioned hardware characteristics frame and the 3 kinds of basic operations that move to right can be so that the feature extraction frame traveling through complete view picture figure.Described traversal comprise once above repeat by repeatedly move down operation, right-shift operation, move on repeatedly operate and flow process that once right-shift operation forms after finish traversal to whole sub-picture.
Described moving down is operating as: in the described feature extraction frame except the capable register of the top X, each register is write into the data of storing in the register of its top distance for row stepping X, and the register in the described lower buffer zone is write into the data of storing in the register in the connected feature extraction frame.
Described right-shift operation is: the register that is listed as except leftmost Y in the described feature extraction frame, each register is write into its left distance in the register of row stepping Y with the data of storing, and the register in the described right buffer zone is write into the data of storing in the register in the connected feature extraction frame.
Move on described and be operating as: in the described feature extraction frame except the register that below X is capable, each register is write into the data of storing in the register of its below distance for row stepping X, and the register in the described upper buffer zone is write into the data of storing in the register in the connected feature extraction frame.
With respect to prior art, the present invention has following advantage:
When (1) being applied to higher resolution image, needed hardware resource seldom.Take image as 640*480, the size that detects target is 20*20, and stepping is 2 as an illustration.Adopt the used scheme of the present invention to need 520 (20*20+3*2*20) registers.If adopt the scheme of whole integrogram storage to need 307200 (640*480) registers.If adopt adding the scheme of buffer, to need 400 (20*20) registers and 22 degree of depth be 640 block RAM.This shows, adopt scheme of the present invention can effectively reduce hardware resource, and for the higher image of resolution, more can effectively reduce resource requirement.
(2) when effectively reducing hardware resource, can large impact not arranged to processing speed.The present invention can make rapidly next time required basic operation according to the situation of state machine after each time basic operation.When in the feature extraction frame, extracting, data are write in the corresponding buffer zone (buffer zone only being arranged at every turn at work---data writing).Because the two carries out simultaneously, and in most of situation, stepping is smaller, the time spent of feature extraction is longer than data and writes, and can't bring extra time-delay like this.And stepping is large and feature extraction finishes such situation relatively seldom very soon, and in this case, although can bring certain time-delay, this also is complete acceptable compared with the saving of resource.
Description of drawings
Fig. 1 is the structured flowchart of the hardware characteristics frame of searching and traveling through based on the integration Graph Character of the present invention, and reg represents register among the figure.
Fig. 2 be the hardware characteristics frame on move operation, scheming medium and small square frame is register reg.
Fig. 3 is the operation that moves down of hardware characteristics frame, and scheming medium and small square frame is register reg.
Fig. 4 is the right-shift operation of hardware characteristics frame, and scheming medium and small square frame is register reg.
Fig. 5 is the hardware characteristics frame among the embodiment, and scheming medium and small square frame is register reg.
Fig. 6 is the procedure chart of whole picture search scheme.
Embodiment
Below in conjunction with accompanying drawing step of the present invention is further described, but the scope of protection of present invention is not limited to the scope of lower example statement.
Fig. 1 is the structured flowchart of the hardware characteristics frame of searching and traveling through based on the integration Graph Character of the present invention, comprises a feature extraction frame and is positioned at three upper and lower, right-hand buffer zones of feature extraction frame; The feature extraction frame is comprised of the register array that is used for storage integrogram data of a row * classify as M * N, and M is the natural number greater than 2, and N is the natural number greater than 1; In described register array, capable except the top X, capable, the rightmost Y row of below X, each register upwards links to each other with the register that apart from this register is X at upper and lower, on right, link to each other with the register that apart from this register is Y, X is the row stepping, X gets the natural number less than M/2, and Y is the row stepping, and Y gets the natural number less than N; Upper and lower buffer zone forms by the register array that is used for storage integrogram data of row * classify as X * N; Right buffer zone is comprised of the register array of row * classify as the storage integrogram data of M * Y; Each register in the described upper buffer zone and this register of below feature extraction frame middle distance are that the register of X links to each other, each register in the described lower buffer zone and this register of top feature extraction frame middle distance are that the register of X links to each other, and each register in the right buffer zone and this register of left feature extraction frame middle distance are that the register of Y links to each other.
Such as Fig. 2, move on the hardware characteristics frame and be operating as: in the described feature extraction frame except the register that below X is capable, each register is write into the data of storing in the register of its below distance for row stepping X, and the register in the described upper buffer zone is write into the data of storing in the register in the connected feature extraction frame.
Such as Fig. 3, moving down of hardware characteristics frame is operating as: in the described feature extraction frame except the capable register of the top X, each register is write into the data of storing in the register of its top distance for row stepping X, and the register in the described lower buffer zone is write into the data of storing in the register in the connected feature extraction frame.
Such as Fig. 4, the right-shift operation of hardware characteristics frame is: the register that is listed as except leftmost Y in the described feature extraction frame, each register is write into its left distance in the register of row stepping Y with the data of storing, and the register in the described right buffer zone is write into the data of storing in the register in the connected feature extraction frame.
As shown in Figure 5, be the hardware characteristics frame of the present embodiment, its feature extraction frame size is 10 * 10; In the above and below of feature extraction frame, be respectively the buffer zone of a row * behavior 10 * 2, be called buffer zone and lower buffer zone; Right-hand at the feature extraction frame is the buffer zone of a row * behavior 2 * 10, is referred to as right buffer zone.
As shown in Figure 6, the whole image traversal process of the present embodiment is as follows:
When (1) traversal began, the data in the feature extraction frame all were invalid, carry out feature extraction and must extract frame to the most upper left data input feature vector of image first; Because feature extraction frame and periphery do not have interface, so must be first by lower buffer zone input data;
(2) then the lower buffer zone of data inputs once moves down operation, two row of the below of data shift-in feature extraction frame;
(3) repeating step (2), 5 times altogether, until the just whole shift-in feature extraction frames of the most upper left data of image;
(4) carry out an image characteristics extraction because next time operation is also for moving down operation, so the while image more down the view data of two row deposit lower buffer zone in, after this feature extraction is finished, once move down operation;
(5) repeating step (4) is not until image has data toward the below again.At this moment, being operating as next time moves to right, and right buffer zone is started working, and in feature extraction, image deposits right buffer zone in toward the view data of right-hand two row again;
(6) carry out right-shift operation one time, at this moment, being operating as next time moves, and upper buffer zone is started working, and in feature extraction, image deposits buffer zone in toward the view data of top two row again;
(7) move operation on carrying out once, carry out again image characteristics extraction; Simultaneously, because operation next time moves operation on also being, image deposits buffer zone in toward the data data of top two row again;
(8) repeating step (7) is not until image has data toward the top again; At this moment, being operating as next time moves to right, and right buffer zone is started working, and in feature extraction, image deposits right buffer zone in toward the view data of right-hand two row again;
(9) step (4) before repeating is to step (8), as shown in Figure 6, until that whole target image is traversed is complete.
When the present invention was applied to higher resolution image, needed hardware resource seldom.Take image as 640*480, the size that detects target is 20*20, and stepping is 2 to be example.Adopt the used scheme of the present invention to need 520 (20*20+3*2*20) registers.If adopt the scheme of whole integrogram storage to need 307200 (640*480) registers.If adopt adding the scheme of buffer, to need 400 (20*20) registers and 22 degree of depth be 640 block RAM.This shows, adopt scheme of the present invention can effectively reduce hardware resource, and for the higher image of resolution, more can effectively reduce resource requirement.
Claims (4)
1. the hardware characteristics frame register array of searching and traveling through based on the integration Graph Character, it is characterized in that comprising a feature extraction frame and be positioned at three upper and lower, right-hand buffer zones of feature extraction frame, described feature extraction frame is comprised of the register array that is used for storage integrogram data of a row * classify as M * N, M is the natural number greater than 2, and N is the natural number greater than 1; In described feature extraction frame, capable except the top X, capable, the rightmost Y row of below X, each register upwards links to each other with the register that apart from this register is X at upper and lower, on right, link to each other with the register that apart from this register is Y, X is the row stepping, the X value is the natural number less than M/2, and Y is the row stepping, and the Y value is the natural number less than N; Described upper and lower buffer zone forms by the register array that is used for storage integrogram data of row * classify as X * N; Right buffer zone is comprised of the register array that is used for storage integrogram data of row * classify as M * Y; Each register in the described upper buffer zone and this register of below feature extraction frame middle distance are that the register of X links to each other, each register in the described lower buffer zone and this register of top feature extraction frame middle distance are that the register of X links to each other, and each register in the right buffer zone and this register of left feature extraction frame middle distance are that the register of Y links to each other.
2. hardware characteristics frame register array according to claim 1 is characterized in that described feature extraction frame is the many input registers array that is used for storage integrogram data of M * N.
3. hardware characteristics frame register array according to claim 1 is characterized in that described upper and lower buffer zone is single many Output Shift Registers of the input array that is used for storage integrogram data of X * N.
4. each described hardware characteristics frame register array is characterized in that described right buffer zone is single many Output Shift Registers of the input array that is used for storage integrogram data of M * Y according to claim 1 ~ 3.
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