CN102104381A - Frequency synthesizer for 6-9 GHz dual-carrier orthogonal frequency division multiplexing ultra-wideband - Google Patents

Abstract

The invention discloses a frequency synthesizer for a 6-9 GHz dual-carrier orthogonal frequency division multiplexing ultra-wideband, which comprises a phase-locked loop, a first multiplexer, a second multiplexer, a third multiplexer, a first single-sideband mixer, a second single-sideband mixer, a third single-sideband mixer, a fourth single-sideband mixer and a divide-by-two frequency divider, and eight pairs of carrier components and one orthogonal carrier component for 6-9 GHz dual-carrier orthogonal frequency division multiplexing ultra-wideband communication are generated. The frequency generator has the advantages of simple structure, small area and low power consumption, only comprises one phase-locked loop (the traction effect of a plurality of phase-locked loops is avoided), obtains more stable frequency, improves the frequency and the frequency hopping speed of the frequency synthesizer, and meets the requirements of a DC-OFDM UWB communication system.

Description

Frequency Synthesizer for Dual Carrier OFDM UWB from 6 to 9GHz

technical field

The invention relates to the technical field of broadband RF communication, in particular to a frequency synthesizer based on dual-carrier orthogonal frequency division multiplexing ultra-wideband wireless communication.

Background technique

Ultra-Wide Band (UWB) technology is mainly used to realize short-distance, ultra-high-speed wireless communication, and its transmission distance is generally within 10m at present, and the transmission rate can reach 480Mb/s or even higher. The characteristics of UWB's high transmission rate, low power consumption and no interference with existing wireless systems make UWB a hot spot now and in the next five years.

The Multi-Band Orthogonal Frequency Division Multiplexing (MB-OFDM) scheme is one of the main implementation schemes for high-speed ultra-wideband communication at present. The MB-OFDM standard stipulates that an OFDM signal consists of 128 subcarriers, these carriers occupy 528MHz, and the available frequency band is divided into several 528MHz subbands. By modulating the carrier, the baseband UWB signal is transferred to one of the sub-bands in turn for transmission.

The sub-band bandwidth of the MB-OFDM UWB solution is greater than 500MHz, and the spectrum usage is inflexible, the spectrum utilization efficiency is not high, and the requirements for hardware implementation are high. Another implementation mechanism is dual-carrier orthogonal frequency division multiplexing (Dual-Carrier Orthogonal Frequency Division Multiplexing, DC-OFDM) ultra-wideband wireless communication. In the DC-OFDM method, the sub-band has a width of 264 MHz, and two separated sub-bands are used to transmit baseband OFDM signals during communication.

The frequency synthesizer is an important circuit module in the UWB wireless transceiver based on OFDM technology, and it is also a difficult point in the design of the entire transceiver. It needs to be able to hop from one carrier to another in nanoseconds while maintaining spectral purity. Carrier, which is beyond the capability of the frequency synthesizer structure in the traditional narrowband wireless communication system. In addition, the area and power consumption of the frequency synthesizer account for about 50% of the entire wireless transceiver. Therefore, designing a frequency synthesizer with simple structure, small area, low power consumption and meeting the requirements of frequency hopping time will undoubtedly greatly reduce the cost of UWB systems and improve product competitiveness. At present, the industry and academia have not found any reports on the realization of DC-OFDM UWB frequency synthesizers, especially the frequency synthesizers used in DC-OFDM UWB double-conversion zero-IF transceivers are rarely mentioned.

Contents of the invention

(1) Technical problems to be solved

In view of this, the main purpose of the present invention is to provide a frequency synthesizer for DC-OFDM UWB of 6 to 9 GHz, so as to achieve better area and power consumption at the same time, and meet the requirements of the UWB communication system.

(2) Technical solutions

To achieve the above object, the present invention provides a frequency synthesizer for 6 to 9GHz dual-carrier OFDM ultra-wideband, the frequency synthesizer includes a phase-locked loop, a first multiplexer, a second multiplexer way selector, third multiplexer, first SSB mixer, second SSB mixer, third SSB mixer, fourth SSB mixer and a divide-by-two The frequency divider generates eight pairs of carrier components and one orthogonal carrier component for dual-carrier OFDM ultra-wideband communication from 6 to 9 GHz.

In the above solution, the frequency synthesizer adopts direct frequency synthesis technology, and performs frequency addition or subtraction operations on the frequency generated by the phase-locked loop and the frequency output by the multiplexer in the single-sideband mixer, and finally outputs 7656 and 8184MHz , 7920 and 8448MHz, 8712 and 9240MHz, 8976 and 9504MHz, 7656 and 8712MHz, 7920 and 8976MHz, 8184 and 9240MHz, 8448 and 9504MHz eight pairs of carrier signals and one 1320MHz quadrature carrier signal.

In the above scheme, the frequency synthesizer includes:

A phase-locked loop, the phase-locked loop uses the 66MHz signal as the reference frequency signal, and the feedback chain includes seven frequency dividers in turn, outputting a stable 8448MHz quadrature signal to the third SSB mixer and the fourth single sideband mixer;

The first multiplexer is used to receive 528 and 264MHz signals, and select one of the 528 and 264MHz signals through the control of an external signal to output to the first single sideband mixer;

The second multiplexer is used to receive the 1056, 528MHz signal and the DC component, and select one of the 1056, 528MHz signal and the DC component through the control of the external signal to output to the third SSB mixer;

The third multiplexer is used to receive the 1056, 528MHz signal and the DC component, and select one of the 1056, 528MHz signal and the DC component through the control of the external signal to output to the fourth SSB mixer;

The first quadrature single-sideband mixer is used to perform frequency domain phase phase on the quadrature signal received from the phase-locked loop with a frequency of 8448 MHz and the quadrature signal received from the first multiplexer at a frequency of 528 MHz or 264 MHz Add or subtract operations to generate four quadrature signals, respectively 7920MHz (=8448-528), 8184MHz (=8448-264), 8712MHz (=8448+264) and 8976MHz (=8448+528);

The second SSB mixer and a divider by two are used to add the received 2112MHz quadrature signal to the 528MHz quadrature signal in the frequency domain, and the output signal passes through the divider by two to generate a 1320MHz quadrature cross signal, namely f ₀ ;

The third single-sideband mixer and the fourth single-sideband mixer are used to combine the 1056, 528 MHz and DC components received from the second multiplexer and the third multiplexer with those from the first quadrature single The quadrature signals 7920MHz, 8184MHz, 8712MHz and 8976MHz of the sideband mixer are added or subtracted in the frequency domain to obtain 7656 and 8184MHz, 7920 and 8448MHz, 8712 and 9240MHz, 8976 and 9504MHz, 7656 and 8712MHz, 7920 and 8976MHz , 8184 and 9240MHz, 8448 and 9504MHz eight pairs of carrier signals, namely f ₁ and f ₂ .

In the above solution, the phase-locked loop adopts a quadrature voltage-controlled oscillator that directly generates two-way quadrature signals, avoiding the method of using a double-frequency voltage-controlled oscillator and generating quadrature signals through frequency division by two.

In the above scheme, the frequency synthesizer generates the required signals of each frequency point through the method of direct mixing, and then selects the required signal through the multiplexer, and the frequency hopping speed between each frequency point depends on the switch The speed, to achieve nanosecond frequency hopping speed.

(3) Beneficial effects

As can be seen from the foregoing technical solutions, the present invention has the following beneficial effects:

1. This frequency synthesizer for 6 to 9GHz dual-carrier OFDM ultra-wideband provided by the present invention adopts a phase-locked loop, four SSB mixers, three multiplexers and A frequency divider by two generates eight pairs of UWB carrier signals from 6 to 9GHz, which improves the frequency and frequency hopping speed of the frequency synthesizer and meets the requirements of the DC-OFDM UWB communication system.

2. This frequency synthesizer for 6 to 9GHz dual-carrier OFDM ultra-wideband provided by the present invention only uses a phase-locked loop, which avoids the pulling effect of multiple phase-locked loops and improves The frequency stability reduces the design complexity and difficulty.

3. The frequency synthesizer for 6 to 9 GHz dual-carrier OFDM ultra-wideband provided by the present invention generates the signals of the required frequency points by adopting the method of direct frequency mixing, and then passes through a multi-channel The selector is used to select the required signal, so that the frequency hopping speed between each frequency point only depends on the switching speed of the switch, and the nanosecond frequency hopping speed can be fully realized to meet the requirements of the UWB communication system.

4. In the frequency synthesizer for 6 to 9GHz dual-carrier OFDM ultra-wideband provided by the present invention, the phase-locked loop adopts an orthogonal VCO that directly generates I/Q two-way signals, avoiding the need to design The double-frequency VCO then generates quadrature signals through frequency division by two, so that a PLL with a lower frequency can be used, which reduces the difficulty of implementing the PLL and the current consumption.

5. The frequency synthesizer for 6 to 9 GHz dual-carrier OFDM ultra-wideband frequency synthesizer provided by the present invention does not need an orthogonal signal for the high frequency band generated, and only provides an orthogonal signal output at the low frequency band frequency, Therefore, the problem that the phase and amplitude characteristics of the quadrature signal are easily disturbed is avoided, and the design difficulty is reduced.

Description of drawings

Fig. 1 is the allocation figure of the carrier frequency used for the DC-OFDM UWB of 6 to 9GHz provided by the present invention.

Fig. 2 is the structural block diagram of the frequency synthesizer for the DC-OFDM UWB of 6 to 9 GHz provided by the present invention.

Fig. 3 is the frequency relationship operation diagram of the frequency synthesizer for DC-OFDM UWB of 6 to 9 GHz provided by the present invention.

Detailed ways

In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be described in further detail below in conjunction with specific embodiments and with reference to the accompanying drawings.

FIG. 1 is a diagram of carrier frequency allocation for DC-OFDM UWB of 6 to 9 GHz provided by the present invention. As can be seen from the figure, the frequency band from 6204MHz to 8316MHz is divided into eight sub-bands with a width of 264MHz. ). In order to obtain the above-mentioned center frequency, the present invention particularly selects a lower carrier frequency as 1320MHz (i.e. f ₀ ), thereby needing to generate (7656, 7920, 8184, 8448, 8712, 8976, 9240, 9504) (unit MHz) eight frequency, while the corresponding image signal falls between 8976MHz and 10824MHz.

The frequency synthesizer for 6 to 9GHz dual-carrier OFDM ultra-wideband provided by the present invention includes a phase-locked loop, a first multiplexer, a second multiplexer, a third multiplexer, 1st SSB mixer, 2nd SSB mixer, 3rd SSB mixer, 4th SSB mixer, and a divide-by-two frequency divider for 6 to 9 GHz Eight pairs of carrier components and one orthogonal carrier component for dual-carrier OFDM UWB communication. The frequency synthesizer adopts direct frequency synthesis technology, and performs frequency addition or subtraction operations on the frequency generated by the phase-locked loop and the frequency output by the multiplexer in the single-sideband mixer, and finally outputs 7656 and 8184MHz, 7920 and 8448MHz , 8712 and 9240MHz, 8976 and 9504MHz, 7656 and 8712MHz, 7920 and 8976MHz, 8184 and 9240MHz, 8448 and 9504MHz eight pairs of carrier signals and one 1320MHz quadrature carrier signal.

Shown in Fig. 2 is the structural block diagram of the frequency synthesizer for the DC-OFDM UWB of 6 to 9GHz that the present invention provides, and this frequency synthesizer comprises phase-locked loop, the first multiplexer, the second multiplexer, A third multiplexer, a first SSB mixer, a second SSB mixer, a third SSB mixer, a fourth SSB mixer, and a divide-by-two frequency divider.

Among them, the fixed-frequency phase-locked loop, the phase-locked loop uses the 66MHz signal as the reference frequency signal, and the feedback chain includes seven frequency dividers in turn, outputting a stable 8448MHz quadrature signal to the third SSB mixer ers with a fourth SSB mixer.

The first multiplexer is used to select one of the received 528 and 264MHz signals through external signal control to output to the first single-sideband mixer

The second multiplexer is used to select one of the received 1056, 528MHz signals and direct current components (DC) through external signal control to output to the third SSB mixer;

The third multiplexer is used to select one of the received 1056, 528MHz signals and direct current components (DC) through external signal control to output to the fourth single sideband mixer;

The first quadrature single-sideband mixer is used to combine the quadrature (I/Q) signal (frequency of 8448MHz) received from the PLL with the quadrature signal (frequency of 528MHz or 264MHz) to perform frequency domain addition or subtraction operations to generate four orthogonal signals, which are 7920MHz (=8448-528), 8184MHz (=8448-264), 8712MHz (=8448+264), 8976MHz (=8448 +528);

The second single sideband mixer and a frequency divider by two are used to add the received 2112MHz quadrature (I/Q) signal to the 528MHz quadrature signal in the frequency domain, and the output signal is divided by two device, thereby generating a 1320MHz quadrature signal, namely f ₀ ;

The third single-sideband mixer and the fourth single-sideband mixer are used to combine the 1056, 528 MHz and DC components received from the second multiplexer and the third multiplexer with those from the first quadrature single The quadrature signals (7920MHz, 8184MHz, 8712MHz, 8976MHz) of the sideband mixer are added or subtracted in the frequency domain to obtain (7656, 8184) (7920, 8448) (8712, 9240) (8976, 9504) ( 7656, 8712) (7920, 8976) (8184, 9240) (8448, 9504) (in MHz) eight pairs of carrier signals, namely (f ₁ , f ₂ );

Wherein, the phase-locked loop uses a quadrature voltage-controlled oscillator (QVCO) that directly generates I/Q two-way signals, avoiding the method of using a double-frequency VCO and then generating quadrature signals by dividing by two, thereby adopting a lower frequency The fixed-frequency phase-locked loop reduces the difficulty of hardware implementation. The frequency synthesizer generates the required signals of each frequency point by using the method of direct frequency mixing, and then selects the required signal through the multiplexer. The frequency hopping speed between each frequency point depends on the speed of the switch, which realizes Nanosecond frequency hopping speed. The frequency synthesizer only includes one phase-locked loop to generate the required eight pairs of carrier signals and one quadrature carrier signal, which avoids the pulling effect easily caused by multiple phase-locked loops, ensures the stability of the hardware, and reduces the Design difficulty.

Referring to Fig. 2 again, the frequency synthesizer includes the following circuit modules: an 8448MHz integer PLL, three multiplexers, four SSB mixers and a frequency divider by two.

The specific frequency synthesis scheme is given below:

The 8448MHz PLL uses a crystal oscillator frequency of 66MHz, and the frequency division ratio is 2×2×2×2×2×2×2, which finally produces 66M×2×2×2×2×2×2×2=8448MHz Output, the VCO of the phase-locked loop adopts the QVCO that can directly generate I/Q two-way signals. The quadrature signals of 264MHz, 528MHz, 1056MHz and 2112MHz are generated in the frequency division process of the phase-locked loop.

The 2112MHz quadrature signal and the 528MHz quadrature signal generated in the above-mentioned PLL are delivered to the second single-sideband mixer to generate a frequency-domain added component of 2112MHz+528MHz, which is then delivered to the next stage divider by two to generate ( 2112MHz+528MHz)/2=1320MHz quadrature signal, that is, the carrier frequency f ₀ .

The 8448MHz quadrature signal generated by the above PLL and the quadrature signal (528MHz or 264MHz) output by the first multiplexer are transmitted to the first quadrature single-sideband mixer together to generate quadrature signals added or subtracted in the frequency domain The signal components are 7920MHz (=8448-528), 8184MHz (=8448-264), 8712MHz (=8448+264), and 8976MHz (=8448+528), respectively.

7920MHz, 8184MHz, 8712MHz, 8976MHz quadrature signals generated in the above-mentioned first quadrature single-sideband mixer and quadrature signals (1056MHz or 528MHz or DC) output by the first multiplexer and the second multiplexer Passed to the second SSB mixer and the third SSB mixer together to generate signal components added or subtracted in the frequency domain to obtain (7656, 8184) (7920, 8448) (8712, 9240) ( 8976, 9504) (7656, 8712) (7920, 8976) (8184, 9240) (8448, 9504) (in MHz) eight pairs of carrier frequencies, namely (f ₁ , f ₂ ), please refer to the figure for the specific frequency operation relationship 3.

The above three multiplexers are respectively controlled by external signals to realize the required frequency output at the same time.

This frequency synthesizer for DC-OFDM UWB of 6 to 9GHz provided by the present invention can output (7656, 8184) (7920, 8448) (8712, 9240) (8976, 9504) by adopting direct frequency synthesis technology (7656, 8712) (7920, 8976) (8184, 9240) (8448, 9504) (in MHz) eight pairs of carrier frequencies and one orthogonal carrier frequency, and the frequency hopping time between each frequency point is in nanoseconds It can meet the fast frequency hopping requirements of the DC-OFDM UWB communication system.

In addition, the frequency synthesizer outputs an I/Q local oscillator signal and eight pairs of non-I/Q carrier signals, which can be applied to a DC-OFDMUWB wireless transceiver with double frequency conversion and zero intermediate frequency.

The specific embodiments described above have further described the purpose, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above descriptions are only specific embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention shall be included within the protection scope of the present invention.

Claims (5)

1. A frequency synthesizer for 6 to 9GHz dual-carrier OFDM ultra-wideband, characterized in that, the frequency synthesizer comprises a phase-locked loop, the first multiplexer, the second multiplexer , a third multiplexer, a first SSB mixer, a second SSB mixer, a third SSB mixer, a fourth SSB mixer, and a divide-by-two frequency divider , generating eight pairs of carrier components and one orthogonal carrier component for dual-carrier OFDM ultra-wideband communication from 6 to 9 GHz. 2. the frequency synthesizer that is used for 6 to 9GHz dual-carrier OFDM ultra-wideband according to claim 1, is characterized in that, this frequency synthesizer adopts direct frequency synthesis technology, by the phase-locked loop that produces The frequency and the frequency output by the multiplexer are added or subtracted in the single sideband mixer, and the final output is 7656 and 8184MHz, 7920 and 8448MHz, 8712 and 9240MHz, 8976 and 9504MHz, 7656 and 8712MHz, 7920 and 8976MHz, 8184 and 9240MHz, 8448 and 9504MHz eight pairs of carrier signals and one 1320MHz quadrature carrier signal. 3. the frequency synthesizer that is used for 6 to 9GHz dual-carrier OFDM ultra-wide band according to claim 1, is characterized in that, this frequency synthesizer comprises: A phase-locked loop, the phase-locked loop uses the 66MHz signal as the reference frequency signal, and the feedback chain includes seven frequency dividers in turn, outputting a stable 8448MHz quadrature signal to the third SSB mixer and the fourth single sideband mixer; The first multiplexer is used to receive 528 and 264MHz signals, and select one of the 528 and 264MHz signals through the control of an external signal to output to the first single sideband mixer; The second multiplexer is used to receive the 1056, 528MHz signal and the DC component, and select one of the 1056, 528MHz signal and the DC component through the control of the external signal to output to the third SSB mixer; The third multiplexer is used to receive the 1056, 528MHz signal and the DC component, and select one of the 1056, 528MHz signal and the DC component through the control of the external signal to output to the fourth SSB mixer; The first quadrature single-sideband mixer is used to perform frequency domain phase phase on the quadrature signal received from the phase-locked loop with a frequency of 8448 MHz and the quadrature signal received from the first multiplexer at a frequency of 528 MHz or 264 MHz Add or subtract operations to generate four quadrature signals, respectively 7920MHz (=8448-528), 8184MHz (=8448-264), 8712MHz (=8448+264) and 8976MHz (=8448+528); The second SSB mixer and a divider by two are used to add the received 2112MHz quadrature signal to the 528MHz quadrature signal in the frequency domain, and the output signal passes through the divider by two to generate a 1320MHz quadrature cross signal, namely f ₀ ; The third single-sideband mixer and the fourth single-sideband mixer are used to combine the 1056, 528 MHz and DC components received from the second multiplexer and the third multiplexer with those from the first quadrature single The quadrature signals 7920MHz, 8184MHz, 8712MHz and 8976MHz of the sideband mixer are added or subtracted in the frequency domain to obtain 7656 and 8184MHz, 7920 and 8448MHz, 8712 and 9240MHz, 8976 and 9504MHz, 7656 and 8712MHz, 7920 and 8976MHz , 8184 and 9240MHz, 8448 and 9504MHz eight pairs of carrier signals, namely f ₁ and f ₂ . 4. the frequency synthesizer for 6 to 9GHz dual-carrier OFDM ultra-wide band according to claim 1 or 3, is characterized in that, described phase-locked loop adopts the quadrature that directly produces two-way quadrature signal Alternating voltage-controlled oscillators, avoiding the method of using double-frequency voltage-controlled oscillators and generating quadrature signals by dividing by two. 5. the frequency synthesizer for 6 to 9GHz dual-carrier OFDM ultra-wideband according to claim 1 or 3, is characterized in that, this frequency synthesizer produces required by adopting the method for direct frequency mixing The signals of each frequency point are then selected by the multiplexer to select the required signal. The frequency hopping speed between each frequency point depends on the speed of the switch, and the frequency hopping speed of nanosecond level is realized.

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