CN102087874B - General memory input and output generating device and method - Google Patents
General memory input and output generating device and method Download PDFInfo
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Abstract
The invention relates to a general memory input and output generating device and method. The general memory input and output generating device comprises a defining module, a capturing module, a generating module and an arranging module, wherein the defining module is used for defining a comparison table according to a pin configuration state of a plurality of inputs and outputs; the comparison table comprises a corresponding relation between the inputs and outputs and a plurality of memory functions; the capturing module is used for capturing control information corresponding to the comparison table from a plurality of candidate control information; the candidate control information relates to the corresponding relation between the inputs and outputs and the memory functions; the generating module is used for generating a hardware describing language file according to the control information; and the arranging module is used for programming the inputs and outputs according to the hardware describing language file so that the inputs and outputs respectively correspond to the corresponding memory function.
Description
Technical field
The present invention is relevant with the input and output (I/O) of storer, especially, be about a kind of usefulness so that the input and output position of electronic installation can be automatically corresponding to the various memory functions of different memory pattern and so that these memory functions can satisfy general-purpose storage input and output generation device and the method that the different size of different memory pattern requires.
Background technology
In recent years, along with present on the market messaging device gradually towards the future development of real-time application, such as audio-visual synchronous broadcast, image capture in the multimedia application or record etc., the specification of adding CPU (central processing unit) constantly promotes, therefore, messaging device is also more and more high for the requirement of the message transmission rate of storage arrangement.
For example, because traditional Synchronous Dynamic Random Access Memory (Synchronous DynamicRandom Access Memory, the action that SDRAM) only can once read or write in the rising edge of each square wave in the cycle at a clock pulse, when needs carry out read and write simultaneously, just can proceed next action after just will waiting one of them action to finish.In order to solve this shortcoming, the action that first generation double data rate Synchronous Dynamic Random Access Memory DDR (Double Data Rate) SDRAM can be respectively in the cycle once read or write at rising edge and the falling edge of each square wave in same clock pulse, that is its data rate can be the twice of system's clock pulse, therefore the data transmission rate of DDR SDRAM can reach the twice of traditional SDRAM.Afterwards, the development DDR2SDRAM in new two generations and the DDR3SDRAM of the third generation out provides than the higher operation usefulness of DDR SDRAM and lower voltage successively, its data transmission rate can be promoted to respectively more than four times of traditional SDRAM and the octuple, replacing gradually DDR SDRAM at present becomes main product on the market.
In order to reach faster effect of more power saving and transfer efficiency, DDR2 SDRAM and the DDR3SDRAM of a new generation have adopted the packaged type different from traditional DDR SDRAM and input and output configuration status, and increased considerable memory function, for example, DDR2SDRAM has increased the control modes such as ODT, OCD, Posted CAS and AL; DDR3SDRAM has then also increased the functions such as CWD, Reset, ZQ, SRT and PASR, so that DDR3 SDRAM is achieved write latency, super power saving standby, terminal resistance calibration, programmable temperature control store clock pulse and locally the brand-new function such as refreshes.
In practical application, electronic installation can adopt different types of SDRAM according to its actual demand, the high-order electronic installation of for example quite paying attention to the memory data transmission speed DDR3SDRAM of speed that can arrange in pairs or groups; Electronic installation as for lower-order is lower owing to its requirement for the memory data transmission speed, therefore the slow DDR SDRAM that only need arrange in pairs or groups gets final product.Yet, because input and output configuration status and the corresponding memory function of each input and output of DDR SDRAM, DDR2SDRAM and DDR3SDRAM all are not quite similar, and DDR SDRAM, DDR2 SDRAM and DDR3 SDRAM are neither compatible each other, and causing need provide corresponding separately design in different chips for different storer specifications such as DDR SDRAM, DDR2 SDRAM and DDR3 SDRAM; That is present technology still can't be so that the input and output of same chip can be common to the different storer specifications such as DDR SDRAM, DDR2 SDRAM and DDR3 SDRAM, thereby cause manufacturing cost significantly to improve, unfavorable its competitive power on market.
In addition, (the DDR SDRAM for example because different SDRAM storer, DDR2 SDRAM and DDR3SDRAM) for same memory function (data strobe for example, data address, clock etc.) all have different separately electrical specifications and the requirement of speed equal-specification, difference therebetween even suitable large, therefore, when the designer respectively for DDR SDRAM, when DDR2 SDRAM and DDR3 SDRAM design, for so that different memory functions can satisfy the requirement separately of different DDR storeies, the designer certainly will want very many time of ancillary cost and spirit to go to carry out necessary electrical specification and the adjustment programme of speed equal-specification, thereby causes whole reservoir designs flow process to become very consuming time and tediously long.
Summary of the invention
Therefore, fundamental purpose of the present invention is to provide a kind of general-purpose storage input and output generation device and method, to address the above problem.
A kind of general-purpose storage input and output generation device is provided according to an aspect of the present invention.This general-purpose storage input and output generation device comprises a definition module, an acquisition module, a generation module and a layout modules.This definition module is in order to the pin configuration status definition comparison list according to a plurality of input and output.This table of comparisons comprises the corresponding relation between these input and output and a plurality of memory function.This acquisition module is in order to capture the control information corresponding to this table of comparisons in a plurality of candidate's control informations.These candidate's control informations relate to the corresponding relation between these input and output and these memory functions.This generation module is in order to produce a hardware description language file according to this control information.This layout modules is in order to according to these these input and output of hardware description language file routineization, so that these input and output are separately corresponding to its corresponding memory function.
A kind of general-purpose storage input and output production method is provided according to a further aspect of the invention.This general-purpose storage input and output production method comprises the following step: at first, according to the pin configuration status definition comparison list of a plurality of input and output, this table of comparisons comprises the corresponding relation between these input and output and a plurality of memory function; Then, acquisition is corresponding to a control information of this table of comparisons in a plurality of candidate's control informations, and these candidate's control informations relate to the corresponding relation between these input and output and these memory functions; Then, produce a hardware description language file according to this control information; Afterwards, according to these these input and output of hardware description language file routineization, so that these input and output are separately corresponding to its corresponding memory function.
Compared to prior art, no matter electronic installation is to adopt DDR SDRAM, DDR2 SDRAM or DDR3SDRAM, all can automatically distribute accordingly each corresponding memory function in input and output position according to its input and output configuration status according to general-purpose storage input and output generation device of the present invention and method, and so that all can automatically satisfy different DDR storeies separately for its electrical specification and the requirement of speed equal-specification corresponding to the memory function of different pins, and the same memory function also can correspond respectively to the different input and output position in the various input and output encapsulation patterns, therefore, which kind of SDRAM storer specification what no matter electronic installation adopted is, general-purpose storage input and output generation device of the present invention and method all can define these general-purpose storage input and output in the same chip accordingly, make it be applicable to this kind SDRAM storer specification.
By this, when the designer carries out the chip circuit design, namely do not need for DDR SDRAM, the different storer specifications such as DDR2SDRAM and DDR3 SDRAM provide corresponding separately design in different chips, only need see through general-purpose storage input and output generation device of the present invention and method and define accordingly these general-purpose storage input and output in the same chip for this kind storer specification, can make it be applicable to this kind storer specification, therefore can significantly shorten the required time of circuit design of this chip, so that the whole manufacturing cost of this chip can reduce effectively, use promoting its competitive power on market.
Description of drawings
Can be by below in conjunction with accompanying drawing the detailed description of preferred embodiment of the present invention being obtained clearer understanding, wherein about the advantages and spirit of the present invention:
Fig. 1 is the functional block diagram that illustrates according to the general-purpose storage input and output generation device of the first specific embodiment of the present invention.
Fig. 2 is the process flow diagram that illustrates according to the general-purpose storage input and output production method of the second specific embodiment of the present invention.
Embodiment
Fundamental purpose of the present invention is to propose a kind of general-purpose storage input and output generation device and method.The first specific embodiment according to the present invention is a kind of general-purpose storage input and output generation device.Please refer to Fig. 1, Fig. 1 is the functional block diagram that illustrates this general-purpose storage input and output generation device.As shown in Figure 1, general-purpose storage input and output generation device 1 comprises definition module 10, acquisition module 12, generation module 14, database 16, sets up module 18 and layout modules 20.Wherein, definition module 10 is coupled to acquisition module 12; Acquisition module 12 is coupled to generation module 14 and database 16; Generation module 14 is coupled to layout modules 20; Set up module 18 and be coupled to database 16.Next, each module and the function thereof that comprises with regard to above-mentioned general-purpose storage input and output generation device 1 respectively is introduced.
In this embodiment, general-purpose storage input and output generation device 1 set up module 18 in order to set up a plurality of candidate's control informations and it is stored in the database 16.In fact, these candidate's control informations can comprise corresponding to different storer patterns (such as DDR SDRAM, DDR2 SDRAM and DDR3 SDRAM etc., but not as the limit) various memory functions (such as CLK, ADD and CMD etc., but not as the limit) software and the related setting of register.In the present invention, the related setting of above-mentioned these softwares and register in order in sequencing one electronic installation corresponding to a plurality of input and output of DDR memory function, use so that these input and output can have its corresponding memory function separately.In fact, this electronic installation has also comprised the input and output corresponding to other function in addition except comprising these input and output corresponding to the DDR memory function, there is no certain restriction.
Then, will be introduced with regard to the definition module 10 of general-purpose storage input and output generation device 1.In this embodiment, about these pin configuration statuses definition comparison list corresponding to the input and output of DDR memory function, wherein this table of comparisons includes the corresponding relation between these input and output and a plurality of memory function to definition module 10 in order to basis.
Table one
Please refer to table one, table one is an example of the definition module 10 defined tables of comparisons.Suppose that electronic installation comprises 64 input and output (I/O pin) position altogether, its numbering is respectively IO0～IO63, is among IO0～IO63 ten the input and output positions such as IO10～IO19 corresponding to the DDR memory function shown in the table one.In fact, input and output number and the position corresponding to the DDR memory function there is no certain restriction in the electronic installation.Generally speaking, these input and output corresponding to the DDR memory function are arranged at adjacent pin position usually, but also may separately be arranged at different pin positions, look closely actual demand and decide.In addition, some input and output is a possibility pattern corresponding to some DDR storer also, but not the pattern of all DDR storeies, for example IO15 is only corresponding to the DQ function of DDR pattern and the ADD function of DDR2 pattern.
For example, suppose that this electronic installation is the SDRAM storer that adopts DDR2 or DDR3 pattern, use the memory data transmission speed that reaches higher, correspond respectively to different DDR memory functions when as shown in Table 1, being applied to DDR2 or DDR3 pattern corresponding to the input and output position IO10～IO19 of DDR memory function in the electronic installation.
Examination is take IO10 as example, IO10 is the function corresponding to ADD (addressing) when being applied to the DDR2 pattern, it then is the function corresponding to CLK (clock pulse) when being applied to the DDR3 pattern, because DDR2 SDRAM storer requires for the electrical specification of ADD function and speed equal-specification and DDR3 SDRAM storer is known for the electrical specification of CLK function and the relevant information of speed equal-specification requirement, therefore general-purpose storage input and output generation device 1 can be applied mechanically known specification requirement relevant information automatically input and output IO10 is carried out necessary setting and adjustment, so that no matter input and output IO10 is the CLK function that has the ADD function of DDR2 pattern or have the DDR3 pattern, all can satisfy its electrical specification and requirement of speed equal-specification separately.
In addition, if take IO17 as example, no matter IO17 is all to be corresponding to the ADD function when being applied to DDR2 or DDR3 pattern, identical memory function although IO17 is corresponding, yet, as aforementioned, because DDR2SDRAM storer and DDR3SDRAM storer require not identical for the electrical specification of ADD function with the speed equal-specification, therefore, general-purpose storage input and output generation device 1 still must be applied mechanically respectively the known specification requirement relevant information corresponding to the ADD function of DDR2 and DDR3 pattern automatically, use so that no matter input and output IO17 is the ADD function with DDR2 or DDR3 pattern, all can satisfy its electrical specification and requirement of speed equal-specification separately.
In practical application, the encapsulation pattern that the SDRAM storer of DDR, DDR2 and DDR3 pattern adopts is also without certain restriction, and for example ball grid array (Ball Grid Array, BGA) encapsulates or other encapsulation pattern.
By this, namely be not limited to only the some input and output position in the electronic installation to be distributed to a certain memory function regularly by general-purpose storage input and output generation device 1 of the present invention, and can distribute to different memory functions according to the storer that is applied to different types, effectively to increase the elasticity in the chip circuit design.The more important thing is, which kind of SDRAM storer specification what no matter electronic installation adopted is, general-purpose storage input and output generation device 1 of the present invention all can define these general-purpose storage input and output in the same chip accordingly, make it be applicable to this kind SDRAM storer specification, not needing additionally provides corresponding separately design in different chips for different storer specifications such as DDR SDRAM, DDR2 SDRAM and DDR3 SDRAM.
In this embodiment, the acquisition module 12 of general-purpose storage input and output generation device 1 is in order to capture the control information corresponding to this table of comparisons in these candidate's control informations.Then, generation module 14 will produce a hardware description language file, autoplacement coiling rule and a coordinate information according to this control information.Wherein, this hardware description language file can be that a verilog describes shelves, but not as limit.
At last, layout modules 20 is carried out autoplacement in order to and this coordinate information regular according to this autoplacement coiling to these input and output and is wound the line to produce a circuit layout, and according to these input and output of hardware description language file routineization, make it have separately corresponding memory function.
In practical application, layout modules 20 can further add a locked loop to this circuit layout, uses the program of finishing whole autoplacement coiling.For example, this locked loop can be a delay-locked loop (Delay Locked Loop, DLL) or a phase-locked loop (Phase Locked Loop, PLL), but not as limit.
The second specific embodiment according to the present invention is a kind of general-purpose storage input and output production method.Please refer to Fig. 2, Fig. 2 is the process flow diagram that illustrates this general-purpose storage input and output production method.As shown in Figure 2, at first, the method execution in step S10 sets up a plurality of candidate's control informations and it is stored in the database.In practical application, these candidate's control informations can comprise corresponding to the software of the various memory functions (for example CLK, ADD and CMD) of different types of storer pattern (for example DDR SDRAM, DDR2 SDRAM and DDR3 SDRAM) and the related setting of register, in order to a plurality of input and output of sequencing one electronic installation, so that these input and output can have its corresponding memory function separately.
Then, the method execution in step S11 is according to the pin configuration status definition comparison list of these input and output of this electronic installation.Wherein, this table of comparisons includes the corresponding relation between these input and output and a plurality of memory function.Its concrete instance then please refer to table one and related description thereof in the previous embodiment, does not give unnecessary details separately in this.
Then, the method execution in step S12, certainly in stored these candidate's control informations of this database acquisition corresponding to a control information of this table of comparisons.Then, the method execution in step S13 produces a hardware description language file according to this control information.For example, the input and output IO2 that supposes a certain electronic installation is the CWD function corresponding to the DDR3 pattern, at this moment, the method captures the control information corresponding to the CWD function of DDR3 pattern in namely can the numerous candidate's control information from database, and the verilog hardware description language file that produces according to this control information carries out sequencing to the input and output IO2 of this electronic installation, use so that input and output IO2 not only can have corresponding CWD function when being applied to DDR3SDRAM automatically, and can satisfy DDR3SDRAM for electrical specification and the requirement of speed equal-specification of CWD function.
In practical application, but also execution in step S14 of the method produces autoplacement coiling rule and coordinate information according to this control information.In step S15, the method is carried out the autoplacement coiling according to this autoplacement coiling rule and this coordinate information to these input and output, to produce a circuit layout.At last, the method execution in step S 16 adds locked loop (for example delay-locked loop or phase-locked loop, but not as limit), to finish the program of whole autoplacement coiling in this circuit layout.
Compared to prior art, no matter electronic installation is to adopt which kind of SDRAM storer specification, all can automatically distribute accordingly each corresponding memory function in input and output position according to its input and output configuration status according to general-purpose storage input and output generation device of the present invention and method, and so that all can automatically satisfy different DDR storer specifications separately for its electrical specification and the requirement of speed equal-specification corresponding to the memory function of different pins, and the same memory function also can correspond respectively to the different input and output position in the various input and output encapsulation patterns, therefore, which kind of SDRAM storer specification what no matter electronic installation adopted is, general-purpose storage input and output generation device of the present invention and method all can define these general-purpose storage input and output in the same chip accordingly, make it be applicable to this kind SDRAM storer specification.
By this, when the designer carries out the chip circuit design, namely do not need for DDR SDRAM, the storer specification that DDR2SDRAM and DDR3SDRAM etc. are different provides corresponding separately design in different chips, only need define accordingly these general-purpose storage input and output in the same chip for this kind storer specification by general-purpose storage input and output generation device of the present invention and method, can make it be applicable to this kind storer specification, therefore can significantly shorten the required time of circuit design of this chip, so that the whole manufacturing cost of this chip can reduce effectively, use promoting its competitive power on market.
By the above detailed description of preferred embodiments, be to wish more to know to describe feature of the present invention and spirit, and be not to come category of the present invention is limited with above-mentioned disclosed preferred embodiment.On the contrary, its objective is that hope can contain in the category of claim of being arranged in of various changes and tool equality institute of the present invention wish application.
Claims (18)
1. general-purpose storage input and output generation device comprises:
One definition module, in order to the pin configuration status definition comparison list according to a plurality of input and output, this table of comparisons comprises the corresponding relation between these input and output and a plurality of memory function;
One acquisition module is coupled to this definition module, and in order to acquisition is corresponding to a control information of this table of comparisons in a plurality of candidate's control informations, these candidate's control informations relate to the corresponding relation between these input and output and these memory functions;
One generation module is coupled to this acquisition module, in order to produce a hardware description language file according to this control information; And
One layout modules is in order to according to these these input and output of hardware description language file routineization, so that these input and output are separately corresponding to its corresponding memory function.
2. general-purpose storage input and output generation device according to claim 1 is characterized in that, also comprises:
One sets up module, in order to set up these candidate's control informations and it is stored in the database, captures for this acquisition module.
3. general-purpose storage input and output generation device according to claim 1 is characterized in that, these candidate's control informations comprise corresponding to the software of these memory functions of multiple memorizers pattern and the related setting of register.
4. general-purpose storage input and output generation device according to claim 3, it is characterized in that, these storer patterns comprise first generation Double Data Rate Synchronous Dynamic Random Access Memory, second generation Double Data Rate Synchronous Dynamic Random Access Memory and third generation Double Data Rate Synchronous Dynamic Random Access Memory.
5. general-purpose storage input and output generation device according to claim 3, it is characterized in that, input and output in these input and output are optionally corresponding to a first memory function of the first memory pattern in these storer patterns and a second memory function of a second memory pattern, and this first memory function differs from this second memory function.
6. general-purpose storage input and output generation device according to claim 5, it is characterized in that, these these input and output of general-purpose storage input and output generation device sequencing, when causing an electronic installation to adopt this first memory pattern, these input and output can be satisfied this first memory pattern for one first specification requirement of this first memory function, when this electronic installation adopted this second memory pattern, these input and output can be satisfied this second memory pattern for one second specification requirement of this second memory function.
7. general-purpose storage input and output generation device according to claim 1 is characterized in that, this generation module also produces autoplacement coiling rule and a coordinate information according to this control information.
8. general-purpose storage input and output generation device according to claim 7 is characterized in that, this layout modules is also carried out the autoplacement coiling according to this autoplacement coiling rule and this coordinate information to these input and output, to produce a circuit layout.
9. general-purpose storage input and output generation device according to claim 8 is characterized in that, this layout modules also adds a locked loop to this circuit layout.
10. general-purpose storage input and output production method comprises the following step:
According to the pin configuration status definition comparison list of a plurality of input and output, this table of comparisons comprises the corresponding relation between these input and output and a plurality of memory function;
Acquisition is corresponding to a control information of this table of comparisons in a plurality of candidate's control informations, and these candidate's control informations relate to the corresponding relation between these input and output and these memory functions;
Produce a hardware description language file according to this control information; And
According to these these input and output of hardware description language file routineization, so that these input and output are separately corresponding to its corresponding memory function.
11. general-purpose storage input and output production method according to claim 10 is characterized in that, also comprises the following step:
Set up these candidate's control informations.
12. general-purpose storage input and output production method according to claim 10 is characterized in that these candidate's control informations comprise corresponding to the software of these memory functions of multiple memorizers pattern and the related setting of register.
13. general-purpose storage input and output production method according to claim 12, it is characterized in that, these storer patterns comprise first generation Double Data Rate Synchronous Dynamic Random Access Memory, second generation Double Data Rate Synchronous Dynamic Random Access Memory and third generation Double Data Rate Synchronous Dynamic Random Access Memory.
14. general-purpose storage input and output production method according to claim 12, it is characterized in that, after these input and output are by sequencing, input and output in these input and output are optionally corresponding to a first memory function of the first memory pattern in these storer patterns and a second memory function of a second memory pattern, and this first memory function differs from this second memory function.
15. general-purpose storage input and output production method according to claim 14, it is characterized in that, when an electronic installation adopts this first memory pattern, these input and output can be satisfied this first memory pattern for one first specification requirement of this first memory function, when this electronic installation adopted this second memory pattern, these input and output can be satisfied this second memory pattern for one second specification requirement of this second memory function.
16. general-purpose storage input and output production method according to claim 10 is characterized in that, also comprises the following step:
Produce autoplacement coiling rule and a coordinate information according to this control information.
17. general-purpose storage input and output production method according to claim 16 is characterized in that, also comprises the following step:
According to this autoplacement coiling rule and this coordinate information the autoplacement coiling is carried out in these input and output, to produce a circuit layout.
18. general-purpose storage input and output production method according to claim 17 is characterized in that, also comprises the following step:
Add a locked loop to this circuit layout.
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Effective date of registration: 20201020 Address after: No. 1, Xingzhu Road, Hsinchu Science Park, Taiwan, China Patentee after: MEDIATEK Inc. Address before: 518057, Guangdong, Shenzhen hi tech Zone, South District, science and technology, South ten road, Shenzhen Institute of Aerospace Science and technology innovation, C block, building 4 Patentee before: Mstar Semiconductor,Inc. Patentee before: MEDIATEK Inc. Effective date of registration: 20201020 Address after: 4 / F, block C, Shenzhen Aerospace Science and Technology Innovation Research Institute, science and technology south 10th Road, South District, Shenzhen high tech Zone, Guangdong Province Patentee after: Mstar Semiconductor,Inc. Patentee after: MEDIATEK Inc. Address before: 518057, Guangdong, Shenzhen hi tech Zone, South District, science and technology, South ten road, Shenzhen Institute of Aerospace Science and technology innovation, C block, building 4 Patentee before: Mstar Semiconductor,Inc. Patentee before: MSTAR SEMICONDUCTOR Inc. |
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