CN102063291A - Multilevel parallel execution method of speculation thread - Google Patents
Multilevel parallel execution method of speculation thread Download PDFInfo
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- CN102063291A CN102063291A CN2011100065604A CN201110006560A CN102063291A CN 102063291 A CN102063291 A CN 102063291A CN 2011100065604 A CN2011100065604 A CN 2011100065604A CN 201110006560 A CN201110006560 A CN 201110006560A CN 102063291 A CN102063291 A CN 102063291A
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Abstract
The invention discloses a multilevel parallel execution method of a speculation thread. The method is characterized by comprising the following steps of: (1) extracting a speculation thread STi which can be executed in parallel from a serial program required to be executed; (2) preprocessing the extracted speculation thread STi which can be executed in parallel and marking a module which can be executed in parallel; (3) executing the speculation thread STi generated in the step (2) according to a speculation parallel execution rule until the thread execution is finished; then judging whether the executed speculation thread STi is needed to be restarted, and if so, executing the thread by adopting a non-speculation thread; and if not, submitting the speculation thread. The method can indirectly eliminate necessary data synchronization and data dependency, thereby effectively avoiding computer resource waste caused by thread waiting and swap-in and swap-out of thread resources from a processor and an internal memory, sufficiently utilizing the computer resources and improving the execution efficiency of the program.
Description
Technical field
The present invention relates to a kind of multistage parallel manner of execution of foresight thread, belong to field of computer technology.
Background technology
Along with the continuous development of computer technology, (Chip Multi-Processors, CMP) technology has become one of gordian technique that improves processor performance to the monolithic polycaryon processor, is applied in every field widely.The monolithic multi-core technology is come executed in parallel by integrated a plurality of simple relatively microcontroller cores on chip piece, improves the performance of system, and reduces the power consumption of processor.The key of utilizing the CMP technology to improve system performance is to bring into play the parallel processing advantage of a plurality of microcontroller cores, the execution efficient of raising program on polycaryon processor comprehensively.
Thread-level prediction (Thread-Level Speculative, TLS) technology, under uncertain situation, create in advance and guess that carrying out some may need the thread carried out in the future, by prediction carry out and corresponding prediction error detection mechanism can remove unnecessary data synchronous, find and safeguard that real data are relevant, thereby reduce the difficulty of thread dividing, become and improve effective way that Thread-Level Parallelism is carried out.But it is synchronous still to exist some data necessary between the thread that utilizes foresight technology to extract, and the wait that this will form when the thread executed in parallel between the thread influences the efficient that thread parallel is carried out.Therefore, how to optimize thread execution, avoiding factor is one of gordian technique in the serial program parallelization according to forming thread waits synchronously.
Summary of the invention
The objective of the invention is to have problems at prior art, provide a kind of multistage parallel manner of execution of foresight thread, this method reduction factor effectively makes full use of the resource of polycaryon processor according to the probability that causes thread waits synchronously, improves the executed in parallel efficient of program.
For achieving the above object, design of the present invention is: according to still exist in the foresight thread of executed in parallel can executed in parallel module (program statement sequence), so just can be by foresight thread is carried out at processing, mark can executed in parallel module, foresight thread factor in executed in parallel is bide one's time according to needing synchronously to wait, do not wait for, but then the module of other executed in parallel in searching and the execution foresight thread, in conjunction with the execution of prediction parallel thread, improve the executed in parallel efficient of program effectively.
According to above-mentioned inventive concept, the present invention adopts following technical proposals:
A kind of multistage parallel manner of execution of foresight thread is characterized in that, the concrete operations step is as follows:
(1) but, from the serial program that needs are carried out, extract the foresight thread ST of executed in parallel
i
(2), to step (1) but the foresight thread ST of the executed in parallel that extracts in described
iCarry out pre-service, but mark the module of executed in parallel.
(3), the foresight thread ST to being generated in the step (2)
iCarry out by prediction executed in parallel rule, intact until this thread execution; Judge the foresight thread ST that executes then
iWhether need to restart,, then carry out this thread with non-foresight thread if need restart; Otherwise, submit this prediction thread to.
Described in the above-mentioned steps (2) to step (1) but in the foresight thread ST of the executed in parallel that extracts
iCarry out pre-service, but mark the module of executed in parallel, its concrete steps are as follows:
(21), detect foresight thread ST
i, from foresight thread ST
iBut in detect the module M of executed in parallel
1, M
2..., M
n
(22), detected each parallel module M in step (21)
kFront and back insert parallel module respectively and begin to identify PMS
nFinish sign PME with parallel module
n
The module that walks abreast in the foresight thread described in the above-mentioned steps (2) is meant, is present in can carry out separately in the foresight thread, and does not influence some statement sequences of other statement execution or the module that several program statements are formed.
Each foresight thread ST described in the above-mentioned steps (3) to being generated in the step (2)
iPress the executed in parallel rule executed in parallel of foresight thread, intact until this thread execution, judge the foresight thread ST that executes then
iWhether need to restart,, then carry out this thread with non-foresight thread if need restart; Otherwise, submit this prediction thread to, its concrete operations step is as follows:
(31), according to the forward foresight thread of the sequential semantics principle of scheduling earlier, from the candidate wait for scheduling foresight thread select foresight thread ST
iTo the nuclear of free time;
(32), carry out foresight thread ST
iAnd detect whether the semaphore appearance that needs thread synchronization is arranged, if the semaphore of thread synchronization occurs, then forward step (33) to; Otherwise, go to step (37);
(33), to the pending sign Wait (T such as current statement interpolation of the foresight thread STi that carrying out in the step (32)
Jv), the thread ST synchronous to needs
jAdd and arouse sign Awake (T
Iv), step (34) is changeed in the sign back;
(34), the thread ST in the detection step (33)
iBut the module that whether has the executed in parallel of not carrying out, but if detect the module M that there is executed in parallel in thread
k, execution in step (35) then, otherwise this thread ST
iEnter waiting status, wait for thread ST
jSignal identification Awake (T is aroused in initiation
Iv) after, change step (36);
(35), carry out above-mentioned steps (34) but in detected executed in parallel module M
k, the back representation module that is finished is that sign is crossed in executed, promptly uses PMO
kReplace PMS
nWith PME
n, detect thread simultaneously and arouse signal and whether arrive, if arouse the signal no show, then forward step (34) to, continue to carry out; Arrive if arouse signal, then change step (36);
(36), the wait sign Wait (Tjv) that jumps to foresight thread STi locates to continue to carry out, and changes step (37) then;
(37), judge whether foresight thread STi is finished, if foresight thread STi is not finished, then forwards (32) to and continue to carry out, otherwise, forward step (38) to;
(38), judge whether thread STi prediction lost efficacy, if outlook failure changes step (39); Otherwise, forward step (40) to;
(39), to this thread reboot operation, and after executing thread STi, change step (40);
(40), foresight thread STi is carried out correlated results submits the execution end to.
The multistage parallel manner of execution of a kind of foresight thread of the present invention compared with the prior art, have following conspicuous outstanding substantive distinguishing features and remarkable advantage: data sync that the elimination that this method can be indirect is essential and data rely on, effectively avoided causing the computer resource waste because of thread waits and thread resources swap out from changing to of processor and internal memory, make full use of computer resource, improved executing efficiency.
Description of drawings
Fig. 1 is the process flow diagram of the multistage parallel manner of execution of a kind of foresight thread of the present invention;
Fig. 2 is the process flow diagram of step among Fig. 1 (3).
Embodiment
The present invention is further detailed explanation below in conjunction with specification drawings and specific embodiments.
The applied environment of the described scheme of present embodiment is the parallel foresight thread level execution environment towards polycaryon processor, and present embodiment does not limit polycaryon processor framework in the described technical scheme applied environment.
With reference to Fig. 1, the multistage parallel manner of execution of a kind of foresight thread of the present invention, its concrete operations step is as follows:
But step 101, utilize the thread-level foresight technology from the serial program that needs are carried out, to extract the thread STi of executed in parallel.
Step 102, but each foresight thread that extracts executed in parallel is carried out pre-service, but mark the module of executed in parallel, its concrete steps are as follows:
Step 1021, detect foresight thread STi, but from foresight thread STi, detect the module M of executed in parallel
1, M
2..., M
n
Step 1022, in step 1021 detected each parallel module M
kFront and back insert parallel module respectively and begin to identify PMS
nFinish sign PME with parallel module
n
Step 103, each foresight thread ST to being generated
1Carry out according to prediction executed in parallel rule, intact until this thread execution, judge the foresight thread ST that executes then
iWhether need to restart,, then carry out this thread with non-foresight thread if need restart; Otherwise, submit this prediction thread to.With reference to Fig. 2, its concrete operations step is as follows:
Foresight thread ST in step 1034, the detection step 1033 after the sign
iBut the module that whether has the executed in parallel of not carrying out, but if detect the module M that there is executed in parallel in thread
k, then execution in step 1035, otherwise this thread ST
iEnter waiting status, wait for thread ST
jSignal identification Awake (T is aroused in initiation
Iv) after, change step 1036;
But detected executed in parallel module M in step 1035, the execution above-mentioned steps 33
k, the back representation module that is finished is that sign is crossed in executed, promptly uses PMO
kReplace PMS
nWith PME
n, detect thread simultaneously and arouse signal and whether arrive, if arouse the signal no show, then forward step 1034 to, continue to carry out; Arrive if arouse signal, then change step 1036;
Step 1040, foresight thread STi is carried out correlated results submit to, carry out and finish.
More than to the multistage parallel manner of execution of this a kind of line of looking forward to the prospect, be described in detail.This paper sets forth in conjunction with Figure of description and specific embodiment and just is used for helping to understand method of the present invention and core concept; Simultaneously, for one of ordinary skill in the art, according to method of the present invention and thought, the part that on embodiment and range of application, all can change, in sum, this description should not be construed as limitation of the present invention.
Claims (4)
1. the multistage parallel manner of execution of a foresight thread is characterized in that operation steps is as follows:
(1) but, from the serial program that needs are carried out, extract the foresight thread ST of executed in parallel
i
(2), to step (1) but in the foresight thread ST of the executed in parallel that extracts
iCarry out pre-service, but mark the module of executed in parallel;
(3), the foresight thread ST to being generated in the step (2)
iCarry out by prediction executed in parallel rule, intact until this thread execution; Judge the foresight thread ST that executes then
iWhether need to restart,, then carry out this thread with non-foresight thread if need restart; Otherwise, submit this prediction thread to.
2. the multistage parallel manner of execution of a kind of foresight thread according to claim 1 is characterized in that, described in the above-mentioned steps (2) to step (1) but in the foresight thread ST of the executed in parallel that extracts
iCarry out pre-service, but mark the module of executed in parallel, its concrete steps are as follows:
(21), detect foresight thread ST
i, from foresight thread ST
iBut in detect the module M of executed in parallel
1, M
2..., M
n
(22), detected each parallel module M in step 21
kFront and back insert parallel module respectively and begin to identify PMS
nFinish sign PME with parallel module
n
3. the multistage parallel manner of execution of a kind of foresight thread according to claim 1, it is characterized in that, the module that walks abreast in the foresight thread described in the above-mentioned steps (2) is meant, be present in can carry out separately in the foresight thread, and do not influence some statement sequences of other statement execution or the module that several program statements are formed.
4. the multistage parallel manner of execution of a kind of foresight thread according to claim 1 is characterized in that, the foresight thread ST to being generated in the step (2) described in the above-mentioned steps (3)
1Press the executed in parallel rule executed in parallel of foresight thread, intact until this thread execution, judge the foresight thread ST that executes then
iWhether need to restart,, then carry out this thread with non-foresight thread if need restart; Otherwise, submit this prediction thread to, its concrete steps are as follows:
(31), according to the forward foresight thread of the sequential semantics principle of scheduling earlier, from the candidate waits for the foresight thread of scheduling, select foresight thread ST
iTo the nuclear of free time;
(32), carry out foresight thread ST
iAnd detect whether the semaphore appearance that needs thread synchronization is arranged, if the semaphore of thread synchronization occurs, then forward step (33) to; Otherwise, go to step (37);
(33), to the pending sign Wait (T such as current statement interpolation of the foresight thread STi that carrying out in the step (32)
Jv), the thread ST synchronous to needs
jAdd and arouse sign Awake (T
Iv), step (34) is changeed in the sign back;
(34), the thread ST in the detection step (33)
iBut the module that whether has the executed in parallel of not carrying out, but if detect the module M that there is executed in parallel in thread
k, execution in step (35) then, otherwise this thread ST
iEnter waiting status, wait for thread ST
jSignal identification Awake (T is aroused in initiation
Iv) after, change step (36);
(35), carry out above-mentioned steps (34) but in detected executed in parallel module M
k, the back representation module that is finished is that sign is crossed in executed, promptly uses PMO
kReplace PMS
nWith PME
n, detect thread simultaneously and arouse signal and whether arrive, if arouse the signal no show, then forward step (34) to, continue to carry out; Arrive if arouse signal, then change step (36);
(36), the wait sign Wait (Tjv) that jumps to foresight thread STi locates to continue to carry out, and changes step (37) then;
(37), judge whether foresight thread STi is finished, if foresight thread STi is not finished, then forwards (32) to and continue to carry out, otherwise, forward step (38) to;
(38), judge whether thread STi prediction lost efficacy, if outlook failure changes step (39); Otherwise, forward step (40) to;
(39), to this thread reboot operation, and after executing thread STi, change step (40)
(40), foresight thread STi is carried out correlated results submits the execution end to.
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102520915A (en) * | 2011-11-25 | 2012-06-27 | 华为技术有限公司 | Method and device for threading serial program in nonuniform memory access system |
CN102968295A (en) * | 2012-11-28 | 2013-03-13 | 上海大学 | Speculation thread partitioning method based on weighting control flow diagram |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101807144A (en) * | 2010-03-17 | 2010-08-18 | 上海大学 | Prospective multi-threaded parallel execution optimization method |
CN101814019A (en) * | 2010-03-25 | 2010-08-25 | 上海大学 | Method for identifying thread with outlook failure |
CN101833440A (en) * | 2010-04-30 | 2010-09-15 | 西安交通大学 | Speculative multithreading memory data synchronous execution method under support of compiler and device thereof |
US20100275211A1 (en) * | 2009-04-28 | 2010-10-28 | Andrew Webber | Method and apparatus for scheduling the issue of instructions in a multithreaded microprocessor |
-
2011
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Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20100275211A1 (en) * | 2009-04-28 | 2010-10-28 | Andrew Webber | Method and apparatus for scheduling the issue of instructions in a multithreaded microprocessor |
CN101807144A (en) * | 2010-03-17 | 2010-08-18 | 上海大学 | Prospective multi-threaded parallel execution optimization method |
CN101814019A (en) * | 2010-03-25 | 2010-08-25 | 上海大学 | Method for identifying thread with outlook failure |
CN101833440A (en) * | 2010-04-30 | 2010-09-15 | 西安交通大学 | Speculative multithreading memory data synchronous execution method under support of compiler and device thereof |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102520915A (en) * | 2011-11-25 | 2012-06-27 | 华为技术有限公司 | Method and device for threading serial program in nonuniform memory access system |
CN102520915B (en) * | 2011-11-25 | 2014-04-02 | 华为技术有限公司 | Method and device for threading serial program in nonuniform memory access system |
CN102968295A (en) * | 2012-11-28 | 2013-03-13 | 上海大学 | Speculation thread partitioning method based on weighting control flow diagram |
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