CN102055480B - Sampling frequency conversion device - Google Patents
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Abstract
Description
技术领域technical field
本发明是关于一种取样频率转换装置,尤指一种应用于一音频模拟数字转换器的取样频率转换装置,使该音频模拟数字转换器不需要利用石英振荡器或锁相回路产生取样频率。The present invention relates to a sampling frequency conversion device, especially a sampling frequency conversion device applied to an audio analog-digital converter, so that the audio analog-digital converter does not need to use a crystal oscillator or a phase-locked loop to generate sampling frequency.
背景技术Background technique
目前多媒体的主流音频格式上大多使用48kHz、44.1kHz或32kHz这三种基准频率乘或除以一正整数N,作为音频输出信号的取样频率。举例来说,高清晰音效(High Definition Audio)规格的取样频率192kHz为48kHz的四倍(48kHz*4);MPEG-4CELP规格的取样频率8kHz为32kHz的四分之一(32kHz/4)。为了支援不同的取样频率,音频模拟数字转换器(Analog-to-DigitalConverter,ADC)使用的工作频率必须是取样频率的整数倍。假设上述的取样频率为Fs,一般常见的工作频率包含(256*Fs)、(384*Fs)、(512*Fs)以及(768*Fs)。然而,上述的工作频率并不存在于原本的系统中。为因应不同取样频率的音频播放功能,在音频ADC的设计上必须增加一个能产生对应工作频率的石英震荡器(crystal oscillator)或锁相回路(Phase Lock Loop,PLL)电路。Most of the current mainstream audio formats of multimedia use three reference frequencies of 48kHz, 44.1kHz or 32kHz to multiply or divide by a positive integer N as the sampling frequency of the audio output signal. For example, the sampling frequency of 192kHz of the High Definition Audio specification is four times (48kHz*4) of 48kHz; the sampling frequency of 8kHz of the MPEG-4CELP specification is a quarter of 32kHz (32kHz/4). In order to support different sampling frequencies, the operating frequency used by the audio analog-to-digital converter (ADC) must be an integer multiple of the sampling frequency. Assuming that the above sampling frequency is Fs, common working frequencies include (256*Fs), (384*Fs), (512*Fs) and (768*Fs). However, the above operating frequency does not exist in the original system. In order to cope with the audio playback function of different sampling frequencies, a crystal oscillator (crystal oscillator) or a phase-locked loop (Phase Lock Loop, PLL) circuit that can generate the corresponding operating frequency must be added to the design of the audio ADC.
请参考图1,图1为现有技术的音频ADC100架构的示意图。音频ADC100包含一三角积分调变器(Sigma-Delta Modulator,SDM)110、一梳型滤波器(comb filter)120、一N倍降频器130、一降频滤波模块140以及一模拟锁像回路(Analog Phase Lock Loop,APLL)150。音频ADC100根据APLL150所产生的工作频率,将一模拟音频信号转换为一目标取样频率Fs的数字音频信号。SDM110用来对一模拟音频信号进行超取样(over-sampling),以将该模拟音频信号转换为一数字音频信号。在对一信号取样时常常会引起交迭(aliasing)现象,而导致信号失真,为避免此一情形,在对该信号取样时的取样频率必须大于该信号的奈奎斯特率(Nyquist rate),也就是该信号的两倍信号频率,而SDM110在对模拟音频信号进行超取样的超取样率(Oversampling Rate,OSR)更是必须远大于该模拟音频信号的两倍信号频率。如此一来,在对该模拟音频信号取样时所产生的量化噪声(quantization noise)会平均分布于更高的频宽之间,因此可有效降低信号频宽内的量化噪声。Please refer to FIG. 1 . FIG. 1 is a schematic diagram of the architecture of an
梳型滤波器120为一串联积分梳型(Cascaded Integrated Comb,CIC)滤波器,其主要功能是用来排除信号频段以外的噪声,以防止在取样后噪声进入信号频段内(in-band)。一般来说,CIC滤波器用于降频(decimation)取样以及升频(interpolation)取样的应用上。在降频取样的应用上,CIC滤波器有防混迭滤波(anti-aliasing)的功效,而在升频取样的应用上,CIC滤波器可用来防止镜像(anti-image)。使用CIC滤波器最大的好处是在将演算法实现到硬件时并不需要使用到乘法器,而仅利用到简单的加法器及减法器,因而能简化硬件复杂度并降低系统功率。在现有技术的音频ADC100架构中,N倍降频器130电性连接于梳型滤波器120,以形成一降频取样滤波器,用来将SDM110所输出的数字音频信号降频N倍数(意即将该数字音频信号的频率除以N),其中N为一正整数。The
降频滤波模块140用来将N倍降频器130所输出的数字音频信号进一步地降频一正整数(举例来说,降频4倍数),以产生目标取样频率Fs的数字音频信号。一般来说,降频滤波模块140包含一衰减补偿滤波器(Dropcompensation Filter,DCF)141、一第一半频带滤波器(half band filter)142、一第一二倍降频器143、一第二半频带滤波器144以及一第二二倍降频器145。由于CIC滤波器会造成通带(passband)中高频部分信号能量的衰减,因此DCF141可用来补偿该增益的衰减。第一半频带滤波器142电性连接于DCF141,为一低通滤波器(low pass filter,LPF),用来对DCF141所输出的数字音频信号进行滤波,以避免信号在经过第一两倍降频器143后,产生信号交迭(aliasing)的现象,影响音频输出信号的品质。第一二倍降频器143电性连接于第一半频带滤波器142,用来将DCF141所输出的数字音频信号降频2倍。第二半频带滤波器144电性连接于第一二倍降频器143,而第二二倍降频器145电性连接于第二半频带滤波器144。第二半频带滤波器144以及第二二倍降频器145的运作原理与第一半频带滤波器142以及第一二倍降频器143类似。因此,降频滤波模块140将N倍降频器130所输出的数字音频信号再降频4倍。The down-
为了支援上述的取样频率(48kHz、44.1kHz或32kHz),APLL150可根据取样频率Fs产生音频ADC100的工作频率Fs*4N。根据业界现今常见的规格,假设音频ADC100欲产生的取样频率Fs为44.1kHz,以作为音频输出信号的取样频率Fs,其中N为32,则APLL150所产生的频率为5.6448MHz(44.1kHz*4*32)。然而,虽然APLL150可以根据不同音频信号来产生对应的取样频率,但APLL150在积体电路中所占用面积相较为大,因此所需成本相对较高。In order to support the aforementioned sampling frequency (48kHz, 44.1kHz or 32kHz), the APLL150 can generate the working frequency Fs*4N of the audio ADC100 according to the sampling frequency Fs. According to the current common specifications in the industry, assuming that the sampling frequency Fs to be generated by the audio ADC100 is 44.1kHz as the sampling frequency Fs of the audio output signal, where N is 32, the frequency generated by the APLL150 is 5.6448MHz (44.1kHz*4* 32). However, although the
发明内容Contents of the invention
因此,本发明的一目的在于提供一种应用于一音频模拟数字转换器的取样频率转换装置。Therefore, an object of the present invention is to provide a sampling frequency conversion device applied to an audio analog-to-digital converter.
本发明提供一种取样频率转换装置,用来将一模拟音频信号转换为一目标频率的数字音频信号。该取样频率转换装置包含一三角积分调变器、一第一降频滤波模块、一升降频模块以及一第三降频滤波模块。该三角积分调变器用来根据一工作频率对该模拟音频信号进行取样,以产生一第一频率的数字音频信号。该第一降频滤波模块电性连接于该三角积分调变器,用来接收该第一频率的数字音频信号,并对该第一频率的数字音频信号进行滤波以及降频,以产生一第二频率的数字音频信号。该升降频模块电性连接于该第一降频滤波模块,用来对该第二频率的数字音频信号进行升频以及降频,以产生一第三频率的数字音频信号。该第三降频滤波模块电性连接于该升降频模块,用来接收该升降频模块输出的数字音频信号以产生目标频率的数字音频信号。The invention provides a sampling frequency converting device, which is used for converting an analog audio signal into a digital audio signal of a target frequency. The sampling frequency conversion device includes a delta-sigma modulator, a first down-frequency filter module, a down-frequency module and a third down-frequency filter module. The delta-sigma modulator is used for sampling the analog audio signal according to a working frequency to generate a digital audio signal of a first frequency. The first down-frequency filtering module is electrically connected to the delta-sigma modulator for receiving the digital audio signal of the first frequency, and filtering and down-converting the digital audio signal of the first frequency to generate a first frequency. Two-frequency digital audio signal. The up-converting module is electrically connected to the first down-frequency filtering module, and is used for up-converting and down-converting the digital audio signal of the second frequency to generate a digital audio signal of a third frequency. The third down-frequency filtering module is electrically connected to the up-down frequency module for receiving the digital audio signal output by the up-down frequency module to generate a digital audio signal of a target frequency.
其中,升降频模块更包含一第二降频滤波模块,当第三频率的数字音频信号为一预设频率的2n倍时,输出该第三频率的数字音频信号至第三降频滤波模块;当第三频率的数字音频信号不为该预设频率的2n倍时,对该第三频率的数字音频信号进行滤波以及降频,以产生一第四频率的数字音频信号至第三降频滤波模块。其中n为一整数。Wherein, the frequency reduction module further includes a second frequency reduction filter module, and when the digital audio signal of the third frequency is 2 n times of a preset frequency, the digital audio signal of the third frequency is output to the third frequency reduction filter module ; When the digital audio signal of the third frequency is not 2 n times of the preset frequency, the digital audio signal of the third frequency is filtered and frequency-reduced to produce a digital audio signal of the fourth frequency to the third drop frequency filter module. where n is an integer.
本发明提供一取样频率转换功能的音频ADC,可利用一系统时脉产生的工作频率将一模拟音频信号转换为一目标频率的数字音频信号。由于本发明的ADC不需要利用额外的石英振荡器或锁相回路产生取样频率,因此可有效降低电路面积及制造成本。The invention provides an audio ADC with a sampling frequency conversion function, which can convert an analog audio signal into a digital audio signal of a target frequency by using an operating frequency generated by a system clock. Since the ADC of the present invention does not need to use an additional crystal oscillator or a phase-locked loop to generate sampling frequency, the circuit area and manufacturing cost can be effectively reduced.
附图说明Description of drawings
图1为现有技术的音频模拟数字转换器架构的取样频率转换装置的示意图;1 is a schematic diagram of a sampling frequency conversion device of an audio analog-to-digital converter architecture in the prior art;
图2A为说明本发明的音频模拟数字转换器的取样频率转换装置的示意图;2A is a schematic diagram illustrating a sampling frequency conversion device of an audio analog-to-digital converter of the present invention;
图2B为说明本发明音频模拟数字转换器的取样频率转换装置的另一实施例的示意图;2B is a schematic diagram illustrating another embodiment of the sampling frequency conversion device of the audio analog-to-digital converter of the present invention;
图3为说明工作频率、目标频率以及第一至第五参数的关系表;Fig. 3 is the relationship table illustrating operating frequency, target frequency and first to fifth parameters;
图4为说明不同的工作频率的第一至第五参数的关系表;Fig. 4 is the relationship table illustrating the first to fifth parameters of different operating frequencies;
图5A为根据图2A的取样频率转换装置所变化的实施例的示意图;FIG. 5A is a schematic diagram of a modified embodiment of the sampling frequency conversion device according to FIG. 2A;
图5B为根据图2B的取样频率转换装置所变化的实施例的示意图。FIG. 5B is a schematic diagram of a modified embodiment of the sampling frequency converting device according to FIG. 2B .
附图标号:Figure number:
100 音频模拟数字转换器100 Audio Analog to Digital Converter
200、201、500、501 取样频率转换装置200, 201, 500, 501 Sampling frequency conversion device
110、210 三角积分调变器110, 210 Delta-sigma modulator
120 滤波器120 filter
130 N倍降频器130 N-fold down-converter
140 降频滤波模块140 Down frequency filter module
150 模拟锁相回路150 Analog PLL
220 第一降频滤波模块220 The first frequency down filter module
221 第一升频器221 The first upconverter
222 第一滤波器222 first filter
223 第一降频器223 The first down-converter
230 升降频模块230 Frequency conversion module
231 第二升频器231 Second upconverter
232 第二降频器232 Second down-converter
233 低通滤波器233 Low-pass filter
240 第二降频滤波模块240 Second frequency down filter module
241 第二滤波器241 Second filter
242 第三降频器242 The third down-converter
250 第三降频滤波模块250 The third frequency down filter module
141、251 衰减补偿滤波器141, 251 Attenuation compensation filter
142、252 第一半频带滤波器142, 252 First half-band filter
143 第一二倍降频器143 The first and second down-converter
144、254 第二半频带滤波器144, 254 Second half-band filter
145 第二二倍降频器145 Second double down frequency converter
253 第四降频器253 Fourth Downconverter
255 第五降频器255 Fifth Downconverter
A~E 第一~第五参数A~E The first~fifth parameters
Fs 目标频率Fs Target frequency
Fs2 第二频率Fs2 Second frequency
Fs3 第三频率Fs3 Third frequency
Fs4 第四频率Fs4 Fourth frequency
Fsc 工作频率Fsc Working Frequency
P1 第一路径P1 The first path
P2 第二路径P2 Second Path
具体实施方式Detailed ways
请参考图2A,图2A为说明本发明的音频ADC的取样频率转换装置200的示意图。取样频率转换装置200包含一三角积分调变器(Sigma-DeltaModulator,SDM)210、一第一降频滤波模块220、一升降频模块230以及一第三降频滤波模块250。其中,升降频模块中更包含一第二降频滤波模块240。取样频率转换装置200利用SDM210对一模拟音频信号进行超取样(Over-sampling),以产生一数字音频信号,其中第一降频滤波模块220、升降频模块230、第二降频滤波模块240以及第三降频滤波模块250分别根据不同的参数来对该数字音频信号进行升频及降频,以产生一目标频率Fs的数字音频信号。Please refer to FIG. 2A . FIG. 2A is a schematic diagram illustrating an audio ADC sampling
SDM210用来对一模拟音频信号进行超取样,以将该模拟音频信号转换为一数字音频信号。在本实施例中,SDM210根据一系统时脉产生的工作频率Fsc(举例来说,系统时脉为24MHz,工作频率Fsc为6MHz)来对该模拟音频信号超取样,以输出一频率Fsc的数字音频信号。The
第一降频滤波模块220用来将频率Fsc的数字音频信号降频,以产生一第二频率Fs2的数字音频信号。第一降频滤波模块220包含一第一升频器221、一第一滤波器222以及一第一降频器223。在频率Fsc的数字音频信号输入第一滤波器222之前,第一降频滤波模块220根据第一升频器221中一第一参数A来重复接收该数字音频信号,以对频率Fsc的数字音频信号进行升频。举例来说,当第一参数A为4时,数字音频信号会重复4次输入第一滤波器222,也就是将数字音频信号升频4倍。第一滤波器222对该数字音频信号进行滤波后,第一降频器223根据一第二参数B将该数字音频信号降频,以产生第二频率Fs2的数字音频信号。举例来说,当第一参数A及第二参数B分别为2及125时,第二频率Fs2为Fsc*2/125。其中,第一滤波器222可以用梳型滤波器(comb filter),亦可用一般数字滤波器替换,但并不局限于此实施例;举例来说,一般数字滤波器可为有限脉冲响应(Finite Impulse Response,FIR)或无限脉冲响应(Infinite Impulse Response,IIR)滤波器。The first down-
升降频模块230包含一第二升频器231、一第二降频器232以及一第二降频滤波模块240。第二升频器231电性连接于第一降频滤波模块220的第一降频器223,用来接收第二频率Fs2的数字音频信号。第二降频器232电性连接于第二升频器231。升降频模块230利用第二升频器231根据一第三参数C来对第二频率Fs2的数字音频信号进行升频,然后再利用第二降频器232根据一第四参数D来对该数字音频信号进行降频,以产生一第三频率Fs3的数字音频信号。The up-
第二降频滤波模块240包含一第一路径P1与一第二路径P2。其中,第一路径P1中具有一第二滤波器241以及一第三降频器242,而第二路径P2则直接将第三频率Fs3的数字音频信号输出至第三降频滤波模块250。第二降频滤波模块240电性连接于第二降频器232,用来接收第三频率Fs3的数字音频信号。The second down-
当第三频率Fs3的数字音频信号为一预设频率Fd(举例来说,预设频率Fd为48kHz)的(2-n)倍时,第二降频滤波模块240经由第二路径P2直接输出第三频率Fs3的数字音频信号,其中n为整数。当第三频率Fs3的数字音频信号不是预设频率Fd的(2-n)倍时,第二降频滤波模块240经由第一路径P1将第三频率Fs3的数字音频信号传送到第二滤波器241。第二滤波器241对该数字音频信号进行滤波后,第三降频器242根据一第五参数E来对该数字音频信号降频,以产生一第四频率Fs4的数字音频信号。When the digital audio signal of the third frequency Fs3 is (2-n) times of a preset frequency Fd (for example, the preset frequency Fd is 48kHz), the second down-
举例来说,假设第三降频模块250固定降四倍频,当目标频率为12KHz、24KHz、48KHz、96KHz或192KHz等频率时,第三频率Fs3的数字音频信号为48KHz、96KHz、192KHz、384KHz或768KHz,第三频率Fs3为预设频率(48kHz)的(2-0、2-1、2-2、23或24)倍,第二降频滤波模块240经由第二路径P2直接输出第三频率Fs3的数字音频信号;当第三频率Fs3的数字音频信号为832KHz、1.323MHz、1.664MHz、2.646MHz、3.328MHz、5.292MHz、6.656MHz、10.584MHz、13.312MHz或21.168MHz等频率时,由于第三频率Fs3不是预设频率(48kHz)的(2-n)倍,所以第二降频滤波模块240经由第一路径P1将第三频率Fs3的数字音频信号传送到第二滤波器241。第二滤波器241对该数字音频信号进行滤波后,第三降频器242根据第五参数E来对该数字音频信号降频,以产生一第四频率Fs4的数字音频信号。其中,第二滤波器241亦可用梳型滤波器或一般数字滤波器(如上述的FIR或IIR滤波器)替换。For example, assuming that the third
第三降频滤波模块250电性连接于该第二降频滤波模块240。第三降频滤波模块250包含一衰减补偿滤波器(Drop compensation Filter,DCF)251、一第一半频带滤波器(half-band filter)252、一第四降频器253、一第二半频带滤波器254以及一第五降频器255。第三降频滤波模块250可对因为第二滤波器对该数字音频信号的高频部分所造成的衰减进行补偿。另外,第三降频滤波模块250亦同时将第二降频滤波模块240所输出的第三频率Fs3或第四频率Fs4的数字音频信号更进一步降频,最后产生目标频率Fs的数字音频信号。于本实施例中,第四降频器253及第五降频器255分别进行二倍降频,所以第三降频滤波模块250将第二降频滤波模块所输出的第三频率Fs3或第四频率Fs4的数字音频信号降频四倍。第四降频器253及第五降频器255的降频倍数仅为本实施例所用,使用者可依实际需求变更第四降频器253或第五降频器255的降频倍数。The third frequency
再者,图2A所示的音频ADC的取样频率转换装置200仅为本发明的实施例示意图。本领域技术人员当可据以做不同的修饰或变化。请参考图2B,图2B为说明本发明的音频ADC的取样频率转换装置210的示意图。取样频率转换装置201相似于图2A中取样频率转换装置200,其相异之处为升降频模块230中第二降频滤波模块240可将原先的两个路径结合为一个路径,通过硬件选择第二滤波器241使其为一可调整系数的滤波器,利用系数调整使第二滤波器241可成为一全通滤波器或是一低通滤波器。Furthermore, the sampling
当第三频率Fs3的数字音频信号为一预设频率Fd(举例来说,预设频率Fd为48kHz)的(2-n)倍时,第二滤波器241通过系数调整为全通滤波器,而第三降频器242的第五参数E设为1,使其不对第三频率Fs3的数字音频信号进行滤波及降频,直接输出第三频率Fs3的数字音频信号,其中n为整数。当第三频率Fs3的数字音频信号不是预设频率Fd的(2-n)倍时,第二滤波器241通过系数调整为低通滤波器,第二滤波器241对该数字音频信号进行滤波后,第三降频器242根据一第五参数E来对该数字音频信号降频,以产生一第四频率Fs4的数字音频信号。When the digital audio signal of the third frequency Fs3 is (2-n) times of a preset frequency Fd (for example, the preset frequency Fd is 48kHz), the
在本发明的实施例中,第一至第五参数A、B、C、D及E根据工作频率Fsc以及设定的目标频率Fs预先计算所得到。不同的目标频率Fs及工作频率Fsc的组合会产生不同的第一至第五参数A、B、C、D及E。请参考同时参考图2A以及图3。图3为说明工作频率Fsc、目标频率Fs以及第一至第五参数A、B、C、D及E的关系表。以下将利用图2A中的音频ADC的取样频率转换装置200以及图3的关系表来说明如何根据本发明的音频ADC200利用系统时脉产生的工作频率Fsc(也就是不需要额外的振荡器或锁相回路),将模拟音频信号转换为目标频率Fs的数字音频信号。假设工作频率Fsc、目标频率Fs以及预设频率Fd分别为6MHz、64kHZ以及48kHz,第一至第五参数A、B、C、D及E分别为(1、8、71、8、26)。SDM210首先根据工作频率Fsc(6MHz)来对模拟音频信号进行超取样,以输出工作频率Fsc(6MHz)的数字音频输出信号。由于第一参数A为1,因此数字音频输出信号会在不改变(Fsc*1=Fsc)的情况下传输至第一滤波器222。第一滤波器222对该数字音频输出信号滤波后,第一降频器223根据第二参数B将工作频率Fsc(6MHz)的数字音频信号降频8倍,以产生第二频率Fs2的数字音频信号,而第二频率Fs2为750kHz(6MHz/8=750kHz)。接着,第二升频器231根据第三参数C将第二频率Fs2(750kHz)的数字音频信号升频,然后第二降频器232根据第四参数D将该数字音频信号降频,以产生第三频率Fs3的数字音频信号。因此,第三频率Fs3为6656.25kHz(750kHz*71/8=6656.25kHz)。由于第三频率Fs3的数字音频信号不是该预设频率Fd(48kHz)的2n倍,第二降频滤波模块240切换于第一路径P1。第二滤波器241对该数字音频输出信号滤波后,第三降频器242根据第五参数E将第三频率Fs3的数字音频信号降频26倍,并据以产生第四频率Fs4的数字音频信号;而第四频率Fs4为256kHz(6656.25kHz/26=256kHz)。最后,第三降频滤波模块250将第四频率Fs4的数字音频信号降频四倍,以产生目标频率Fs(256kHz/4=64kHz)的数字音频信号。In the embodiment of the present invention, the first to fifth parameters A, B, C, D and E are pre-calculated according to the operating frequency Fsc and the set target frequency Fs. Different combinations of the target frequency Fs and the working frequency Fsc will produce different first to fifth parameters A, B, C, D and E. Please refer to FIG. 2A and FIG. 3 at the same time. FIG. 3 is a table illustrating the relationship between the working frequency Fsc, the target frequency Fs, and the first to fifth parameters A, B, C, D, and E. Referring to FIG. The following will use the audio ADC sampling
须注意的是,在相同目标频率Fs及工作频率Fsc的组合下,仍可能会产生不同组合的第一至第五参数A、B、C、D及E。举例来说,请继续参考图3,当工作频率Fsc及目标频率Fs分别设定为6MHz以及192kHz时,第一参数A可为16、8或4。当第一参数A为16时,频率Fsc的数字音频信号输入第一滤波器222时,会先升频16倍而成为96MHz。在现有的系统架构下,在第一降频模块220采用96MHz较高的工作频率,将提升该电路设计的成本;系统中亦不一定存在如此高速的工作时脉。因此使用者可选择第一参数A为8或4来降低第一降频模块220的工作频率,而第三参数C亦对应地调整为2或4。此调整并不影响在输出端Fs数字音频的品质。It should be noted that under the same combination of the target frequency Fs and the working frequency Fsc, different combinations of the first to fifth parameters A, B, C, D and E may still be generated. For example, please continue to refer to FIG. 3 , when the working frequency Fsc and the target frequency Fs are respectively set to 6 MHz and 192 kHz, the first parameter A can be 16, 8 or 4. When the first parameter A is 16, when the digital audio signal with the frequency Fsc is input into the
请参考图4。图4为说明不同的工作频率Fsc的第一至第五参数A、B、C、D及E的关系表。本发明的音频ADC200亦可用于不同的工作频率Fsc,如1.5MHz、3MHz、6MHz、12MHz或24MHz。以工作频率Fsc、目标频率Fs以及预设频率Fd分别为12MHz、96kHZ以及48kHz为例,第一至第五参数A、B、C、D及E分别为(4或2、125、1或2、1、1)。SDM210首先根据工作频率Fsc(12MHz)来对模拟音频信号进行超取样,以输出工作频率Fsc(12MHz)的数字音频输出信号。由于第一参数A为4或2,因此第一升频器221根据第一参数A将工作频率Fsc(12MHz)的数字音频信号升频四倍(Fsc*4=48MHz)或二倍(Fsc*2=24MHz)。如前所述,第一降频模块220采用较高的工作频率,将提升该电路设计的成本,而系统中亦不一定存在如此高速的工作时脉。因此,选择第一参数A为2可降低第一参数A为4时第一降频模块220的工作频率,意即第三参数C亦对应地调整为2。数字音频输出信号会在升频二倍(Fsc*2=24MHz)的情况下传输至第一滤波器222。第一滤波器222对该数字音频输出信号滤波后,第一降频器223根据第二参数B将工作频率Fsc(24MHz)的数字音频信号降频125倍,以产生第二频率Fs2的数字音频信号,而第二频率Fs2为192kHz(24MHz/125=192kHz)。接着,第二升频器231根据第三参数C将第二频率Fs2(192kHz)的数字音频信号升频,然后第二降频器232根据第四参数D将该数字音频信号降频,以产生第三频率Fs3的数字音频信号。因此,第三频率Fs3为384kHz(192kHz*2/1=384kHz)。由于第三频率Fs3的数字音频信号为该预设频率Fd(48kHz)的(23)倍,第二降频滤波模块240切换于第二路径P2,以经由第二路径P2直接输出第三频率Fs3的数字音频信号。最后,第三降频滤波模块250将第三频率Fs3的数字音频信号降频四倍,以产生目标频率Fs(384kHz/4=96kHz)的数字音频信号。Please refer to Figure 4. FIG. 4 is a relational table illustrating first to fifth parameters A, B, C, D and E of different working frequencies Fsc. The
再者,图2A与图2B所示的取样频率转换装置200与取样频率转换装置201仅为本发明的实施例示意图。本领域技术人员当可据以做不同的修饰或变化。请参考图5A与图5B,其中,图5A为根据图2A的取样频率转换装置200所变化的实施例的示意图。取样频率转换装置相似于图2A中的取样频率转换装置,其相异之处为升降频模块230可另包含一低通滤波器(Low PassFilter,LPF)233,电性连接于第二升频器231及第二降频器232之间,用来在该第二频率Fs2的数字音频信号进行升频和降频之间对该数字音频信号进行镜像信号的滤波。同理,请参考图5B,图5B为根据图2B的取样频率转换装置201所变化的实施例的示意图。取样频率转换装置501相似于图2B中的取样频率转换装置201,其相异之处为升降频模块230可另包含一低通滤波器(Low Pass Filter,LPF)233,电性连接于第二升频器231及第二降频器232之间,用来在该第二频率Fs2的数字音频信号进行升频和降频之间对该数字音频信号进行镜像信号的滤波。Furthermore, the sampling
在现有技术中,虽然音频ADC的取样频率转换装置100的APLL150可根据不同音频信号来产生对应模拟/数字转换时的取样频率,但一APLL在一般积体电路0.16微米的工艺下,约需要500*400(20k)个逻辑闸。在无减损数字音频输出品质的条件下,本发明音频ADC的取样频率转换装置200利用一升降频模块230以及一第二降频滤波模块240,而不需使用APLL150。升降频模块230所需的逻辑闸约为0.3k个,而第二滤波器所需的逻辑闸约为2K个,所以本发明音频ADC的取样频率转换装置只需约2.3k个逻辑闸。相较于现有技术,本发明音频ADC的取样频率转换装置可节省约17.7k个逻辑闸,也就是节省大约88%的逻辑闸数目。因此,本发明音频ADC的取样频率转换装置200占用较小电路面积,可有效降低成本。In the prior art, although the APLL150 of the sampling
综上所述,本发明提供一取样频率转换功能的音频ADC,可利用一系统时脉产生的工作频率将一模拟音频信号转换为一目标频率的数字音频信号。由于本发明的ADC不需要利用额外的石英振荡器或锁相回路产生取样频率,因此可有效降低电路面积及制造成本。To sum up, the present invention provides an audio ADC with a sampling frequency conversion function, which can convert an analog audio signal into a digital audio signal of a target frequency by using a working frequency generated by a system clock. Since the ADC of the present invention does not need to use an additional crystal oscillator or a phase-locked loop to generate sampling frequency, the circuit area and manufacturing cost can be effectively reduced.
以上所述仅为本发明的较佳实施例,凡依本发明权利要求所做的均等变化与修饰,皆应属本发明的涵盖范围。The above descriptions are only preferred embodiments of the present invention, and all equivalent changes and modifications made according to the claims of the present invention shall fall within the scope of the present invention.
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