CN102054100B - Static analysis-based method and system for detecting RTL (Resistor Transistor Logic) design errors - Google Patents

Static analysis-based method and system for detecting RTL (Resistor Transistor Logic) design errors Download PDF

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CN102054100B
CN102054100B CN201010594822A CN201010594822A CN102054100B CN 102054100 B CN102054100 B CN 102054100B CN 201010594822 A CN201010594822 A CN 201010594822A CN 201010594822 A CN201010594822 A CN 201010594822A CN 102054100 B CN102054100 B CN 102054100B
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characteristic information
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CN102054100A (en
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马丽丽
吕涛
李华伟
李晓维
段永颢
张金巍
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Institute of Computing Technology of CAS
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Abstract

The invention discloses a static analysis-based method and system for detecting RTL (Resistor Transistor Logic) design errors. The method comprises the following steps of: receiving an RTL design source code and a corresponding design specification file, constructing and storing a detection standard of errors to be detected according to the type of the errors to be detected and in combination with the design specification file; traversing the whole RTL design source code in modules aiming at the types of the errors to be detected, extracting characteristic information of the errors to be detected through lexical analysis, grammatical analysis and static semantic analysis, and storing the characteristic information; and judging whether the detection standard of the errors to be detected is matched with the characteristic information, if so, ending the error detection of the design to be detected, and otherwise, sending an error report.

Description

A kind of RTL design mistake detection method and system based on static analysis
Technical field
The present invention relates to VLSI Design checking field, particularly relate to a kind of register transfer level (Register Transfer Level, RTL) design mistake detection method and system based on static analysis.
Background technology
Development along with integrated circuit (IC) technology; Chip integration further improves; It is increasing that circuit scale becomes; Complexity is also increasingly high, realizes the consistance of (implementation) and design specifications (specification) for guaranteeing design, and design verification (design verification) becomes the ultimate challenge that faces in the IC design.In actual IC design flow process, functional verification (functional verification) has become key factor wherein, also be the maximum link of time consumption, and the growth of its treatment scale and efficient lags behind the growth of design scale.Therefore how robotization realizes repeating loaded down with trivial details proof procedure, further improves the efficient of functional verification, and it can be verified target design fast and accurately fully, is a good problem to study.
At present, the functional verification of integrated circuit mainly is divided into formalization checking and simplation verification two big class methods.The formalization checking mainly comprises equivalence checking (equivalence checking), theorem proving (theorem proving) and model testing (model checking) three class methods through the correctness that the mathematical reasoning of strictness comes proof system.Wherein, equivalence checking is mainly used in the function equivalence property between the design of checking different levels, by the industry widespread use.The theorem proving method is mainly deduced through mathematical theorem and is proved specific design attributes, but this method need the checking personnel have the process that deep mathematics grounding in basic skills guides theorem proving, generally only is used to verify program specification but not the actual code of design phase.And the model testing method will to design abstract be a finite state machine model, with the behavior of state transition system description design, with sequential logical description objective attribute target attribute, through all state spaces of Ergodic Theory, completion is to the automatic checking of system.The model testing technology has standardization, be easy to advantage such as robotization, but its state space size can be exponential growth along with register number in the design, causes " state explosion ", has limited its application in extensive design.
Simulation verification method is with good expansibility because of it, becomes the main verification method of extensive design.But simulation verification method is a kind of incomplete verification method; Simulate through giving design input test vector; And Simulation result and the correct golden model (golden model) of function are compared, with the function correctness of checking design under different test vectors.Checking to specific function needs the slip-stick artist to write out specific test vector by hand, and this is with expert's time of labor, and test vector is difficult between different designs, reuse.The detectabilities wrong or some more special mistakes of some profound logical organization aspects of existing for design itself of simplation verification are relatively poor in addition, like potential deadlock in the unreachable path of state machine when the dynamic operation, pin configuration mistake.
Because the growth of IC design complexity, the difficult problem that functional verification faces mainly comprises following 2 points:
1) complexity of the function logic of design to be measured sharply increases, and relies on slip-stick artist's experience or utilizes traditional verification method to be difficult to find all design mistakes;
2) the rapid increase of the register number that comprises of design to be measured causes the speed of dynamic simplation verification more and more slower, and makes that formal verification method is difficult to handle more.
In order to alleviate above two problems, the integrate circuit function verification method should reduce the manual work that needs as far as possible participates in, and avoids simulating dynamically the expense of design to be measured as far as possible.Utilize the static analysis method that design is realized analyzing, not direct modeling design to be measured and accomplish the Static Detection of particular design mistake, thus can improve the efficient of functional verification.
The static error detection technique originates from software field.In software field, static error detects the code of concern program, detects leak from the inner structure and the characteristic of program code.Early stage Static Detection mainly refers to static analysis, and along with the introducing of formalization verification method, static error detects to be expanded and is static analysis and program verification.The target that static error detects is not that prover is entirely true, but before program run the wherein potential mistake of discovery as much as possible, make things convenient for the tester early discovery and eliminate the defective of program code.
The static error detection method that is used for verifying design of integrated circuit in the prior art mainly is the formalization checking; This method is mainly passed through the correctness of strict mathematical reasoning proof system; But need the expert to participate in usually, and along with being exponential increase, register number in the design there is " state explosion " problem in its state space size meeting; Treatment scale is less, has limited its application in extensive design verification.
Summary of the invention
The object of the present invention is to provide a kind of RTL design mistake detection method and system based on static analysis.It can automatically extract Characteristics of Fault information to be detected and verify according to the RTL design code, and it is the frequent fault in the detection design effectively, can save time again, improves the efficient of design verification, the shortening design verification cycle.
A kind of RTL design mistake detection method based on static analysis for realizing that the object of the invention provides comprises the following steps:
Step 100. receives a RTL design source code and corresponding design specifications file, according to the type of mistake to be detected and combine said design specifications file, makes up the examination criteria of treating the sniffing mistake and stores;
Step 200. is to the type of mistake to be detected, and sub-module travels through whole said RTL design source code, extracts Characteristics of Fault information to be measured through lexical analysis, grammatical analysis and static semantic analysis, and characteristic information is stored;
Step 300. judges whether the examination criteria of said mistake to be measured and characteristic information mate, if then finish the error-detecting of design to be measured; Otherwise, send error reporting.
Said step 100 comprises the following steps:
The said design specifications file that step 110. provides according to exploitation side is confirmed the easy type of error that occurs in the design; And extract its examination criteria according to the code characteristic of type of error to be measured, be described as the examination criteria of type of error to be measured the configuration file of certain format;
Step 120. travels through the examination criteria that said configuration file extracted and stored type of error to be measured according to the type of mistake to be detected.
Said step 200 comprises the following steps:
Step 210. is analyzed the code characteristic of the type of error of mistake to be measured, need to confirm the characteristic information of extraction;
The characteristic information that step 220. is extracted according to said needs; Traversal RTL design source code; Said RTL design source code is carried out lexical analysis, grammatical analysis and static semantic analysis,, said characteristic information is stored in the specific data structure to obtain designing the characteristic information of realization.
Said step 220 comprises the following steps:
Step 221. is read in said RTL design source code with the form of character stream, through scanning one by one from left to right, produce the word sequence that comprises key word, identifier, constant, operational symbol or boundary's symbol;
Step 222. identifies the syntactic structure of said word sequence according to the syntax rule of said word sequence and program language; Confirm whether current statement is relevant with Characteristics of Fault information to be detected, thus record and the relevant structural information of Characteristics of Fault information to be detected;
Step 223. is carried out static semantic according to said structural information and is handled the characteristic information that definite design realizes.
Said step 300 comprises the following steps:
The said characteristic information of step 310. traversal, whether judging characteristic information and examination criteria mate, if then finish the error-detecting of design to be measured; Otherwise, execution in step 320;
Step 320. is stored in unmatched characteristic information in the specific data structure;
Step 330. judges whether that all characteristic information traversals finish, if then unmatched characteristic information is outputed to generation error report in the specified file; Otherwise, return step 310.
For realizing that the object of the invention also provides a kind of RTL design mistake detection system based on static analysis, said system comprises:
Examination criteria makes up module, is used to receive a RTL design source code and corresponding design specifications file, according to the type of mistake to be detected and combine said design specifications file, makes up the examination criteria of treating the sniffing mistake and stores;
Characteristic information extracting module is used for the type to mistake to be detected, and sub-module travels through whole said RTL design source code, extracts Characteristics of Fault information to be measured through lexical analysis, grammatical analysis and static semantic analysis, and characteristic information is stored;
Error detection module is used to judge whether the examination criteria of said mistake to be measured and characteristic information mate, if then finish the error-detecting of design to be measured; Otherwise, send error reporting.
Said examination criteria makes up module, comprising:
The configuration file generation module; The said design specifications file that is used for providing according to exploitation side is confirmed the type of error that design occurs easily; And extract its examination criteria according to the code characteristic of type of error to be measured, be described as the monitoring standard of type of error to be measured the configuration file of certain format;
Retrieval module is used for the type according to mistake to be detected, travels through the examination criteria that said configuration file extracted and stored type of error to be measured.
Said characteristic information extracting module comprises:
Analysis module is used to analyze the code characteristic of the type of error of mistake to be measured, need to confirm the characteristic information that extracts;
The characteristic information computing module; Be used for characteristic information according to said needs extraction; Traversal RTL design source code; Said RTL design source code is carried out lexical analysis, grammatical analysis and static semantic analysis,, said characteristic information is stored in the specific data structure to obtain designing the characteristic information of realization.
Said characteristic information computing module comprises:
Lexical Analysis Module is used for said RTL design source code is read in the form of character stream, through scanning one by one from left to right, produces the word sequence that comprises key word, identifier, constant, operational symbol or boundary's symbol;
Syntax Analysis Module; Be used for identifying the syntactic structure of said word sequence according to the syntax rule of said word sequence and program language; Confirm whether current statement is relevant with Characteristics of Fault information to be detected, thus record and the relevant structural information of Characteristics of Fault information to be detected;
The static semantic processing module is used for carrying out static semantic according to said structural information and handles, and confirms the characteristic information that design realizes.
Said error detection module comprises:
Matching module is used to travel through said characteristic information, and whether judging characteristic information and examination criteria mate, if then finish the error-detecting of design to be measured; Otherwise, unmatched characteristic information is stored in the specific data structure;
Judge module is used to judge whether that all characteristic information traversals finish, if then unmatched characteristic information is outputed to generation error report in the specified file; Otherwise, trigger matching module.
The invention has the beneficial effects as follows:
A kind of RTL design mistake detection method and system of the present invention based on static analysis; Avoided the deficiency of simulation verification method and formalization verification method; The Treatment Design scale is big, automaticity is high, detection speed is fast but have, the reusable advantage of detection of code, and can be used for before the simplation verification; Thereby find the mistake in the design as early as possible, shorten the proving time.
Description of drawings
Fig. 1 is the flow chart of steps of a kind of RTL design mistake detection method based on static analysis of the present invention;
Fig. 2 is the flow chart of steps that makes up the examination criteria of treating the sniffing mistake among the present invention;
Fig. 3 is the structural representation of a kind of RTL design mistake detection system based on static analysis of the present invention;
Fig. 4 is the program example of a state machine deadlock;
Fig. 5 is the wrong program example of pin preparation.
Embodiment
In order to make the object of the invention, technical scheme and advantage clearer; Below in conjunction with accompanying drawing and embodiment; (Register Transfer Level, RTL) design mistake detection method and system are further elaborated to a kind of register transfer level based on static analysis of the present invention.Should be appreciated that specific embodiment described herein only in order to explanation the present invention, and be not used in qualification the present invention.
A kind of RTL design mistake detection method and system based on static analysis of the present invention through design source code to be measured is scanned, extract Characteristics of Fault information to be measured based on the static analysis technology; According to the examination criteria of setting in advance, accomplish wrong detection then.Its advantage is the expense when not moving, and travelling speed is fast, and automaticity is high; Reusable between different designs; And can before simulation, find the frequent fault in the design, can help the user to improve the quality of hardware designs, improve the efficient of design verification.The frequent fault that is particularly suitable among the SoC, FPGA, microprocessor to complicacy is verified.
Earlier some professional terms are made an explanation technical scheme of the present invention in order better to explain:
The type of mistake to be detected is meant certain type of mistake.(for example: state machine deadlock, pin configuration mistake, control signal effective value mistake etc.)
The code characteristic of type of error is meant from the criterion of certain type of mistake of design code identification.(for example: the code characteristic of state machine deadlock has been meant certain section Code Design, and state machine and default wherein branch into null)
Characteristics of Fault information; Be meant the information relevant (for example: the characteristic information in the state machine deadlock comprises case relevant with the status recognition machine and if structural information, and the assignment information of the default branch relevant with the deadlock bugs on the status recognition machine) with the code characteristic of type of error
Introduce a kind of RTL design mistake detection method of the present invention in detail below in conjunction with above-mentioned target based on static analysis; Fig. 1 is the flow chart of steps of a kind of RTL design mistake detection method based on static analysis of the present invention; As shown in Figure 1, said method comprises the following steps:
Step 100. receives a RTL design source code and corresponding design specifications file, according to the type of mistake to be detected and combine said design specifications file, makes up the examination criteria of treating the sniffing mistake and stores;
Fig. 2 is the flow chart of steps that makes up the examination criteria of treating the sniffing mistake among the present invention, and as shown in Figure 2, said step 100 comprises the following steps:
The said design specifications file that step 110. provides according to exploitation side is confirmed the easy type of error that occurs in the design; And extract its examination criteria according to the code characteristic of type of error to be measured, be described as the monitoring standard of type of error to be measured the configuration file of certain format;
Step 120. travels through the criterion that said configuration file extracts and stores type of error to be measured, i.e. examination criteria according to the type of mistake to be detected.
Step 200. travels through whole said RTL design source code to the type sub-module of mistake to be detected, extracts Characteristics of Fault information to be measured through lexical analysis, grammatical analysis and static semantic analysis, and characteristic information is stored.
It is not to adopt existing lexical analysis that said source code is carried out lexical analysis, grammatical analysis and static semantic analysis, the grammatical analysis instrument, and be to use the thought of lexical analysis, grammatical analysis source code file is lined by line scan and to analyze.
The step that characteristic information extracts:
1. the code structure of profiling error type and behavioural characteristic thereof are confirmed the characteristic information that need extract;
2. traversal RTL design document carries out lexical analysis, grammatical analysis and static semantic analysis to source code, obtaining designing the attribute information of realization, characteristic information (for example: the character string array) is stored in the specific data structure;
Lexical analysis: source code is read in the form of character stream, through scan source code one by one from left to right, produce significant one by one word sequence, these words can be key word, identifier, constant, operational symbol, boundary's symbol etc.For the accurately mistake and the alignment error position of detection resources code, the row of the character row that can read at the lexical analysis phase record number.
Grammatical analysis: the syntactic structure that can identify the word symbol sequence according to the syntax rule of the result of lexical analysis and program language.Can confirm through grammatical analysis whether current statement is relevant with design attributes to be detected, thus the record structural information relevant with attribute to be detected.Carry out static semantic according to the structural information of syntactic analysis phase record at last and handle, confirm the attribute that design realizes.
Step 300. judges whether the examination criteria of said mistake to be measured and characteristic information mate, if then finish the error-detecting of design to be measured; Otherwise, send error reporting.
Through carrying out matching ratio to examination criteria that from configuration file, extracts and the characteristic information that from design source code, extracts, find mistake and produce error reporting.
The process that error reporting produces: in the process that detecting device detects source code; When the source code characteristic information inconsistent with examination criteria (have and conflict) that extracts; Produce error reporting, the error reporting content comprises: the Error Location of source code, and inconsistent with which kind of examination criteria.
The step of generation error report:
1. (for example: characteristic information string array), through in characteristic information, searching examination criteria, whether judging characteristic information and examination criteria mate the traversal characteristic information;
2. unmatched characteristic information (for example: the character string array) is stored in the specific data structure;
3. finish when characteristic information travels through, unmatched characteristic information is outputed in the specified file, the error reporting that promptly generates.
Corresponding to a kind of RTL design mistake detection method of the present invention based on static analysis; A kind of RTL design mistake detection system based on static analysis also is provided; Fig. 3 is the structural representation of a kind of RTL design mistake detection system based on static analysis of the present invention; As shown in Figure 3, said system comprises:
Examination criteria makes up module 1, is used to receive a RTL design source code and corresponding design specifications file, according to the type of mistake to be detected and combine said design specifications file, makes up the examination criteria of treating the sniffing mistake and stores;
Characteristic information extracting module 2 is used for the type to mistake to be detected, and sub-module travels through whole said RTL design source code, extracts Characteristics of Fault information to be measured through lexical analysis, grammatical analysis and static semantic analysis, and characteristic information is stored;
Error detection module 3 is used to judge whether the examination criteria of said mistake to be measured and characteristic information mate, if then finish the error-detecting of design to be measured; Otherwise, send error reporting.
Said examination criteria makes up module 1, comprising:
Configuration file generation module 11; The said design specifications file that is used for providing according to exploitation side is confirmed the type of error that design occurs easily; And extract its examination criteria according to the code characteristic of type of error to be measured, be described as the examination criteria of type of error to be measured the configuration file of certain format;
Retrieval module 12 is used for the type according to mistake to be detected, travels through the examination criteria that said configuration file extracted and stored type of error to be measured.
Said characteristic information extracting module 2 comprises:
Analysis module 21 is used to analyze the code characteristic of the type of error of mistake to be measured, need to confirm the attribute of the characteristic information that extracts;
Characteristic information computing module 22; Be used for characteristic information according to said needs extraction; Traversal RTL design source code; Said RTL design source code is carried out lexical analysis, grammatical analysis and static semantic analysis,, said characteristic information is stored in the specific data structure to obtain designing the characteristic information of realization.
Said characteristic information computing module 22 comprises:
Lexical Analysis Module 221 is used for said RTL design source code is read in the form of character stream, through scanning one by one from left to right, produces the word sequence that comprises key word, identifier, constant, operational symbol or boundary's symbol;
Syntax Analysis Module 222; Be used for identifying the syntactic structure of said word sequence according to the syntax rule of said word sequence and program language; Confirm whether current statement is relevant with Characteristics of Fault information to be detected, thus record and the relevant structural information of Characteristics of Fault information to be detected;
Static semantic processing module 223 is used for carrying out static semantic according to said structural information and handles, and confirms the characteristic information that design realizes.
Said error detection module 3 comprises:
Matching module 31 is used to travel through said characteristic information, and whether judging characteristic information and examination criteria mate, if then finish the error-detecting of design to be measured; Otherwise, unmatched characteristic information is stored in the specific data structure;
Judge module 32 is used to judge whether that all characteristic information traversals finish, if then unmatched characteristic information is outputed to generation error report in the specified file; Otherwise, trigger matching module 31.
Fig. 4 is the program example of a state machine deadlock, below in conjunction with Fig. 4 the embodiment of the static detection method of state machine deadlock in the RTL design verification of the present invention's realization is elaborated.
State machine is a kind of synchronous sequential logic circuit that is used to coordinate the coherent signal action.The state machine and the software design of RTL design have a great difference.In some applications; State machine generation single-particle inversion in circuit (Single Event Upset) possibly cause the logic state of register to be turned to unknown state, and this just requires the state machine of set meter can in the limited time, return to accessible state and normally move follow-up work.The main cause of state machine deadlock is to have unknown state during state machine is realized (be that the status register figure place is n, number of state is less than 2 in the common RTL design n), but unknown state is not carried out effective state transitions.
Through the example code of the state machine deadlock shown in the analysis chart 4 (a), can the examination criteria of state machine deadlock be described as the configuration file shown in Fig. 4 (b), and it is following to obtain the code characteristic of the mistake of this type of state machine deadlock in the RTL design:
(1) there are two parallel processes P1 and P2 in the same module;
(2) P1 is with CASE structrual description state transitions, and P2 exports with IF structrual description state;
(3) by assigned variable same variable in conditional-variable in the CASE structure and the IF structure, i.e. the existing attitude of state machine;
(4) there is DEFAULT branch in the CASE structure but it does not carried out effective state transitions.
Wherein, (1)~(3) are the general featuress of common state machine, and (4) are the adequate condition that causes RTL state machine deadlock.
Through above-mentioned analysis, utilize static error detection method of the present invention to realize that the testing process of state machine deadlock in the RTL design is divided into following steps:
Step1. with the examination criteria of state machine with the format of Fig. 4 (b) in configuration file, so that the state machine characteristic information of realizing with design carries out such mistake of matching detection;
Step2. the RTL design source code being carried out the state machine characteristic information extracts.Sub-module traversal RTL design source code; Condition (1)~(2) according to state machine deadlock code characteristic; Navigate to process and CASE structure in the process and the IF structure that realizes in each module through lexical analysis and grammatical analysis; Extract the information of condition variable name and DEFAULT branch in the CASE structure, and store, in like manner extract and store in the IF structure by the information of assigned variable with variable name, module information, positional information (row number) with to the transinformation of unknown state.Condition (3) according to state machine deadlock code characteristic; Through CASE characteristic information and the IF characteristic information that extracts carried out static semantic analysis, confirm and state machine characteristic information that design Storage realizes (module of description state machine and position, status register name, state machine are to the operation of unknown state);
Step3. through the state machine characteristic information of design realization and the coupling of the state machine examination criteria in the configuration file, the state machine deadlock that exists in the detection design.The state machine examination criteria in the configuration file is also extracted in scanning, and the state machine characteristic information coupling through the design with the Step2 extraction realizes realizes the detection of state machine deadlock, and provides reason, position and the module information that causes the state machine deadlock.
Fig. 5 is the wrong program example of pin preparation, below in conjunction with Fig. 5 the embodiment of the testing process of pin configuration mistake in the RTL design verification of the present invention's realization is elaborated.
In RTL design and since the slip-stick artist when design synthesis and placement-and-routing to the realization of pin configuration and design specifications require inconsistently, possibly produce the pin configuration mistake.The pin configuration mistake is a common mistake in the IC design, and the pin code and the pin configuration standard in the design specifications that need will design with the method for artificial Walkthrough usually in realizing are compared completion to such wrong detection.Through analyzing and summing up, can find that common pin configuration type of error is as shown in table 1.
The type of table 1 pin configuration mistake
Figure BDA0000039046660000101
Through the code of the pin configuration shown in the analysis chart 5 (a), can the examination criteria of pin configuration be described as the configuration file shown in Fig. 5 (b), and it is following to obtain the code characteristic of RTL design pin configuration mistake:
(1) pin name is defined as " pin signal name; ";
(2) number of pins is defined as " pin: number of pins. ".
Through above-mentioned analysis, utilize the static analysis method to realize that the testing process of pin configuration mistake in the RTL design is divided into following steps:
Step1. with the examination criteria of pin configuration with format shown in Fig. 5 (b) in configuration file, so that the pin configuration information that realizes with design is carried out such mistake of matching detection;
Step2. the pin code to design carries out the extraction of pin configuration characteristic information.The pin code of lining by line scan navigates to definition structure " the pin signal name of pin configuration through lexical analysis and grammatical analysis; " with " pin: number of pins. ", extract the signal name and the number of pins of also design Storage realization;
Step3. the pin configuration characteristic information of realizing through design and the matching ratio of the pin configuration examination criteria in the configuration file, the pin configuration mistake that exists in the detection design.The pin configuration examination criteria in the configuration file is also extracted in scanning, and the pin configuration characteristic information coupling through the design with the Step2 extraction realizes realizes the detection of pin configuration mistake.
Table 2 Static Detection pin configuration error reporting result
Figure BDA0000039046660000112
Utilize the RTL design mistake detection method based on static analysis of the present invention can realize detection to the pin configuration mistake among Fig. 5.Through the pin code of traversing graph 5a, navigate to the definition statement of pin configuration, and extract signal name and number of pins information.Through with the examination criteria matching ratio of the configuration file of the pin configuration characteristic information that extracts and Fig. 5 b; It is as shown in table 2 to obtain error reporting; Wherein the 1st classify detected wrong sum as; The 2nd classifies corresponding type of error as, and the 3rd classifies the pin configuration standard in the design specifications as, and the 4th classifies the pin configuration that design realizes as.Find 9 pin configuration mistakes in this example, type of error relates to 6 kinds, specifies with reference to table 1.Can testing result be outputed in the specified file simultaneously, be convenient to the checking personnel and confirm and correct a mistake.
Beneficial effect of the present invention is:
1. a kind of RTL design mistake detection method and system based on static analysis of the present invention enough extract Characteristics of Fault information to be detected automatically and verify according to the RTL design code, and its advantage is the expense when not moving; Automaticity is high; Accuracy in detection is high, and detection of code is reusable, and can before simulation, find the frequent fault in the design; Can help the user to improve the quality of hardware designs, improve the efficient of design verification;
2. a kind of RTL design mistake detection method and system of the present invention based on static analysis; The characteristics information extraction method of frequent fault in a kind of efficient and rational RTL design is provided; This method has simple, efficient, accurate, as to be easy to robotization realization and code reusability characteristics based on the static analysis technology;
3. a kind of RTL design mistake detection method and system of the present invention based on static analysis, analysis to as if design source code, do not need the Hand writing test vector, automaticity is high;
4. a kind of RTL design mistake detection method and system of the present invention based on static analysis, target is to find out possible frequent fault, rather than the proof design specifications meets special functional specification, the accuracy in detection height;
5. a kind of RTL design mistake detection method and system of the present invention based on static analysis, based on static analysis, the expense when not moving, detection speed is very fast relatively;
6. a kind of RTL design mistake detection method and system based on static analysis of the present invention can realize Static Detection before simplation verification, find common mistake in the design as early as possible, shortened the proving time; Easily be automated detection, and detection of code is reusable in other designs, so can improve the verification efficiency of design.
In conjunction with the drawings to the description of the specific embodiment of the invention, others of the present invention and characteristic are conspicuous to those skilled in the art.More than specific embodiment of the present invention is described and explains it is exemplary that these embodiment should be considered to it, and be not used in and limit the invention, the present invention should make an explanation according to appended claim.

Claims (10)

1. the RTL design mistake detection method based on static analysis is characterized in that said method comprises the following steps:
Step 100. receives a RTL design source code and corresponding design specifications file, according to the type of mistake to be detected and combine said design specifications file, makes up the examination criteria of treating the sniffing mistake and stores;
Step 200. is to the type of mistake to be detected, and sub-module travels through whole said RTL design source code, extracts Characteristics of Fault information to be measured through lexical analysis, grammatical analysis and static semantic analysis, and characteristic information is stored;
Step 300. judges whether the examination criteria of said mistake to be measured and characteristic information mate, if then finish the error-detecting of design to be measured; Otherwise, send error reporting;
Wherein, Lexical analysis is that source code is read in the form of character stream; Through scan source code one by one from left to right, produce significant one by one word sequence, these words can be key word, identifier, constant, operational symbol, boundary's symbol etc.; For the accurately mistake and the alignment error position of detection resources code, the row of the character row that can read at the lexical analysis phase record number;
Grammatical analysis is the syntactic structure that can identify the word symbol sequence according to the syntax rule of the result of lexical analysis and program language; Can confirm through grammatical analysis whether current statement is relevant with design attributes to be detected; Thereby write down the structural information relevant with attribute to be detected; Carry out static semantic according to the structural information of syntactic analysis phase record at last and handle, confirm the attribute that design realizes.
2. the RTL design mistake detection method based on static analysis according to claim 1 is characterized in that said step 100 comprises the following steps:
The said design specifications file that step 110. provides according to exploitation side is confirmed the easy type of error that occurs in the design; And extract its examination criteria according to the code characteristic of type of error to be measured, be described as the examination criteria of type of error to be measured the configuration file of certain format;
Step 120. travels through the examination criteria that said configuration file extracted and stored type of error to be measured according to the type of mistake to be detected.
3. the RTL design mistake detection method based on static analysis according to claim 1 is characterized in that said step 200 comprises the following steps:
Step 210. is analyzed the code characteristic of the type of error of mistake to be measured, need to confirm the characteristic information of extraction;
The characteristic information that step 220. is extracted according to said needs; Traversal RTL design source code; Said RTL design source code is carried out lexical analysis, grammatical analysis and static semantic analysis,, said characteristic information is stored in the specific data structure to obtain designing the characteristic information of realization.
4. the RTL design mistake detection method based on static analysis according to claim 3 is characterized in that said step 220 comprises the following steps:
Step 221. is read in said RTL design source code with the form of character stream, through scanning one by one from left to right, produce the word sequence that comprises key word, identifier, constant, operational symbol or boundary's symbol;
Step 222. identifies the syntactic structure of said word sequence according to the syntax rule of said word sequence and program language; Confirm whether current statement is relevant with Characteristics of Fault information to be detected, thus record and the relevant structural information of Characteristics of Fault information to be detected;
Step 223. is carried out static semantic according to said structural information and is handled the characteristic information that definite design realizes.
5. the RTL design mistake detection method based on static analysis according to claim 1 is characterized in that said step 300 comprises the following steps:
The said characteristic information of step 310. traversal, whether judging characteristic information and examination criteria mate, if then finish the error-detecting of design to be measured; Otherwise, execution in step 320;
Step 320. is stored in unmatched characteristic information in the specific data structure;
Step 330. judges whether that all characteristic information traversals finish, if then unmatched characteristic information is outputed to generation error report in the specified file; Otherwise, return step 310.
6. RTL design mistake detection system based on static analysis is characterized in that said system comprises:
Examination criteria makes up module, is used to receive a RTL design source code and corresponding design specifications file, according to the type of mistake to be detected and combine said design specifications file, makes up the examination criteria of treating the sniffing mistake and stores;
Characteristic information extracting module is used for the type to mistake to be detected, and sub-module travels through whole said RTL design source code, extracts Characteristics of Fault information to be measured through lexical analysis, grammatical analysis and static semantic analysis, and characteristic information is stored;
Error detection module is used to judge whether the examination criteria of said mistake to be measured and characteristic information mate, if then finish the error-detecting of design to be measured; Otherwise, send error reporting;
Wherein, Lexical analysis is that source code is read in the form of character stream; Through scan source code one by one from left to right, produce significant one by one word sequence, these words can be key word, identifier, constant, operational symbol, boundary's symbol etc.; For the accurately mistake and the alignment error position of detection resources code, the row of the character row that can read at the lexical analysis phase record number;
Grammatical analysis is the syntactic structure that can identify the word symbol sequence according to the syntax rule of the result of lexical analysis and program language; Can confirm through grammatical analysis whether current statement is relevant with design attributes to be detected; Thereby write down the structural information relevant with attribute to be detected; Carry out static semantic according to the structural information of syntactic analysis phase record at last and handle, confirm the attribute that design realizes.
7. the RTL design mistake detection system based on static analysis according to claim 6 is characterized in that, said examination criteria makes up module, comprising:
The configuration file generation module; The said design specifications file that is used for providing according to exploitation side is confirmed the type of error that design occurs easily; And extract its examination criteria according to the code characteristic of type of error to be measured, be described as the monitoring standard of type of error to be measured the configuration file of certain format;
Retrieval module is used for the type according to mistake to be detected, travels through the examination criteria that said configuration file extracted and stored type of error to be measured.
8. the RTL design mistake detection system based on static analysis according to claim 6 is characterized in that said characteristic information extracting module comprises:
Analysis module is used to analyze the code characteristic of the type of error of mistake to be measured, need to confirm the characteristic information that extracts;
The characteristic information computing module; Be used for characteristic information according to said needs extraction; Traversal RTL design source code; Said RTL design source code is carried out lexical analysis, grammatical analysis and static semantic analysis,, said characteristic information is stored in the specific data structure to obtain designing the characteristic information of realization.
9. the RTL design mistake detection system based on static analysis according to claim 8 is characterized in that said characteristic information computing module comprises:
Lexical Analysis Module is used for said RTL design source code is read in the form of character stream, through scanning one by one from left to right, produces the word sequence that comprises key word, identifier, constant, operational symbol or boundary's symbol;
Syntax Analysis Module; Be used for identifying the syntactic structure of said word sequence according to the syntax rule of said word sequence and program language; Confirm whether current statement is relevant with Characteristics of Fault information to be detected, thus record and the relevant structural information of Characteristics of Fault information to be detected;
The static semantic processing module is used for carrying out static semantic according to said structural information and handles, and confirms the characteristic information that design realizes.
10. the RTL design mistake detection system based on static analysis according to claim 6 is characterized in that said error detection module comprises:
Matching module is used to travel through said characteristic information, and whether judging characteristic information and examination criteria mate, if then finish the error-detecting of design to be measured; Otherwise, unmatched characteristic information is stored in the specific data structure;
Judge module is used to judge whether that all characteristic information traversals finish, if then unmatched characteristic information is outputed to generation error report in the specified file; Otherwise, trigger matching module.
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