CN1020387C

CN1020387C - Communication interface stirrup

Info

Publication number: CN1020387C
Application number: CN 87106702
Authority: CN
Inventors: 饶钢; 成晓华
Original assignee: Institute of Automation of Chinese Academy of Science
Current assignee: Institute of Automation of Chinese Academy of Science
Priority date: 1987-10-05
Filing date: 1987-10-05
Publication date: 1993-04-28
Anticipated expiration: 2002-10-05
Also published as: CN1039913A

Abstract

The present invention is used for a digital signal multichannel communication system, and can finish information exchange, monitoring and control among intelligent apparatuses. An IEEE488 standard interface bus (GPIB) is used an outer communication bus for finishing the connection with an STD bus (Z80, 6800CPU) in an industrial control machine. The present invention has the characteristics that Z80CPUDMA of the ZiLog company is connected with an 8291 chip of the Intel company; time sequence cooperation and a synchronous problem between the two buses in the process of data direct storage (DMA) are completed. The present invention solves the problem of the rapid transmission of large-bulk data between the STD bus and the IEEE488 bus.

Description

Communication interface stirrup

The invention belongs to H04J 17/00 and H04L7/00 in the International Patent Classification (IPC).

IEEE488 interface standard bus is that IEEE association issued in 1975, it is for being adapted to a kind of general parallel interface bus (GPIB) that Auto-Test System (intelligent measuring instrument) designs, and adopts the interface system of this unified bus to have following several characteristics:

A, can form any required Auto-Test System;

B, modular construction can be dismantled arbitrarily or set up again, also can work as General Instrument and use;

C, controller can be complicated computing machines, also can be simple programming controllers;

D, data transmission are reliable, and speed is quite fast;

E, use are flexibly, and be cheap.

Because this interface has so many advantage, thereby make it be widely used in various scientific researches and field of engineering technology such as physics, chemistry, biology, medical science, radar, communication, the metering production automation, the automatic control of industrial process.

Bus above-mentioned is a kind of interface bus, and STD-BUS is a kind of 8 computer-internal bus.The computing machine of employing STD-BUS has the characteristics of following several respects:

A, standardization, modularization (plug-in unit is board-like, often a plate has a certain specific function);

B, reliability height, fault are few, can be used for the more abominable place of environment;

C, dismounting, it is convenient especially to change and keep in repair;

D, expansion and exploitation are also very flexible.

Because STD-BUS has so many advantages, thereby it is used in computer industry control and monitoring automatically widely, also can be used for the processing of data and literal aspect simultaneously.

STD Industrial Control Computer bus system and IEEE488 bus standard all have and are used for intelligence instrument, the industrial process remarkable advantage of control automatically, but are one to be embodied in and few people bother about with both unification; STD Industrial Control Computer overall system just seldom uses in using the DMA data transmission, says nothing of to be used in being connected of STD Industrial Control Computer bus and IEEE488 bus.

The objective of the invention is to solve the high-speed traffic problem of the computing machine (normally instrument) that adopts STD-BUS and Other Instruments or higher leveled computing machine.The present invention has following characteristics:

A. solved the communication-cooperation problem of STD-BUS to IEEE488 interface bus;

B. solved the sequential coordination question between Zilog device (as Z80DMA) and the Intel device (as Intel 8291,8293);

C. be equipped with Z80DMA, communication speed is further accelerated, design rate can reach 2Mbaud/s, and the maximal rate of RS-232c is 9.6K baud/S).Simultaneously also can pull out DMA, communicate with the mode of program inquiring or software interruption;

D. function comparatively complete multiple functions such as (comprise) listening, say, and program is with the compilation language compilation;

E. device concentrates on the STD bus plug-in card of a standard, and is flexible and convenient to use.

Main points of the present invention are Z80DMA cooperated with the hardware of Intel8291 and mainly contain two aspects: (1) interface proposes the mode of interrupting; (2) 8291 cooperate with the sequential of Z80 system bus.

1, interrupt mode

Because Z80DMA and 8291 has interruption (INT) leading foot, therefore when using Z80DMA and 8291 fit applications, there is multiple interruption application way.Having selected for use Z80 interrupt mode 2 to make at this interrupts becoming more flexible.Pins such as 8291 DREQ, DACK, INT are relevant with their inner memories, and these memories and interrupt control word have corresponding relation.When 8291 received or send, the level of DREQ and INT pin changes can be by interrupting allowing the BI of position and the variation of BO be affected, and DREQ and INT will automatically reset when receiving or being sent completely.So can on circuit, omit this line of DACK, can replace DREQ to finish the DMA application with the INT pin simultaneously.Such 8291 INT pin just has 2 functions: interrupt to the Z80CPU application by Z80DMA (1); (2) DMA that finishes when DMA applies for.

2, Z80DMA cooperates with the sequential of Intel8291

When 8291 when request for data transmits, require Z80DMA only in a bus request, to finish whole data transmission.This point is the integrality for protected data, also is simultaneously the operation that makes DMA termination or Rogue program in order not make unexpected the interruption.Do not select the byte load mode for use for the usefulness of utilizing DMA as far as possible in addition.So selected continuous load mode for use, in case promptly Z80DMA and bus take with until the data of defined are whole transmitted till.And Z80DMA and 8291 synchronousing working when the dma mode are the RDY pin of 8291 INT pin being linked indirectly Z80DMA, and it can be resetted after bus is read.Make Z80DMA wait for the ready of external tapping data, this circuit and sequential relationship are seen Fig. 2.When read-write Z80DMA, IORQ and Y ₁Pass through G ₁RDY is resetted; G ₂Guarantee the RDY that when dma mode, resets, and interrupting keeping interrupt request during the application, and make Z80DMA and 8291 synchronous; G ₃Set RDY makes it finish the effect of application interruption and data transmission.

In interrupt procedure; because master routine operation; the Z80 instruction of relevant I/O mouth can make interrupt source disappear; interrupt failure and make,, adopted following interruption holding circuit for fear of this phenomenon occurring; it can be when interrupting application; identification Z80, the instruction of I/O mouth, thereby in the shielding interface card＜I/O〉enable line (two-way).So just can finish the function of interrupting protection, after skipping the instruction of Z80I/O mouth, propose to interrupt application more effectively.This part visible Fig. 3 interrupts holding circuit.Its function: in interface card I/O input and output, work as Y ₀, Y ₁In one become low level, I/O instruction identification output line is resetted, after once identifying the I/O instruction, by the rising edge of the I/O signal I/O instruction identification circuit that resets.

Make the I/O line traffic control, can be by＜I/O to I/O conducting, M ₁Startup command as identification.

Interface software comprises communication port both sides totally two covers, and every suit can be finished the master/slave control function of receiving and sending out.According to the agreement of IEEE-488 interface, existing for the end from system can make it become master control person by services request SRQ and corresponding the processing, so interface both sides' program circuit is roughly the same.And being an end of system, the initialization flow process of system at first oneself is changed to from system.According to artificial regulation some in the system become master control person then.System program, data and state space can dispose by Fig. 4.The subroutine flow process of using when for the control person of system sends or receives data.Fig. 5 receives from system to interrupt process flow diagram, and a distinguishing feature on the STD-IEEE488 communication interface card is to finish the data transmission (also can adopt the data transmission of alternate manner) of DMA in interrupting.The purpose of doing like this is that interrupt source is reduced, makes in an interface interrupts and finishes data transmission, and initialization interrupt circuit (interface of preparing next time interrupts) once more.

The data transmission of non-DMA mainly is to be used for adding instruction usefulness to equipment, will instruct and control code is deposited in specific impact damper by software, and transmitting-receiving DMA is used for the quick transmission of mass data piece.

In order to last circuit and software development the STD-IEEE488 communication interface card, it meets the regulation of STD bus fully, and onboard with Z80DMA, can use for the STD bus system.Because it can be connected with Z80CPU, can link to each other with the Z80 single card microcomputer equally by the bus changeover plug.The function that Z80 system and PC (being furnished with the PC-IEEE488 adapter in the PC) can be finished procedure stores, install additional by this piece plate.And can carry out the fast data exchange.

Description of drawings:

Fig. 1 is a STD-IEEE488 interface card block diagram, and C represents control line among the figure, and A represents address wire, D representative data line, and 8291 is hearer/speaker's interface chip, 8283 for receiving the transtation mission circuit chip.

Fig. 2 is for interrupting and DMA application circuit, Y among the figure ₁Sheet choosing for Z80DMA

Fig. 3 is for interrupting holding circuit

Fig. 4 is that program, data and state space distribute

Fig. 5 is from system break service routine flow process

STD bus and IEEE488 bus now are used for intelligence and the control field of robot. Behind the rapid communication that has solved between the double bus, the real-time that data-signal is processed is further improved; Solve the fast cache problem, such as the frequency values fast cache with the HP5345A frequency meter, measure in order to make the short-term stability of microwave signal frequency; As be used in real-time data acquisition and storage in the aerial survey. The STD-IEEE488 communication interface card is also to industrial mini system such as lathe, and manipulator Synchronization Control and instrument etc. have a significant effect.

Claims

1, a kind of communication interface card that constitutes by integrated circuit, selector switch, STD, IEEE488 bus and corresponding software, it is characterized in that main Intel8291 of use and Z80DMA chip in its circuit, when IEEE488 bus and STD bus Z80CPU carry out data communication, produce initial interrupt request by Intel8291, by sequential, level combinational circuit (shown in Figure 2), produce the method that vector interrupts by Z80DMA to STD bus one side again.

2, according to the described communication interface card of claim 1, it is characterized in that sequential, level combinational circuit realization DMA data transmission, be to trigger Z80DMA by sequential, level combinational circuit (shown in Figure 2), again by the reset ready end of Z80DMA of the read signal of STD bus by Intel8291 interrupt request end state.

3, according to the described communication interface card of claim 1, it is characterized in that the IEEE488 bus that constitutes and the data communication circuit between STD bus Z80CPU be made up of Intel8291, Z80DMA, Intel8293,74LS138,74LS32,74LS74,74LS00, all signal wires of IEEE488 bus connect with the standard of Intel8291, Intel8293, STD bus, is pressed Fig. 2 and is connected by address decoding and A0～A3 address wire addressing Intel8291 between Intel8291 and the Z80DMA.