CN102035250B - Semiconductor device, voltage comparison circuit, power management circuit and electronic instrument - Google Patents
Semiconductor device, voltage comparison circuit, power management circuit and electronic instrument Download PDFInfo
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Abstract
The present invention provides a semiconductor device, a voltage comparison circuit, a power management circuit and an electronic instrument. A mode for determining characteristics of devices is provided in the semiconductor device for connecting a plurality of devices in different kinds. A first switch (SW1) is set between a determination unit (14) and a signal wire (12). The first switch (SW1) is switched on in a determination period of the device (4) by the determination unit (14), and is then switched off. A second switch (SW2) is switched off in the determination period of the device (4) by the determination unit (14), and is then switched on. A signal wire (12) is connected between a port (P1) which can be used for connecting with the connection interfaces of a plurality of different kinds of devices (4) and a communication port (P2) of a processor for performing data communication with the device (4). The determination unit (14) monitors the electrical state of the signal wire and determines the devices (4) which is connected with the port.
Description
Technical field
The present invention relates to the semiconductor device of the different equipment being connected to multiple kind.
Background technology
1. the various electronic devices headed by portable phone, PDA (personal digital assistant), subnotebook PC have carried USB (USB (universal serial bus)) port (interface).USB port connects various different types of equipment.Electronic device judges for the presence or absence of the equipment connection of USB port, the kind of equipment or state, and transfers to the pattern corresponding with result of determination.Be just the interface beyond USB, many times also need kind or the state of determining the equipment be connected on connector (connector).
2. and on the various electronic devices headed by portable phone, PDA (personal digital assistant), subnotebook PC, carried CPU (CPU (central processing unit)), the DSP (digital signal processor) or numerous circuit such as liquid crystal panel, other simulation, digital circuits that carry out digital signal processing.In the electronic device of the battery-mounted battery-driven as power supply, each electronic circuit of instrument internal works according to the cell voltage from battery.
In electronic device, there is the terminal or USB (USB (universal serial bus)) port etc. via AC adapter, accept the power supply from external power source, even if battery allowance is less, or the electronic device that battery also can work is not installed.At this moment, battery management circuit (power management IC) is set and which in the voltage from external power source and the voltage from battery will makes electronic device work by for controlling.When battery is the accumulator of lithium ion battery etc., in electric power management circuit, be provided with the function that the voltage from external power source charges to battery.Electric power management circuit compares voltage from external power source and cell voltage, and controls which voltage to be supplied to load according to its comparative result.
[patent documentation 1] (Japanese) Patent Laid-Publication 6-276503 publication
[patent documentation 2] (Japanese) Patent Laid-Publication 9-219935 publication
[patent documentation 3] (Japanese) Patent Laid-Publication 3-49418 publication
[patent documentation 4] (Japan) JP 61-8677 publication
[patent documentation 5] (Japan) JP 2009-071534 publication
Summary of the invention
1. a mode of the present invention completes under relevant circumstances, and one of exemplary object of this mode is, provides a kind of in the semiconductor device of different equipment connecting multiple kind, the mode of the character of determining apparatus.
2., described in patent documentation 5, in electric power management circuit, carry the voltage comparator circuit for comparing voltage from external power source and cell voltage.But the voltage comparator circuit of patent documentation 5 flows through electric current all the time in operational amplifier or resistance, therefore there is the problem that power consumption becomes large.In addition, such problem is not limited to electric power management circuit, also can produce in general voltage comparator circuit.
A mode of the present invention completes in view of such problem, and one of exemplary object of this mode is, provides a kind of voltage comparator circuit reducing power consumption.
1. the semiconductor device of a mode of the present invention comprises: signal wire, connect can connect the communication interface of the equipment of multiple kind port and and equipment carry out between the communication terminal of the processor of data communication; Identifying unit, monitors the electric state of described signal wire, judges the equipment being connected to port; And the 1st switch, be arranged between identifying unit and signal wire.1st switch conducting during identifying unit determining apparatus, then ends.
According to which, after the judgement based on identifying unit terminates, identifying unit and signal wire can be separated, therefore, it is possible to reduce the identifying unit impact next on data communication band.
The semiconductor device of a mode can also comprise: the 2nd switch, it is arranged on the path of signal wire.2nd switch can end during identifying unit determining apparatus, then conducting.
At this moment, when identifying unit is just in action, the impact that the determination processing of processor on identifying unit is brought can be reduced.
Another mode of the present invention is also semiconductor device.This device comprises: signal wire, connect can connect the communication interface of the equipment of multiple kind port and and equipment carry out between the communication terminal of the processor of data communication; And identifying unit, the electric state of supervisory signal line, judges the equipment being connected to port.During identifying unit determining apparatus effectively, it is invalid then to become for identifying unit.
Engineering noise refers to, is sufficiently high to the degree can ignored the impact of the identifying unit that the data communication carried out via signal wire brings from the impedance to identifying unit viewed from signal wire.
The semiconductor device of a mode can also comprise: the 2nd switch, it is arranged on the path of signal wire.2nd switch ends during identifying unit determining apparatus, then conducting.
The semiconductor device of a mode can also comprise: connect detecting unit, judges whether port is connected to a certain equipment.During identifying unit determining apparatus can be, after detecting the connection of equipment by connection detecting unit, until during the stipulated time.
Also can be port be connects the terminal of the differential signal line of USB (Universal Serial Bus) interface, connect the electric state that detecting unit monitors the 2nd port be connected with the power lead of USB interface, by judging the presence or absence via the supply of the power supply of USB interface, thus determine whether to be connected to equipment.
Another mode of the present invention is electronic device.This electronic device comprises: the port connecting the communication interface of any one of the equipment of multiple kind; The processor of data communication is carried out with equipment; And the semiconductor device of the above-mentioned either type to be connected with port and processor.
According to which, can the character of correctly determining apparatus, and reliable data communication can be realized.
2. a mode of the present invention relates to the voltage comparator circuit of the threshold voltage for comparing input voltage and the regulation that input terminal applies.This voltage comparator circuit comprises: the 1st voltage comparison unit, is compared by input voltage with the 1st threshold voltage of regulation, is created on input voltage than the decision signal become valid during the 1st threshold voltage height; And the 2nd voltage comparison unit, become when decision signal become valid effective, and input voltage is compared with the 2nd threshold voltage of regulation.
According to which, the 2nd voltage comparison unit is configured to high precision, and the 1st voltage comparison unit is configured to relatively low precision, but reduces power consumption, thus can reduce the power consumption of the voltage comparator circuit entirety under the low situation of input voltage.
Input terminal also can be applied in the 1st voltage or 2nd voltage also higher than the 1st voltage.At this moment, the 1st threshold voltage can be the value higher than the 1st voltage.
According to which, when being applied with the 1st voltage, ensureing that the 2nd voltage comparison unit becomes invalid, only when being applied with the 2nd voltage, by carrying out high-precision voltage compare, the presence or absence of the applying of the 2nd voltage can be detected.
Another way of the present invention is electric power management circuit.This electric power management circuit comprises: the 1st terminal, is connected with external power source; 2nd terminal, is connected with battery; The voltage from external power source that input terminal accepts the 1st terminal applies is as the voltage comparator circuit of the above-mentioned either type of input voltage; Selection circuit, the comparative result based on voltage comparator circuit selects any one of the voltage from external power source and the cell voltage from battery; And lead-out terminal, the voltage selected by selection circuit is outputted to outside load circuit.
Another mode of the present invention is electronic device.This electronic device comprises: battery; Adapter, can load and unload external power source; Above-mentioned electric power management circuit; And load circuit, be connected to the lead-out terminal of electric power management circuit.
According to which, due to the power consumption of electric power management circuit can be reduced, therefore, it is possible to extend the life of a cell.
In addition, the combination in any of above inscape or by inscape of the present invention and the scheme showing phase double replacement between method, device, system etc. is also effective as mode of the present invention.
According to a mode of the present invention, can the character of determining apparatus.And according to another way, the power consumption of voltage comparator circuit can be reduced.
Accompanying drawing explanation
Fig. 1 is the block scheme of the structure of the electronic device representing the semiconductor device comprising the 1st embodiment.
Fig. 2 is the circuit diagram of the structure of the semiconductor device representing the 1st embodiment.
Fig. 3 is the timing diagram of the action of the semiconductor device representing Fig. 2.
Fig. 4 is the block scheme of the structure of the electronic device representing the electric power management circuit comprising embodiment.
Fig. 5 is the circuit diagram of the structure of the voltage comparator circuit representing embodiment.
Fig. 6 is the circuit diagram of another structure example representing the 1st voltage comparison unit.
Label declaration
2... electronic device, 4... equipment, 6... communication bus, 10... semiconductor device, 12... signal wire, 14... identifying unit, 16... detecting unit is connected, 20... processor, P1... port, P2 communication terminal, P3... port, P4... processor side terminal, SW1... the 1st switch, SW2... the 2nd switch, 10a... semiconductor equipment, 12... signal wire, 14a...USB charger identifying unit, 16a...VBUS detecting unit, 30... control module, 32... comparer, 34... data holding unit, M1... transistor, R1... the 1st resistance, R2... the 2nd resistance, R3... the 3rd resistance, R4... the 4th resistance, R5... the 5th resistance.
Embodiment
Below, based on preferred embodiment also with reference to accompanying drawing, the present invention being described.Identical label is added to the identical or equal inscape shown in each accompanying drawing, component, process, and suitably the repetitive description thereof will be omitted.In addition, embodiment be illustrate and and non-limiting the present invention, its combination of all characteristic sum described in embodiment may not be exactly the content of internal of the present invention.
In this manual, " state that component A is connected with component B " comprises the situation that situation, component A and component B that component A and component B physically directly connects connect indirectly via other components that can not have an impact to status of electrically connecting.
Similarly, " component C is arranged on the state between component A and component B ", except the situation that component A and component C or component B and component C are directly connected, also comprises situation about indirectly connecting via other components that can not have an impact to status of electrically connecting.
In addition, in this manual, suppose that symbol attached on voltage signal, current signal or resistance represents respective magnitude of voltage, current value or resistance value as required.
(the 1st embodiment)
Fig. 1 is the block scheme of the structure of the electronic device 2 representing the semiconductor device 10 comprising the 1st embodiment.Electronic device 2 comprises port (or also referred to as connector or terminal) P1, semiconductor device 10, processor 20.Port P1 is the connector of the communication interface that can connect multiple different types of equipment.
In the present embodiment, as communication interface, with USB (Universal Serial Bus; USB (universal serial bus)) be described for example.But the present invention is not limited thereto, UART (Universal Asynchronous Receiver Transmitter can be applicable to; UART), IEEE1397, the video various interfaces of, audio frequency.
In USB interface, provide power lead VBUS, ground wire GND, differential data lines D+, D-.The port P1 of Fig. 1 is the terminal being connected to differential data lines D+, D-, is in fact provided with two, but omits in FIG and be summarized as a display.Be connected to outside equipment 4 via communication bus 6 in port P1.
Processor 20 carries out data communication between equipment 4.Processor 20 can be integrated on identical semiconductor circuit board together with semiconductor device 10.
Semiconductor device 10 is arranged between the communication terminals P 2 of port P1 and processor 20.Semiconductor device 10 comprises port P3, processor side terminal P4, signal wire 12, identifying unit 14, connects detecting unit 16.
Port P3 is connected with port P1.Processor side terminal P4 is connected by terminals P 2 with the communication of processor 20.
Signal wire 12 is used between terminals P 2 (P4) for connectivity port P1 (P3) and communication.The electric state of identifying unit 14 supervisory signal line 12, and the kind, state etc. that judge the equipment 4 that port P1 connects.
In the present embodiment, identifying unit 14 judges whether the equipment that port P1 connects has provides power supply VBUS and the electric current supply ability (1.8A) of charging to the battery (not shown) of electronic device 2 to electronic device 2.Have the equipment (USB special charger) 4 of such electric current supply ability therein, differential data lines D+, the D-of communication bus 6 are shorted.Do not have the equipment of electric current supply ability, namely carry out equipment (main frame or the usb hub) 4 of data communication with processor 20 in the inside of equipment 4, differential data lines D+, D-are drop-down via resistance.Concrete decision method about identifying unit 14 will describe later.
1st interrupteur SW 1 is arranged between identifying unit 14 and signal wire 12.1st interrupteur SW 1 is conducting during (between detection period) τ DET during identifying unit 14 determining apparatus 4, then ends.
2nd interrupteur SW 2 is arranged on the path of signal wire 12, namely between equipment 4 and processor 20.2nd interrupteur SW 2 is ended during τ DET between detection period, then conducting.
Connect detecting unit 16 and judge whether be connected to a certain equipment on port P1.The presence or absence that 1st interrupteur SW 1 and the 2nd interrupteur SW 2 detect according to the connection being connected detecting unit 16 pairs of equipment 4 and being switched.Specifically, between detection period, τ DET connects detecting unit 16 to detect that the connection of equipment 4 starts, until during the stipulated time.Stipulated time is set to longer than the time needed for identifying unit 14 determining apparatus 4.
Connect detecting unit 16 and can detect whether there is equipment 4 connectivity port P1 to mechanically.Such mechanism utilizes known technology.Or, also can in preferred mode, connect the electric state that detecting unit 16 monitors the 2nd port (not shown) be connected with the power lead VBUS of USB interface, and determined whether via USB interface supply power VBUS, thus determine whether the equipment that is connected to 4.The circuit that VBUS detects usually can be carried in the electronic device possessing USB interface; therefore by its testing result being used for the control of the 1st interrupteur SW 1 and the 2nd interrupteur SW 2; can the presence or absence of the reliably connection of determining apparatus 4, and have without the need to newly arranging the advantage connecting detecting unit 16.
It is more than the structure of semiconductor device 10.Its action is then described.
Original state is that port P1 does not have connection device 4, and the 1st interrupteur SW 1 conducting, the 2nd interrupteur SW 2 is ended.
User on the port P1 of electronic device 2 via communication by bus 6 connection device 4.Accept this, connect detecting unit 16 and detect equipment 4, and the kind of identifying unit 14 determining apparatus 4.During the judgement of identifying unit 14, because the 2nd interrupteur SW 2 is ended, the electric effect that therefore processor 20 pairs of signal wires bring is cut off, and can judge reliably.
And after the detection connecting detecting unit 16, after the stipulated time, the 1st interrupteur SW 1 is ended, the 2nd interrupteur SW 2 conducting.When equipment 4 is when carrying out the equipment communicated between processor 20, after the 2nd interrupteur SW 2 conducting, establish the link between processor 20 and equipment 4, between processor 20 and equipment 4, carry out data communication.During this data communication, because the 1st interrupteur SW 1 is ended, therefore, it is possible to eliminate the impact connecting detecting unit 16 and bring data communication rates.
More than action and the advantage of semiconductor device 10.
Then, the concrete configuration example of the semiconductor device possessing above-mentioned feature is described.Fig. 2 is the circuit diagram of the structure of the semiconductor device 10a representing embodiment.Semiconductor device 10a is mounted on portable telephone terminal.Further, in USB interface, as equipment 4, be connected to following in any one:
1.USB special charger
2.USB main process equipment, usb hub
3.USB hands-free connector
4.USB headphone
Semiconductor device 10a comprises signal wire 12p, 12n (being referred to as signal wire 12 as required), USB charger identifying unit 14a, VBUS detecting unit 16a, control module 30.USB charger identifying unit 14a, VBUS detecting unit 16a respectively with the identifying unit 14 of Fig. 1, to connect detecting unit 16 corresponding.
VBUS detecting unit 16a becomes effective when VBUS_DET_EN signal become valid (assert), monitors VBUS terminal, and is compared with the threshold voltage vt h of regulation by its current potential.Its result, when VBUS > Vth, validation VBUS detection signal (VBUS_DET signal).
Control module 30 accepts VBUS_DET signal.Control module 30 when VBUS_DET signal become valid, after its 2.6ms, validation initiating signal (CHG_DET_EN signal).CHG_DET_EN signal during the stipulated time (20ms) in become valid, being then disabled (negate).
USB charger identifying unit 14a passes through the electric state of supervisory signal line 12, the kind of determining apparatus 4.USB charger identifying unit 14a is configured to changeable effectively with invalid, during CHG_DET_EN signal become valid, become effective.In disarmed state, see that the impedance to USB charger identifying unit 14a is very high from signal wire 12.In other words, in disarmed state, USB charger identifying unit 14a is configured to can not produce electric effect for signal wire 12 substance.It is effective, invalid switch for being switched and determined unit 14 that 1st interrupteur SW 1 of Fig. 1 also can be understood as.
Control module 30 after being disabled of CHG_DET_EN signal, validation path enable signal (PATH_EN signal).When PATH_EN signal become valid, the 2nd interrupteur SW 2a, SW2b conducting.
The structure of USB charger identifying unit 14a is then described.USB charger identifying unit 14a comprises the 1st interrupteur SW 1a ~ SW1c, the 1st resistance R1 ~ the 5th resistance R5, comparer 32, data holding unit 34, transistor M1.In addition, the 1st interrupteur SW 1a, SW1b are equivalent to the 1st interrupteur SW 1 of Fig. 1.
When initiating signal CHG_DET_EN signal become valid, the 1st interrupteur SW 1a ~ SW1c conducting.Signal wire 12p is essentially pulled up to the voltage V33 of regulation via the 1st resistance R1 and the 1st interrupteur SW 1a.The 2nd resistance R2, the 1st interrupteur SW 1b and the 3rd resistance R3 has been connected in series between signal wire 12n and ground terminal.By the 2nd resistance R2 and the 3rd resistance R3, by dividing potential drop, the voltage Vx after dividing potential drop is imported into the in-phase input terminal of comparer 32 to the current potential of signal wire 12n.
The voltage V33 of 4th resistance R4 and the 5th resistance R5 to regulation carries out dividing potential drop, and the voltage Vref after dividing potential drop is applied to the reversed input terminal of comparer 32.1st interrupteur SW 1c is arranged on the feed path of the power supply of comparer 32.
Data holding unit 34 keeps the output signal of comparer 32.Comparer 32, when being disabled of VBUS_DET signal, is released from maintenance (hold) state.The drain electrode of transistor M1 is pulled up by resistance R11, and exports the value kept by data holding unit 34 with the form of open drain.
It is more than the structure of semiconductor device 10a.Its action is then described.Fig. 3 is the sequential chart of the action of the semiconductor device 10a representing Fig. 2.Moment t0 via USB cable erecting equipment 4.So bus voltage VBUS rises.
If at moment t1, bus voltage VBUS is more than the 1st threshold voltage vt h1 (=2.5V), then VBUS_DET_EN signal become valid (high level), and VBUS detecting unit 16a becomes effective.VBUS_DET_EN signal is by not shown circuit evolving.Bus voltage VBUS compares with threshold voltage vt h2 (=3.2V) by VBUS detecting unit 16a, if become VBUS > Vth2 (moment t2), then and validation VBUS_DET signal (high level).The situation that control module 30 become valid using VBUS_DET signal as opportunity, τ DET, validation CHG_DET_EN signal (high level) between the detection period of the regulation of moment t3 ~ t4.If CHG_DET_EN signal become valid, then USB charger identifying unit 14a becomes effective.USB charger identifying unit 14a in the active state, the 1st interrupteur SW 1a ~ SW1c conducting.
(1) equipment 4 is situations of USB special charger
At this moment, about 4 ~ 5.3V is provided as bus voltage VBUS.In addition, in the inside of equipment 4, communication differential data lines D+, the D-of bus 6, namely port P1+ and P1-is shorted (single dotted broken line of Fig. 2).
By the 1st interrupteur SW 1a conducting, the current potential of signal wire 12p is essentially pulled up to high level (V33).In equipment 4, because port P1+ and P1-is shorted, therefore, the current potential of signal wire 12n is also essentially pulled up to high level (V33).Its result, Vx > Vref sets up, and exports high level from comparer 32.
Data holding unit 24, at least during moment t4 ~ t5, continues the output level keeping comparer 32.During this, USBCHG_DET signal maintains the low level for representing the situation that USB special charger is detected.
Then, take off equipment 4, if bus voltage VBUS at moment t5 lower than threshold voltage vt h2, being then disabled of VBUS_DET signal.Accept this, the hold mode of data holding unit 34 is released.
In addition, after between detection period, τ DET terminates, during moment t4 ~ t5, PATH_EN signal become valid, the 2nd interrupteur SW 2a, SW2b conducting.In addition, when connecting USB special charger as equipment 4, the 2nd interrupteur SW 2a, SW2b can still end.This is because processor does not need to carry out data communication with equipment 4.
(2) situation of main frame or usb hub is connected to
At this moment, about 4 ~ 5.3V is provided as bus voltage VBUS.In addition, in the inside of equipment 4, communication differential data lines D+, the D-of bus 6, namely port P1+ and P1-is respectively by drop-down (solid line of Fig. 2).
Because signal wire 12n is drop-down, therefore voltage Vx becomes low level.Thus, become Vx < Vref, comparer 32 be output into low level.At this moment, USBCHG_DET becomes high impedance.
In addition, after between detection period, τ DET terminates, during moment t4 ~ t5, PATH_EN signal become valid, the 2nd interrupteur SW 2a, SW2b conducting.Then, between not shown processor 20 and equipment 4, establish link, data communication starts.
(3) situation of USB hands-free unit is connected to.
At this moment, identical with the situation of the main frame being connected to (2).
(4) situation of headphone is connected to
At this moment, bus voltage VBUS is biased to about 1.7 ~ 1.92V.At this moment, owing to being VBUS < Vth1, therefore each unit of semiconductor device 10a is failure to actuate, and USBCHG_DET signal becomes high impedance.By other not shown circuit, judge that headphone is stereo or monophony (monaural).
It is more than the action of semiconductor device 10a.According to the semiconductor device 10 of this Fig. 1 or the semiconductor device 10a of Fig. 2, the identifying unit 14 (14a) being used for the character of determining apparatus 4 can be separated from signal wire 12, therefore, it is possible to reduce identifying unit 14 (14a) impact next on data communication band.On the contrary in judgement, processor 20 can be separated from signal wire 12, therefore, it is possible to the impact that the property determination of minimizing processor 20 on the equipment 4 of identifying unit 14 brings.
Above, a mode of the present invention is described based on the 1st embodiment.This embodiment illustrates, and can there is various variation in these each inscapes or each treatment progress, their combination.Below, such variation is described.
The semiconductor device 10 of Fig. 1 is not limited to the such application of Fig. 2, is applicable to the interface of various standard.
(the 2nd embodiment)
Fig. 4 is the block scheme of the structure of the electronic device 200 representing the electric power management circuit 101 comprising the 2nd embodiment.Electronic device 200 is such as the information terminal instrument of the battery-driven of portable telephone terminal, PDA, notebook type PC etc.Electronic device 200 comprises electric power management circuit 101, battery 110, load 112, adapter terminals 114.
Battery 110 is accumulators of lithium ion battery or Ni-MH battery etc., exports cell voltage V1 (=Vbat).Adapter terminals 114 is the terminals that can load and unload external power source 210, accepts voltage (hereinafter referred to as the external voltage) V2 from external power source 210.Electric power management circuit 101 accepts external voltage V2 and cell voltage V1, selects any one to be supplied to load 112, and utilizes external voltage V2 to charge to battery 110.Load 112, headed by not shown power circuit, DSP, liquid crystal panel, comprises other mimic channels, digital circuit.External power source 210 is such as USB (USB (universal serial bus)) bus power source or AC adapter commercial ac voltage being transformed to DC voltage.Below, the situation of usb bus power supply is described.That is, external voltage V2 is the VBUS voltage be equivalent in USB standard.
Electric power management circuit 101 comprises external voltage detection circuit (also referred to as voltage comparator circuit) 40, selection circuit 50, charging control unit (not shown), and is integrated on semiconductor circuit board as function IC.Electric power management circuit 101 accepts external voltage V2 in adapter terminals 102, accepts cell voltage V1 in battery terminal 104.Lead-out terminal 106 is connected to load 112.Adapter terminals 102 is connected with the VBUS terminal of USB cable.That is, if adapter terminals 102 loads onto USB cable, then adapter terminals is provided power supply VBUS (=V2).
External voltage detection circuit 40 judges the presence or absence of external voltage V2, or judges whether external voltage V2 has the sufficient voltage level being enough to drive load 112, when having sufficient voltage level, and validation detection signal S1 (high level).Specifically, the threshold voltage (the 2nd threshold voltage vt h2 described later) of the external voltage V2 and regulation that are input to input terminal P1 compares by external voltage detection circuit 40, and generates the detection signal S1 representing comparative result.Electric power management circuit 101 with reference to detection signal S1, according to whether providing bus voltage VBUS and switch its pattern.
Such as selection circuit 50 accepts comparative result, i.e. control signal (also referred to as the VBUS detection signal) S1 of voltage comparator circuit 40, when detection signal S1 become valid (high level), select external voltage V2, when being disabled of detection signal S1 (low level), select cell voltage V1.The structure of selection circuit 50 without particular limitation of.
The voltage comparator circuit of present embodiment can be used in the external voltage detection circuit 40 carrying out voltage compare process just.Below, the structure of account for voltage comparator circuit 40.
Fig. 5 is the circuit diagram of the structure of the voltage comparator circuit (external voltage detection circuit) 40 representing the 2nd embodiment.In addition, the voltage comparator circuit 40 of Fig. 5 also can utilize as the VBUS detecting unit 16a of Fig. 2.At this moment, detection signal S1 corresponds to the signal VBUS_DET of Fig. 2.
Voltage comparator circuit 40 compares and is applied to the input voltage VIN of input terminal P1 and the threshold voltage of regulation.When input voltage VIN is connected to external power source 210 on input terminal P1, become equal with external voltage V2.Input terminal P1 is applied with cell voltage V1 via pull-up resistor R10 and interrupteur SW 3.When interrupteur SW 3 conducting, input voltage VIN becomes equal with cell voltage V1.Interrupteur SW 3 conducting when the adapter terminals 114 of Fig. 4 does not load onto connector.The presence or absence of installing is judged by other not shown blocks.
That is, one of them value of input voltage VIN power taking cell voltage V1 or external voltage V2 on input terminal P1 is applied to.Set up in external voltage V2 and cell voltage V1
V2＞V1
Relation.Such as cell voltage V1 is about 3.5 ~ 4.2V, and external voltage V2 (=VBUS) is about 5V.
Voltage comparator circuit 40 comprises the 1st voltage comparison unit 42 and the 2nd voltage comparison unit 44.Input voltage VIN compares with the 1st threshold voltage vt h1 of regulation by the 1st voltage comparison unit 42, and is created on input voltage VIN than the decision signal S2 become valid during the 1st threshold voltage vt h1 height.Here, expect the 1st threshold voltage vt h1 to be set as that the voltage envisioned than cell voltage V1 is high.
2nd voltage comparison unit 44 is configured to changeable effectively with invalid.The power consumption of 2nd voltage comparison unit 44 in disarmed state is essentially zero.At least, power dissipation ratio the 2nd voltage comparison unit 44 power consumption in the active state of the 1st voltage comparison unit 42 is low.
2nd voltage comparison unit 44 becomes effective when decision signal S2 become valid.In effective status, input voltage VIN compares with the 2nd threshold voltage vt h2 of regulation by the 2nd voltage comparison unit 44.Result relatively, if VIN > Vth2, then validation detection signal S1 (high level), the ineffective treatment (low level) when VIN < Vth2.
As described later, the 2nd voltage comparison unit 44 power consumption be configured in disarmed state is essentially zero or become very little.
Then, the concrete structure example of the 1st voltage comparison unit 42 is described.1st voltage comparison unit 42 comprises the 1st transistor M1, the 2nd transistor M2, the 1st resistance R1, the 2nd resistance R2, the 3rd resistance R3.
1st transistor M1 is P channel mosfet, and its grid inputs the voltage V3 of regulation, its source electrode is connected with input terminal P1.
Between the drain electrode of the 1st transistor M1 and ground terminal, be connected in series as impedor 1st resistance R1, the 2nd resistance R2.1st resistance R1, the drain voltage of the 2nd resistance R2 to the 1st transistor M1 carry out dividing potential drop.2nd transistor M2 is N-channel MOS FET, its grid applies the output voltage V10 of bleeder circuit (R1, R2).The source ground of the 2nd transistor M2, thus current potential is fixed.The 3rd resistance R3 is provided with between the drain electrode of the 2nd transistor M2 and input terminal P1.
The action of the 1st voltage comparison unit 42 is then described.By threshold voltage writing Vthp, Vthn between the respective grid source of the 1st transistor M1 and the 2nd transistor M2.
(1) during VIN < V3+Vthp
1st transistor M1 ends.When the 1st transistor M1 ends, its drain voltage is 0V, and the output voltage V10 of bleeder circuit also becomes 0V.At this moment, the 2nd transistor M2 ends, and decision signal S2 becomes high level (being disabled).
Here, need to pay close attention to, when VIN < V3+Vthp, because the 1st transistor M1 and the 2nd transistor M2 ends, therefore there is not effective current path in the 1st voltage comparison unit 42, thus the power consumption of the 1st voltage comparison unit 42 is essentially zero.In addition, because the 1st voltage comparison unit 42 utilizes the threshold voltage of the grid of MOSFET, therefore the precision of voltage compare is so not high.
(2) during VIN > V1+Vthp
1st transistor M1 conducting.The output voltage V10 of bleeder circuit (R1, R2) becomes
V10＝VIN×R2/(R1+R2)
2nd transistor M2 conducting.Its result, decision signal S2 becomes low level (validation).
That is, the 1st voltage comparison unit 42 exports with the conducting of the 1st transistor M1, ends corresponding decision signal S2.Further, VIN > V3+Vthp is equivalent to the 1st above-mentioned threshold voltage vt h1.As long as the voltage V3 of regulation determines as V3+Vthp is higher than cell voltage V1.Such as, if use cell voltage V1 itself as voltage V3, then the condition of V3+Vthp > V1 just meets certainly.In addition, as voltage V3, other voltages being different from cell voltage V1 also can be used.
In addition, by the combination of the 1st resistance R1 and the 2nd resistance R2, two threshold voltages can be set to the 1st voltage comparison unit 42.
That is, in order to make decision signal S2 become low level (validation), demand fulfillment
VIN＞V3+Vthp ...(1)
VIN×R2/(R1+R2)＞Vthn ...(2)
If formula (2) is out of shape, then can obtain
VIN＞(R1+R2)/R2×Vthn ...(2’)
Thus, can be considered as the 1st threshold voltage vt h1 set by the 1st voltage comparison unit 42 be
(a)(V3+Vthp)
(b)(R1+R2)/R2×Vthn
Two voltages in high voltage.
The concrete structure example of the 2nd voltage comparison unit 44 is then described.
2nd voltage comparison unit 44 comprises reference voltage source 46, comparer 48, the 4th resistance R4, the 5th resistance R5, the 1st interrupteur SW 1, the 2nd interrupteur SW 2.
Comparer 48 above accepts the voltage VIN ' corresponding with input voltage VIN at its 1st terminal (in-phase input terminal), the upper reference voltage V ref accepting regulation of its 2nd terminal (reversed input terminal), and compares VIN ' and Vref.In Figure 5, the 4th resistance R4 and the 5th resistance R5 carries out dividing potential drop to input voltage VIN, and formation voltage VIN '.2nd interrupteur SW 2 is arranged between the 4th resistance R4 and input terminal P1, and the conducting when decision signal S2 become valid, ends during being disabled.
1st interrupteur SW 1 is arranged between the power supply terminal 49 of comparer 48 and input terminal P1.1st interrupteur SW 1 conducting when decision signal S2 become valid, ends during being disabled.
Reference voltage source 46 accepts input voltage VIN on its power supply terminal.Reference voltage source 46 generates reference voltage V ref.Reference voltage source 46 can be bandgap regulator (band gap regulator), and cell voltage V1 can be used to generate reference voltage V ref, and its structure is not limit.The 1st interrupteur SW 1 is provided with between the power supply terminal 47 and input terminal P1 of reference voltage source 46.
The action of the 2nd voltage comparison unit 44 is then described.
When being disabled of decision signal S2, the 1st interrupteur SW 1 is ended.Thus can not be provided power supply in reference voltage source 46, comparer 48, their power consumption is essentially zero.In addition, because the 2nd interrupteur SW 2 is also ended, the electric current therefore flowing through the 4th resistance R4 and the 5th resistance R5 is also cut off, and power consumption reduces.In addition, the impedance of the 4th resistance R4 and the 5th resistance R5 abundant high time, also can omit the 2nd interrupteur SW 2.
If decision signal S2 become valid, then the 1st interrupteur SW 1, the 2nd interrupteur SW 2 are all by conducting, and comparer 48 compares input voltage VIN ' and reference voltage V ref.Further, exist
VIN×R5/(R4+R5)＞Vref
Time, detection signal S1 become valid (high level).On the contrary, exist
VIN×R5/(R4+R5)＜Vref
Time, being disabled of detection signal S1 (low level).
That is, Vref × (R4+R5)/R5 is equivalent to the 2nd above-mentioned threshold voltage vt h2.Because the 2nd voltage comparison unit 44 utilizes comparer 48, therefore ratio of precision the 1st voltage comparison unit 42 of voltage compare is high.
It is more than the structure of voltage comparator circuit 40.Then the action of account for voltage comparator circuit 40 entirety.
(1) when external voltage V2 is not provided
If at this moment interrupteur SW 3 conducting, then the input voltage VIN of input terminal P1 is pulled up as cell voltage V1.Because VIN (=V1) is lower than the 1st threshold voltage vt h1, therefore decision signal S2 being still disabled.Therefore, the 2nd voltage comparison unit 44 is disarmed state.When the 2nd voltage comparison unit 44 is invalid, detection signal S1 is low level (being disabled).
In this condition, the power consumption of the 1st voltage comparison unit 42 and the 2nd voltage comparison unit 44 is all suppressed to zero.
(2) when external voltage V2 is provided
At this moment interrupteur SW 3 is ended, and the input voltage VIN of input terminal P1 is equal with external voltage V2.Further, if VIN (=V2) is higher than the 1st threshold voltage vt h1, then decision signal S2 become valid, and carries out high-precision voltage compare by the 2nd voltage comparison unit 44.
Then, if be judged to be V2 < Vth2 by the 2nd voltage comparison unit 44, being then disabled of detection signal S1.When being disabled of detection signal S1, the selection circuit 50 of Fig. 4 selects cell voltage V1, and is supplied to load 112.
On the contrary, if be judged to be V2 > Vth2, then detection signal S1 become valid.If detection signal S1 become valid, then the selection circuit 50 of Fig. 4 selects external voltage V2, and is supplied to load 112.
It is more than the action of electric power management circuit 101.Be summarized as follows, voltage comparator circuit 40 is first low by precision but power consumption is little the 1st voltage comparison unit 42 compares input voltage VIN and the 1st threshold voltage vt h1.Then, if VIN > Vth1 sets up, then input voltage VIN and the 2nd threshold voltage vt h2 is compared by high-precision 2nd voltage comparison unit 44.
In the past, only compared by the threshold voltage (voltage corresponding with the 2nd threshold voltage vt h2 of embodiment) of the comparer pair voltage corresponding with input voltage VIN and regulation, and result controlled selection circuit 50 based on the comparison.Therefore, even if under the situation not providing external voltage V2, comparer also can action, and power consumption becomes large.
Relatively, according to the voltage comparator circuit 40 of Fig. 5, do not providing external voltage V2, even if or provide voltage level also under low-down situation, the power consumption of voltage comparator circuit 40 entirety can be reduced.
Above, the present invention is described based on embodiment.This embodiment illustrates, and can there is various variation in these each inscapes or each treatment progress, their combination.Below, such variation is described.
Fig. 6 is the circuit diagram of another structure example representing the 1st voltage comparison unit.1st voltage comparison unit 42a comprises the 6th resistance R6 ~ the 8th resistance R8, the 3rd transistor M3.6th resistance R6, the 7th resistance R7 are bleeder circuits, carry out dividing potential drop to input voltage VIN.3rd transistor M3 is N-channel MOS FET, and its source ground thus current potential are fixed.The input voltage V11 after dividing potential drop (=VIN × (R7)/(R6+R7)) is inputted in the grid of the 3rd transistor M3.8th resistance R8 is arranged between the drain electrode of input terminal P1 and the 3rd transistor M3.
The action of the 1st voltage comparison unit 42a is then described.By threshold voltage writing Vthn between the grid source of the 3rd transistor M3.
VIN×(R7)/(R6+R7)＜Vthn
Time, the 3rd transistor M3 ends, being disabled of decision signal S2 (high level).
VIN×(R7)/(R6+R7)＞Vthn
Time, the 3rd transistor M3 conducting, become valid (low level).
That is, Vthn × (R6+R7)/R7 is equivalent to the 1st above-mentioned threshold voltage vt h1.
1st voltage comparison unit 42 of the 1st voltage comparison unit 42a and Fig. 5 of Fig. 6 is compared, and does not need the voltage V3 (reference voltage) accepting regulation.Therefore, can just utilize in the situation that cannot utilize the voltage different from input voltage VIN.On the other hand, owing to having electric current to flow through all the time in the path of the 6th resistance R6 and the 7th resistance R7, therefore from the viewpoint of power consumption, poorer than the 1st voltage comparison unit 42 of Fig. 5, but by making the resistance value of the 6th resistance R6 and the 7th resistance R7 fully high, the power consumption of the 1st voltage comparison unit 42a also can make it in fact close to zero.
In embodiments, describe and voltage comparator circuit 40 is used for detecting the situation whether providing the testing circuit of external voltage V2 (the bus voltage VBUS of USB), but the purposes of voltage comparator circuit 40 is not limited thereto, can utilize in the various uses comparing a voltage and threshold voltage value.
Based on embodiment, concrete statement is used to describe the present invention, but embodiment only represents principle of the present invention, application, in the scope not departing from the thought of the present invention specified in claim, the change of a lot of variation or configuration in embodiment, can be approved.
Claims (9)
1. a semiconductor device, is characterized in that, comprising:
The port of the communication interface of multiple different types of equipment can be connected;
Two signal line, connect and described equipment carries out between the communication terminal of the processor of data communication;
Connect detecting unit, monitor external voltage and generate external voltage detection signal;
Identifying unit, monitors the electric state of described signal wire, judges the equipment being connected to described port; And
Control module, controls described identifying unit based on described external voltage detection signal,
Described identifying unit comprises
At one article of described two signal line with provide the 1st resistance and the 1st high-end switch that are arranged in series between the line of assigned voltage;
The 2nd resistance be arranged in series between another article and detection node of described two signal line and the 1st low-end switch;
The 3rd resistance arranged between described detection node and ground connection; And
Comparer, exports the result obtained being compared by the voltage of the voltage of described detection node and described assigned voltage dividing potential drop,
Described identifying unit, during the described equipment of judgement, becomes effective by described 1st high-end switch and described 1st low-end switch conducting, then, described 1st high-end switch and described 1st low-end switch cut-off is become invalid.
2. semiconductor device as claimed in claim 1, is characterized in that,
Also comprise: two the 2nd switches, it is arranged on each path of described two signal line,
Described two the 2nd switches end during described identifying unit judges described equipment, then conducting.
3. semiconductor device as claimed in claim 1, is characterized in that,
If described in described connection detecting unit, external voltage exceedes the threshold value of regulation, then described control module, during regulation, by described 1st high-end switch and described 1st low-end switch conducting.
4. semiconductor device as claimed in claim 3, is characterized in that,
Also comprise: two the 2nd switches, it is arranged on each path of described two signal line,
If described 1st high-end switch and described 1st low-end switch are switched to cut-off from conducting by described control module, then thereafter by described two the 2nd switch conductions.
5. semiconductor device as claimed in claim 3, is characterized in that,
Described identifying unit also comprises: the 3rd switch, carries out conducting, cut-off controls to the supply of the power supply of described comparer, described 3rd switch and described 1st high-end switch and described 1st low-end switch synchronization action.
6. the semiconductor device as described in any one of claim 1 to 5, is characterized in that,
Described identifying unit also comprises: data holding unit, keeps the output signal of described comparer.
7. the semiconductor device as described in any one of claim 1 to 5, is characterized in that,
Described port is the terminal of the differential signal line connecting USB interface,
Described connection detecting unit monitors the electric state of the 2nd port be connected with the power lead of USB interface, by having determined whether to power via USB interface, thus determines whether to be connected to described equipment.
8. semiconductor device as claimed in claim 7, is characterized in that,
Described connection detecting unit comprises: voltage comparator circuit, the input voltage that its more described 2nd port applies and the threshold voltage of regulation,
This voltage comparator circuit comprises:
1st voltage comparison unit, compares described input voltage with the 1st threshold voltage of regulation, is created on described input voltage than the decision signal become valid during described 1st threshold voltage height; And
2nd voltage comparison unit, becomes effective when described decision signal become valid, and is compared with the 2nd threshold voltage of regulation by described input voltage.
9. an electronic device, is characterized in that, comprising:
Connect the port of the communication interface of any one of multiple different types of equipment;
The processor of data communication is carried out with described equipment; And
Semiconductor device described in any one of the claim 1 to 5 be connected with described port and described processor.
Applications Claiming Priority (6)
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| JP2009231006 | 2009-10-02 | ||
| JP2009231007 | 2009-10-02 | ||
| JP231006/09 | 2009-10-02 | ||
| JP231007/09 | 2009-10-02 | ||
| JP2010196402A JP5714274B2 (en) | 2009-10-02 | 2010-09-02 | Semiconductor devices and electronic devices using them |
| JP196402/10 | 2010-09-02 |
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| CN102035250A CN102035250A (en) | 2011-04-27 |
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| CN103219790B (en) * | 2012-01-20 | 2015-05-13 | 登丰微电子股份有限公司 | Double-power supply system and double-power controller |
| US8745301B2 (en) * | 2012-10-29 | 2014-06-03 | Qualcomm Incorporated | High voltage dedicated charging port |
| CN106291320B (en) * | 2016-08-04 | 2024-02-02 | 上海贝岭股份有限公司 | USB charging port control chip detection circuit |
| CN108039752B (en) * | 2017-12-19 | 2021-05-18 | 歌尔股份有限公司 | Charging box and power supply control method of charging box |
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| CN101025654A (en) * | 2006-02-24 | 2007-08-29 | 恩益禧电子股份有限公司 | Power supply selection/detection circuit |
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| JP2008059145A (en) * | 2006-08-30 | 2008-03-13 | Mitsumi Electric Co Ltd | Power supply device |
| US8362748B2 (en) * | 2007-09-12 | 2013-01-29 | Rohm Co., Ltd. | Voltage comparison circuit |
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| CN1246933A (en) * | 1997-12-11 | 2000-03-08 | 时至准钟表股份有限公司 | Electronic timepiece |
| CN1783574A (en) * | 2004-11-25 | 2006-06-07 | 恩益禧电子股份有限公司 | Data authentication circuit, battery pack and portable electronic device |
| CN101025654A (en) * | 2006-02-24 | 2007-08-29 | 恩益禧电子股份有限公司 | Power supply selection/detection circuit |
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