CN102004650A - Secondary loading method and system of digital signal processor version - Google Patents
Secondary loading method and system of digital signal processor version Download PDFInfo
- Publication number
- CN102004650A CN102004650A CN2009101619215A CN200910161921A CN102004650A CN 102004650 A CN102004650 A CN 102004650A CN 2009101619215 A CN2009101619215 A CN 2009101619215A CN 200910161921 A CN200910161921 A CN 200910161921A CN 102004650 A CN102004650 A CN 102004650A
- Authority
- CN
- China
- Prior art keywords
- dsp
- loaded
- external memory
- section
- chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Abstract
The invention provides a secondary loading method and system of a digital signal processor (DSP) version, which are applied to the circumstance of the DSP version, which requires that a DSP chip internal storage and a chip external storage are commonly stored. The method comprises the following steps of: analyzing the DSP version by a HOST, adding all codes and data which are required to be loaded to the DSP chip internal storage according to loading position information of codes and data in the DSP version, and then stopping loading and activating the DSP; after the DSP is activated, running the codes and the data loaded in the chip internal storage and initializing the DSP chip outer storage; and after the HOST acquires the successful initialization of the DSP chip external storage, adding all the codes and data which are required to be loaded to the DSP chip outer storage to the DSP chip external storage. With reasonable loading and running process, the successful downloading and running of the DSP version can be ensured.
Description
Technical field
The present invention relates to a kind of digital signal processor (Digital Signal Processing, abbreviation DSP) loading method of version, relate in particular to the plug-in random access memory of DSP (Random Access Memory, be called for short RAM), the DSP version is bigger, need be loaded into the situation of the outer RAM of ram in slice and sheet simultaneously.
Background technology
Digital signal processor (Digital Signal Processing is called for short DSP) has a wide range of applications in the communications field, such as the encoding and decoding speech aspect, can adopt dsp chip to realize various voice coding/decoding algorithmss.Fig. 1 has described a typical DSP and has used block diagram.In the drawings, main frame (HOST) links to each other with DSP by private bus, driving is used to realize the transmission of data, electrically programmable logical device (Electrically Programmable Logic Device is called for short EPLD) is used to realize address administration and logic control, random access memory (Random Access Memory in the sheet of dsp chip, be called for short RAM), be used for depositing and moving the DSP version of download, the external RAM of dsp chip uses as expansion in addition.If the DSP version is bigger, ram in slice is deposited inadequately and is moved, and just need use the outer RAM of sheet.Outside using sheet, behind the RAM, just involve following problem:
1, how the outer RAM of sheet detects;
2, how the DSP version is deposited respectively among the RAM outside the sheet in sheet;
3, if the DSP version is deposited in ram in slice and the outer RAM of sheet simultaneously, how about the download of DSP version and operational scheme are formulated so.
These all are present problem demanding prompt solutions.
Summary of the invention
The technical problem to be solved in the present invention is, a kind of secondary loading method and system of digital signal processor version are proposed, all to deposit and move the situation of DSP version at RAM outside DSP ram in slice and sheet,, guarantee that the DSP version is downloaded and the success of operation by rational download and operational scheme.
For solving the problems of the technologies described above, the present invention proposes the secondary loading method of a kind of digital signal processor (DSP) version, and being applied to the DSP version need comprise step by the sight of DSP on-chip memory and chip external memory common storage:
Main frame (HOST) is resolved the DSP version, and according to the loading position information of code and data in the DSP version, the code and the data that should be loaded in the DSP on-chip memory all are loaded in the DSP on-chip memory, stops then loading, and activates DSP;
DSP moves the code and the data that load in its on-chip memory after being activated, the DSP chip external memory is carried out initialization;
HOST is after knowing DSP chip external memory initialization success, and the code and the data that should be loaded in the DSP chip external memory all are loaded in the DSP chip external memory.
Further, said method also can have following characteristics:
DSP is to after the DSP chip external memory initialization success, operation suspension; And after knowing that the code that should be loaded in the DSP chip external memory and data all have been loaded into the DSP chip external memory, continue to start, operation downloads in the DSP sheet and code and data in the chip external memory.
Further, said method also can have following characteristics:
Code in this DSP version and data are divided into several sections, and each section has the relocatable address that this section of indication is loaded into the position in the DSP storer; Relocatable address in order to the section of the code of carrying initialization chip external memory and data points to the DSP on-chip memory;
HOST in should being loaded into the DSP on-chip memory code and data load in the DSP on-chip memory before, also obtain the relocatable address of each section in the DSP version, according to the relocatable address order from small to large of each section each section sorted;
Code and the data load to DSP on-chip memory in time of HOST in should being loaded into the DSP on-chip memory, be whether less than the start address of DSP chip external memory according to the relocatable address of the ranking results of section order being judged successively each section, if judged result is for being, think that then this section should be loaded in the DSP on-chip memory, load this section to the DSP on-chip memory according to the relocatable address of this section; Otherwise, think that this section should be loaded in the DSP chip external memory, stop to load, activate DSP.
Further, said method also can have following characteristics:
HOST in should being loaded into the DSP on-chip memory code and data load in the DSP on-chip memory before, and to the DSP version several the section sort before or afterwards, also obtain and judge each section the important place bit address and the section size information, if judge that the both is greater than 0, judge that then this section is effective loaded segment, otherwise judge that this section is invalid loaded segment, abandons invalid loaded segment.
Further, said method also can have following characteristics:
DSP is after carrying out the initialization success to the DSP chip external memory, also be provided with one and shake hands and be masked as the value of an expression DSP chip external memory initialization success, HOST is by judging that this value of shaking hands sign is that the value of an expression DSP chip external memory initialization success is known DSP chip external memory initialization success;
Code and the data of HOST in should being loaded into the DSP chip external memory all are loaded into after the DSP chip external memory, judge the value of this sign of shaking hands, if this value is the value of an expression DSP chip external memory initialization success, then this value of shaking hands sign is set to an expression DSP version and all downloads the value of finishing; DSP is by judging that this value of shaking hands sign is that the whole values of finishing of downloading of an expression DSP version know that the code and the data that should be loaded in the DSP chip external memory all have been loaded into the DSP chip external memory;
In the code and data of DSP in operation downloads to the DSP sheet and in the chip external memory, also this value of shaking hands sign is set to the value that an expression is moving newly downloaded DSP version.
For solving the problems of the technologies described above, the present invention also proposes the secondary loading system of a kind of digital signal processor (DSP) version, comprises DSP and main frame (HOST), and DSP comprises on-chip memory and chip external memory:
HOST, in order to the loading position information according to code and data in the DSP version, the code and the data that should be loaded in the DSP on-chip memory all are loaded in the DSP on-chip memory, stop then loading, and activate DSP; And after knowing DSP chip external memory initialization success, the code and the data that should be loaded in the DSP chip external memory all are loaded in the DSP chip external memory;
DSP in order to after being activated, moves the code and the data that load in its on-chip memory, and the DSP chip external memory is carried out initialization.
Further, said system also can have following characteristics:
DSP, in order to after the DSP chip external memory initialization success, operation suspension; And after knowing that the code that should be loaded in the DSP chip external memory and data all have been loaded into the DSP chip external memory, continue to start, operation downloads in the DSP sheet and code and data in the chip external memory.
Further, said system also can have following characteristics:
Code in this DSP version and data are divided into several sections, and each section has the relocatable address that this section of indication is loaded into the position in the DSP storer; Relocatable address in order to the section of the code of carrying initialization chip external memory and data points to the DSP on-chip memory;
HOST, code in should being loaded into the DSP on-chip memory and data load in the DSP on-chip memory before, also obtain the relocatable address of each section in the DSP version, according to the relocatable address order from small to large of each section each section sorted; And the code in should being loaded into the DSP on-chip memory and data load are in the DSP on-chip memory time, be whether less than the start address of DSP chip external memory according to the relocatable address of the ranking results of section order being judged successively each section, if judged result is for being, think that then this section should be loaded in the DSP on-chip memory, load this section to the DSP on-chip memory according to the relocatable address of this section; Otherwise, think that this section should be loaded in the DSP chip external memory, stop then loading, activate DSP.
Further, said system also can have following characteristics:
HOST, code in should being loaded into the DSP on-chip memory and data load in the DSP on-chip memory before, and to the DSP version several the section sort before or afterwards, also obtain and judge each section the important place bit address and the section size information, if judge that the both is greater than 0, judge that then this section is effective loaded segment, otherwise judge that this section is invalid loaded segment, abandons invalid loaded segment.
Further, said system also can have following characteristics:
DSP after the DSP chip external memory being carried out initialization success, also is provided with one and shakes hands and be masked as the value of an expression DSP chip external memory initialization success; Judging the value of this sign of shaking hands, is an expression DSP version when all downloading the value of finishing judging this value, and code and data that judgement should be loaded in the DSP chip external memory all have been loaded into the DSP chip external memory; And in the code and data in operation downloads to the DSP sheet and in the chip external memory, this value of shaking hands sign is set to the value that an expression is moving newly downloaded DSP version;
HOST judges the value that this is shaken hands and indicates after activating DSP, if this value is the value of an expression DSP chip external memory initialization success, then judge DSP chip external memory initialization success; Code in should being loaded into the DSP chip external memory and data all are loaded into after the DSP chip external memory, judge the value of this sign of shaking hands, if this value is the value of an expression DSP chip external memory initialization success, then this value of shaking hands sign is set to an expression DSP version and all downloads the value of finishing.
The secondary loading method and the system of a kind of digital signal processor version that the present invention proposes have following tangible advantage:
1, the DSP version of making rational planning for loads and operational scheme, flow process is easy to control, can effectively avoid occurring the program of DSP version in the DSP ram in slice and data do not finish that loading that loading just begins to carry out the program of DSP version among the outer RAM of sheet and data may cause can't the outer RAM of normal initialization sheet, cause loading the situation of failure then;
2, convenient and confirm the state of DSP in the version loading procedure exactly by the state of the sign of shaking hands;
3, remove the redundant information in the DSP version, can reduce DSP version taking to the FLASH resource.
Description of drawings
Fig. 1 is that a typical DSP uses block diagram;
Fig. 2 is an embodiment of the invention DSP version secondary loading method schematic flow sheet;
Fig. 3 is an application example DSP version secondary loading method schematic flow sheet of the present invention;
Fig. 4 is that embodiment of the invention DSP version secondary loads the state variation synoptic diagram of shaking hands.
Embodiment
Basic design of the present invention is, when the DSP version is made, which code and data should be loaded in the DSP ram in slice in the planning DSP version, which should be loaded among the outer RAM of DSP sheet, is planned in the DSP ram in slice in order to the code of RAM outside the initialization sheet and the loading position of data to the major general; HOST is when loading the DSP version to DSP, and the code and the data that should be loaded into earlier in the DSP ram in slice all are loaded in the DSP ram in slice, activate DSP then; DSP moves the code and the data that load in its ram in slice after being activated, outer RAM carries out initialization, operation suspension then to the DSP sheet; After the RAM initialization success, the code and the data that should be loaded among the outer RAM of DSP sheet all are loaded among the outer RAM of DSP sheet HOST outside knowing the DSP sheet; DSP the DSP version download fully finish after, continue operation again, so, whole DSP version secondary loads and finishes.
Describe embodiment of the present invention in detail below in conjunction with accompanying drawing.
With reference to figure 2, the figure shows the flow process that the present invention realizes that DSP version secondary loads, comprise the steps:
Step S201: make the DSP version, code in the DSP version and data are divided into several sections, each section has this section of indication and is loaded into the relocatable address of position among the DSP, and the order carrying is pointed to the DSP ram in slice in order to the important place bit address of the section of the code of the outer RAM of initialization sheet and data at least;
When making the DSP version, step S201 is by segmentation, and the loading position of planning code and data in the DSP version with the method that relocatable address indicates each section to be loaded into the position among the DSP, when considering dsp operation, required code or data may occur moving and be arranged in the outer RAM of sheet, and this part code or data as yet not loading can cause the problem of operation exception, should guarantee to be planned in the DSP ram in slice in order to the code of RAM outside the initialization sheet and the loading position of data to the major general.
So-called " in the sheet " and " sheet is outer " are distinguished according to the DSP address.
Can adopt the form of similar coff file to realize the making of DSP version in the embodiment of the invention, but the form to coff file is simplified, remove unnecessary field in the coff file form, the DSP version structure that the embodiment of the invention is produced can be, the header structure and several sections that comprise file, wherein, each section be the header structure and the segment body of the section of comprising again, comprise relocatable address in the header structure of section, the size of section etc., the code or the data that comprise the DSP version in the segment body, the header structure of file can comprise version information, load mode, total numbers of section etc., load mode comprise that secondary loads and once loads.If load mode does not then relate to the loading to the outer RAM of sheet for once loading, only the DSP version need be loaded in the ram in slice, move the DSP version that is loaded then and get final product; Load if load mode is a secondary, then carry out following steps of the process.
Step S202:HOST resolves the DSP version, according to the relocatable address order from small to large of each section that parses each section is sorted;
Because the DSP version of making among the step S201 can't guarantee that generally each section is sorted according to the relocatable address order from small to large of each section, promptly can't guarantee the section of carrying the code that should be loaded into DSP version in the DSP ram in slice and data is put together, and will with carry the code that should be loaded into DSP version among the outer RAM of DSP sheet and the section of data and put together, therefore execution in step S202 sorts, thereby guarantees that follow-up code in the DSP version and the data of loading at twice can carry out smoothly apace to DSP.
Step S203:HOST removes the redundant information in the DSP version, the effective loaded segment that obtains after handling is recombinated according to the clooating sequence to section among the step S202, thereby re-construct a minimized DSP version;
In the processing of removing redundant information, can from the header structure of each section, obtain the important place bit address of each section and the size information of section successively, if the both is greater than 0, represent that this section comprises code or the data of DSP, need download among the DSP, think effective loaded segment, otherwise represent the no code data of this section.
Whether the relocatable address of each section is less than the start address of the outer RAM of DSP sheet in the DSP version that step S204:HOST order re-constructs among the determining step S203 successively, if judged result is for being, think that then this section should be loaded in the DSP ram in slice, load this section, finish to the DSP ram in slice; Otherwise, think that this section should be loaded among the outer RAM of DSP sheet, enters step S205;
By judgement and the processing of step S204, the code and the data that should be loaded into the DSP version in the DSP ram in slice all are loaded in the DSP ram in slice, have realized the once loading of the embodiment of the invention;
Step S205:HOST stops to load the DSP version to DSP, initiates to interrupt to DSP, activates DSP;
Step S206:DSP is after being activated, setting is shaken hands and is masked as a state initial value, the code and the data of the DSP version that loads in the operation DSP ram in slice, outer RAM carries out initialization to the DSP sheet, after the initialization success, the shake hands value of sign of setting is the value of the outer RAM initialization success of an expression DSP sheet, and the DSP operation suspension enters waiting status then;
The value that adopts DSP that the sign of shaking hands is set in the embodiment of the invention is represented its state, HOST is known the DSP state according to the value of the sign of shaking hands, then carry out corresponding the processing, thereby realize shaking hands alternately of DSP and HOST, the reciprocal process of specifically shaking hands is as described in the following step;
Step S207:HOST continue to judge whether the value of the sign of shaking hands is the value of the outer RAM initialization success of an expression DSP sheet, if judged result for not, repeating step S207 then; If the judgment is Yes, then enter step S208;
Step S208:HOST order will not be loaded into each section of DSP successively as yet in the DSP version that re-construct among the step S203, i.e. carrying should be loaded into the code of the DSP version among the outer RAM of DSP sheet and each section of data, is loaded among the outer RAM of DSP sheet;
HOST can obtain in step S203 after effective loaded segment, write down total number of effective loaded segment, and loading the DSP version to the process of DSP, the hop count that record has loaded, judge whether to finish the loading of DSP version by hop count that has more loaded and the hop count that needs altogether to load, thereby finish to load flow process;
Till step S208, realized shaking hands for the first time between HOST and the DSP, the DSP version is divided into 2 parts successively is loaded into DSP ram in slice and the outer RAM of DSP sheet;
After the DSP version that step S209:HOST re-constructs all is loaded on DSP, judge whether the value of the sign of shaking hands is the value that the outer RAM initialization of expression DSP sheet is successfully finished in step S203, if, think that then DSP is in waiting status, enter step S210; If not, think that then DSP moves in advance, return error message, finish;
This value of shaking hands sign of step S210:HOST is set to an expression DSP version and all downloads the value of finishing;
Step S211:DSP continue to judge the value of the sign of shaking hands, and when judging that this value is that an expression DSP version is all downloaded the values of finishing, thinks then that the DSP version is all downloaded to finish, and enters step S212;
Step S212: download the DSP version that finishes among the operation DSP, the value of the sign of shaking hands simultaneously is set to the value that an expression is moving newly downloaded DSP version, finishes;
To step S212, the shake hands value of sign of DSP is set to an expression and is moving the value of newly downloaded DSP version, and DSP and HOST have finished second handshake, finish the secondary loading of DSP version.
DSP and HOST twice shaken hands reciprocal process just by to the setting of the value of the sign of shaking hands with judge and realize dexterously.
Come embodiment of the present invention is done detailed description below in conjunction with the present invention's one application example:
C6482DSP with Ti is an example, the plug-in DDR SDRAM of DSP.Be connected by HPI between HOST and the DSP, the LocalBus bus of HOST side is undertaken docking with the HPI interface of DSP after the logical conversion by EPLD, by the HPI mouth so that with the sheet of DSP in the outer internal memory of sheet carry out alternately.The ram in slice size 2M of C6482, start address is intermem_startaddr, the outer DDR SDRAM size of sheet 128M, start address is extrmem_startaddr.
It is grand to can be defined as follows the address in should be with example:
#define_intermem_startaddr 0x00800000/* internal RAM start address */
#define_extrmem_startaddr 0xe0000000/* external RAM start address */
#define_shakehand_flagaddr 0x00820204/* shake hands tag addresses */
At first, make the DSP version according to above-mentioned steps S202, concrete method for making can be planned and make as required, does not limit here, but should guarantee to be planned in the DSP ram in slice in order to the code of RAM outside the initialization sheet and the loading position of data to the major general.
Then referring to Fig. 3, this figure should comprise step with the secondary loading procedure of DSP version in the example to the DSP version made:
Step S301:HOST reads and checks that version number confirms the legitimacy of this DSP version from the header structure of DSP version file;
Total number of step S302:HOST section of reading from the header structure of DSP version file, if greater than 0, expression includes segment structure, enters step S303; Otherwise expression does not comprise segment structure, finishes;
Step S303:HOST is according to total number of the section that reads among the step S302, read the header structure of each section successively, check in the header structure of section and point to the pointer of reorientation inlet and the size of section, if the both is greater than 0, represent that this section comprises code or the data of DSP, this section is effective loaded segment, otherwise represents the no code data of this section, can directly carry out the header structure of next section and handle, the final effectively loaded segment that obtains all;
Step S304:HOST sorts to the effective loaded segment of judging among the step S303 according to the relocatable address order from small to large of each section;
Step S305:HOST is according to the data that the clooating sequence of section read successively this section size to each section from the document location of the pointed of sensing reorientation inlet, write in the resolution file, effectively load hop count and subtract 1, repeated execution of steps S305, till the code of all effective loaded segment and data are all write resolution file, finish;
Above-mentioned steps S301～step S305 is the resolving of HOST to the DSP version.
Step S306:HOST begins to load effective loaded segment in the DSP ram in slice, loading each section to the DSP ram in slice, according to the segment information after resolving, whether the relocatable address of judging this section is greater than extrmem_startaddr, if less than this value, illustrate that this section must be loaded in the DSP ram in slice, then continues to load; If the relocatable address that detects section to be loaded then enters step S307 more than or equal to extrmem_startaddr;
This step S306 has finished the code and the data that should be loaded into the DSP version in the DSP ram in slice and all has been loaded in the DSP ram in slice;
Step S307:HOST stops to load, and sends out interruption to DSP, activates DSP;
After step S308:DSP is activated, the state initial value is write at place, sign shakehand_flagaddr address to shaking hands, 0xFFFFFFFF for example, move the code and the data that load among the SAM in the DSP sheet then, outer DDR SDRAM carries out initialization to the DSP sheet, then DSP initialization sheet outside DDRSDRAM successfully after, the value that shakehand_flagaddr is set is the value of the outer RAM initialization success of an expression DSP sheet, 0x11111111 for example, the DSP operation suspension enters waiting status afterwards;
Step S309:HOST continues to detect the value of shaking hands and indicating, after the value that detects the sign of shaking hands is 0x11111111, continue the remaining effective loaded segment that is not loaded into DSP as yet, i.e. carrying should be loaded into the code of the DSP version among the outer DDR SDRAM of DSP sheet and effective loaded segment of data, all is loaded into successively among the outer DDR SDRAM of DSP sheet according to the ranking results order to section;
HOST can be when resolving the DSP version, note total number of the effective loaded segment that needs loading, loading the DSP version to the process of DSP, the hop count that record has loaded, judge whether to finish the loading of DSP version by hop count that has more loaded and the hop count that needs altogether to load, thereby finish to load flow process;
To this step S309, realized shaking hands for the first time between HOST and the DSP, the DSP version is divided into 2 parts successively is loaded into DSP ram in slice and the outer DDR SDRAM of DSP sheet;
Step S310:HOST all is being loaded on remaining DSP version outside the DSP sheet behind the DDRSDRAM, judge the value 0x11111111 whether in the shakehand_flagaddr address, if not, think that then the state of operation in advance appears in DSP, return error message, finish; If then it is set to an expression DSP version and all downloads the value of finishing, for example 0x22222222 immediately;
Step S311:DSP continues to judge the value of shaking hands and indicating, when judging that this value is 0x22222222, thinking then that the DSP version is all downloaded finishes, download the DSP version that finishes among the operation DSP, the value that indicates of shaking hands simultaneously is set to the value that an expression is moving newly downloaded DSP version, for example 0x3333333 finishes;
To step S311, the shake hands value of sign of DSP is set to an expression and is moving the value of newly downloaded DSP version, and DSP and HOST have finished second handshake, mean that also the secondary loading procedure successfully finishes.
The secondary of DSP and HOST is shaken hands reciprocal process just by to the setting of the value of the sign of shaking hands with judge and to realize dexterously, and referring to Fig. 4, this figure be that the reciprocal process of shaking hands of the secondary in the application example of the present invention is illustrated.
In order to realize flow process shown in Figure 2, the present invention also provides a kind of system, comprises DSP and main frame (HOST), and DSP comprises on-chip memory and chip external memory, wherein:
HOST, in order to the loading position information according to code and data in the DSP version, the code and the data that should be loaded in the DSP on-chip memory all are loaded in the DSP on-chip memory, stop then loading, and activate DSP; And after knowing DSP chip external memory initialization success, the code and the data that should be loaded in the DSP chip external memory all are loaded in the DSP chip external memory;
DSP in order to after being activated, moves the code and the data that load in its on-chip memory, and the DSP chip external memory is carried out initialization.
Further, DSP, in order to after the DSP chip external memory initialization success, operation suspension; And after knowing that the code that should be loaded in the DSP chip external memory and data all have been loaded into the DSP chip external memory, continue to start, operation downloads in the DSP sheet and code and data in the chip external memory.
Further, code in this DSP version and data are divided into several sections, and each section has the relocatable address that this section of indication is loaded into the position in the DSP storer; Relocatable address in order to the section of the code of carrying initialization chip external memory and data points to the DSP on-chip memory.HOST, code in should being loaded into the DSP on-chip memory and data load in the DSP on-chip memory before, also obtain the relocatable address of each section in the DSP version, according to the relocatable address order from small to large of each section each section sorted; And the code in should being loaded into the DSP on-chip memory and data load are in the DSP on-chip memory time, be whether less than the start address of DSP chip external memory according to the relocatable address of the ranking results of section order being judged successively each section, if judged result is for being, think that then this section should be loaded in the DSP on-chip memory, load this section to the DSP on-chip memory according to the relocatable address of this section; Otherwise, think that this section should be loaded in the DSP chip external memory, stop then loading, activate DSP.
Further, HOST in should being loaded into the DSP on-chip memory code and data load in the DSP on-chip memory before, and to the DSP version several the section sort before or afterwards, also obtain and judge each section the important place bit address and the section size information, if judge that the both is greater than 0, judge that then this section is effective loaded segment, otherwise judge that this section is invalid loaded segment, abandons invalid loaded segment.
Further, DSP also is provided with one and shakes hands and be masked as the value of an expression DSP chip external memory initialization success after the DSP chip external memory being carried out initialization success; Judging the value of this sign of shaking hands, is an expression DSP version when all downloading the value of finishing judging this value, and code and data that judgement should be loaded in the DSP chip external memory all have been loaded into the DSP chip external memory; And in the code and data in operation downloads to the DSP sheet and in the chip external memory, this value of shaking hands sign is set to the value that an expression is moving newly downloaded DSP version.HOST judges the value that this is shaken hands and indicates after activating DSP, if this value is the value of an expression DSP chip external memory initialization success, then judge DSP chip external memory initialization success; Code in should being loaded into the DSP chip external memory and data all are loaded into after the DSP chip external memory, judge the value of this sign of shaking hands, if this value is the value of an expression DSP chip external memory initialization success, then this value of shaking hands sign is set to an expression DSP version and all downloads the value of finishing.
The present invention also can have other various embodiments; under the situation that does not deviate from spirit of the present invention and essence thereof; those skilled in the art work as can make various corresponding changes and distortion according to the present invention, but these corresponding changes and distortion all should belong to the protection domain of the appended claim of the present invention.
Claims (10)
1. the secondary loading method of a digital signal processor (DSP) version, being applied to the DSP version need be is characterized in that by the sight of DSP on-chip memory and chip external memory common storage, comprises step:
Main frame (HOST) is resolved the DSP version, and according to the loading position information of code and data in the DSP version, the code and the data that should be loaded in the DSP on-chip memory all are loaded in the DSP on-chip memory, stops then loading, and activates DSP;
DSP moves the code and the data that load in its on-chip memory after being activated, the DSP chip external memory is carried out initialization;
HOST is after knowing DSP chip external memory initialization success, and the code and the data that should be loaded in the DSP chip external memory all are loaded in the DSP chip external memory.
2. the method for claim 1 is characterized in that:
DSP is to after the DSP chip external memory initialization success, operation suspension; And after knowing that the code that should be loaded in the DSP chip external memory and data all have been loaded into the DSP chip external memory, continue to start, operation downloads in the DSP sheet and code and data in the chip external memory.
3. method as claimed in claim 2 is characterized in that:
Code in this DSP version and data are divided into several sections, and each section has the relocatable address that this section of indication is loaded into the position in the DSP storer; Relocatable address in order to the section of the code of carrying initialization chip external memory and data points to the DSP on-chip memory;
HOST in should being loaded into the DSP on-chip memory code and data load in the DSP on-chip memory before, also obtain the relocatable address of each section in the DSP version, according to the relocatable address order from small to large of each section each section sorted;
Code and the data load to DSP on-chip memory in time of HOST in should being loaded into the DSP on-chip memory, be whether less than the start address of DSP chip external memory according to the relocatable address of the ranking results of section order being judged successively each section, if judged result is for being, think that then this section should be loaded in the DSP on-chip memory, load this section to the DSP on-chip memory according to the relocatable address of this section; Otherwise, think that this section should be loaded in the DSP chip external memory, stop to load, activate DSP.
4. method as claimed in claim 3 is characterized in that:
HOST in should being loaded into the DSP on-chip memory code and data load in the DSP on-chip memory before, and to the DSP version several the section sort before or afterwards, also obtain and judge each section the important place bit address and the section size information, if judge that the both is greater than 0, judge that then this section is effective loaded segment, otherwise judge that this section is invalid loaded segment, abandons invalid loaded segment.
5. as any one described method among the claim 2-4, it is characterized in that:
DSP is after carrying out the initialization success to the DSP chip external memory, also be provided with one and shake hands and be masked as the value of an expression DSP chip external memory initialization success, HOST is by judging that this value of shaking hands sign is that the value of an expression DSP chip external memory initialization success is known DSP chip external memory initialization success;
Code and the data of HOST in should being loaded into the DSP chip external memory all are loaded into after the DSP chip external memory, judge the value of this sign of shaking hands, if this value is the value of an expression DSP chip external memory initialization success, then this value of shaking hands sign is set to an expression DSP version and all downloads the value of finishing; DSP is by judging that this value of shaking hands sign is that the whole values of finishing of downloading of an expression DSP version know that the code and the data that should be loaded in the DSP chip external memory all have been loaded into the DSP chip external memory;
In the code and data of DSP in operation downloads to the DSP sheet and in the chip external memory, also this value of shaking hands sign is set to the value that an expression is moving newly downloaded DSP version.
6. the secondary loading system of a digital signal processor (DSP) version comprises DSP and main frame (HOST), and DSP comprises on-chip memory and chip external memory, it is characterized in that:
HOST, in order to the loading position information according to code and data in the DSP version, the code and the data that should be loaded in the DSP on-chip memory all are loaded in the DSP on-chip memory, stop then loading, and activate DSP; And after knowing DSP chip external memory initialization success, the code and the data that should be loaded in the DSP chip external memory all are loaded in the DSP chip external memory;
DSP in order to after being activated, moves the code and the data that load in its on-chip memory, and the DSP chip external memory is carried out initialization.
7. system as claimed in claim 6 is characterized in that:
DSP, in order to after the DSP chip external memory initialization success, operation suspension; And after knowing that the code that should be loaded in the DSP chip external memory and data all have been loaded into the DSP chip external memory, continue to start, operation downloads in the DSP sheet and code and data in the chip external memory.
8. system as claimed in claim 7 is characterized in that:
Code in this DSP version and data are divided into several sections, and each section has the relocatable address that this section of indication is loaded into the position in the DSP storer; Relocatable address in order to the section of the code of carrying initialization chip external memory and data points to the DSP on-chip memory;
HOST, code in should being loaded into the DSP on-chip memory and data load in the DSP on-chip memory before, also obtain the relocatable address of each section in the DSP version, according to the relocatable address order from small to large of each section each section sorted; And the code in should being loaded into the DSP on-chip memory and data load are in the DSP on-chip memory time, be whether less than the start address of DSP chip external memory according to the relocatable address of the ranking results of section order being judged successively each section, if judged result is for being, think that then this section should be loaded in the DSP on-chip memory, load this section to the DSP on-chip memory according to the relocatable address of this section; Otherwise, think that this section should be loaded in the DSP chip external memory, stop then loading, activate DSP.
9. system as claimed in claim 8 is characterized in that:
HOST, code in should being loaded into the DSP on-chip memory and data load in the DSP on-chip memory before, and to the DSP version several the section sort before or afterwards, also obtain and judge each section the important place bit address and the section size information, if judge that the both is greater than 0, judge that then this section is effective loaded segment, otherwise judge that this section is invalid loaded segment, abandons invalid loaded segment.
10. as any one described system among the claim 6-9, it is characterized in that:
DSP after the DSP chip external memory being carried out initialization success, also is provided with one and shakes hands and be masked as the value of an expression DSP chip external memory initialization success; Judging the value of this sign of shaking hands, is an expression DSP version when all downloading the value of finishing judging this value, and code and data that judgement should be loaded in the DSP chip external memory all have been loaded into the DSP chip external memory; And in the code and data in operation downloads to the DSP sheet and in the chip external memory, this value of shaking hands sign is set to the value that an expression is moving newly downloaded DSP version;
HOST judges the value that this is shaken hands and indicates after activating DSP, if this value is the value of an expression DSP chip external memory initialization success, then judge DSP chip external memory initialization success; Code in should being loaded into the DSP chip external memory and data all are loaded into after the DSP chip external memory, judge the value of this sign of shaking hands, if this value is the value of an expression DSP chip external memory initialization success, then this value of shaking hands sign is set to an expression DSP version and all downloads the value of finishing.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009101619215A CN102004650A (en) | 2009-09-01 | 2009-09-01 | Secondary loading method and system of digital signal processor version |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009101619215A CN102004650A (en) | 2009-09-01 | 2009-09-01 | Secondary loading method and system of digital signal processor version |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN102004650A true CN102004650A (en) | 2011-04-06 |
Family
ID=43812032
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2009101619215A Pending CN102004650A (en) | 2009-09-01 | 2009-09-01 | Secondary loading method and system of digital signal processor version |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN102004650A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103744698A (en) * | 2013-12-26 | 2014-04-23 | 北京星河亮点技术股份有限公司 | Method and system for DSP project efficient running |
| CN104281463A (en) * | 2013-07-12 | 2015-01-14 | 中国航天科工集团第三研究院第八三五八研究所 | Version-selectable DSP (Digital Signal Processor) program loading method |
| CN106201636A (en) * | 2016-08-11 | 2016-12-07 | 中国电子科技集团公司第二十九研究所 | A kind of DSP off-chip code dynamic loading method and device |
-
2009
- 2009-09-01 CN CN2009101619215A patent/CN102004650A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104281463A (en) * | 2013-07-12 | 2015-01-14 | 中国航天科工集团第三研究院第八三五八研究所 | Version-selectable DSP (Digital Signal Processor) program loading method |
| CN103744698A (en) * | 2013-12-26 | 2014-04-23 | 北京星河亮点技术股份有限公司 | Method and system for DSP project efficient running |
| CN106201636A (en) * | 2016-08-11 | 2016-12-07 | 中国电子科技集团公司第二十九研究所 | A kind of DSP off-chip code dynamic loading method and device |
| CN106201636B (en) * | 2016-08-11 | 2019-03-26 | 中国电子科技集团公司第二十九研究所 | A kind of outer code dynamic loading method of DSP piece and device |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN107077396B (en) | In-vehicle control device, program writing device, program generating device, and method | |
| EP3358465B1 (en) | In-vehicle control device, program update system, and program update software | |
| FI120220B (en) | Method and arrangement for processing transactions in a flash-type storage medium | |
| US10642602B2 (en) | NVM architecture with OTA support | |
| CN105335181A (en) | OTA upgrade realization method and terminal | |
| CN101510161A (en) | Bootstrap implementing method, apparatus and portable electronic apparatus | |
| CN107526540B (en) | Data storage device and data maintenance method thereof | |
| CN110109716B (en) | Method and device for ensuring stable loading of SSD firmware, computer equipment and storage medium | |
| US20160117116A1 (en) | Electronic device and a method for managing memory space thereof | |
| CN112445729B (en) | Operation address determination method, PCIe system, electronic device and storage medium | |
| JP2004118544A (en) | Memory system | |
| CN104866293A (en) | Method and device for extending Android application program function | |
| CN102004650A (en) | Secondary loading method and system of digital signal processor version | |
| CN106293849B (en) | application updating method and terminal | |
| CN111444030A (en) | Data storage device and method for preventing firmware from failing | |
| CN107357520B (en) | Finishing instruction processing method, memory control circuit unit and memory device thereof | |
| CN114730249A (en) | Reduction of page migration between different types of memory | |
| US7222258B2 (en) | Compressing a firmware image | |
| CN109739824B (en) | Log obtaining method and device | |
| EP1421478B1 (en) | Method and apparatus for linking converted applet files | |
| CN103810297B (en) | Writing method, reading method, writing device and reading device on basis of re-deleting technology | |
| US8010734B2 (en) | Method and system for reading instructions from NAND flash memory and writing them into SRAM for execution by a processing device | |
| CN104615387A (en) | Vehicle-mounted equipment based on XPE system and design method of vehicle-mounted equipment | |
| CN114297193A (en) | HASH-based data comparison method and device | |
| CN111857882A (en) | Extensible SSD (solid State disk) firmware loading method and device, computer equipment and storage medium |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| WD01 | Invention patent application deemed withdrawn after publication | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20110406 |