CN101989234B - Memory device and data management method thereof - Google Patents

Memory device and data management method thereof Download PDF

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CN101989234B
CN101989234B CN2009100559537A CN200910055953A CN101989234B CN 101989234 B CN101989234 B CN 101989234B CN 2009100559537 A CN2009100559537 A CN 2009100559537A CN 200910055953 A CN200910055953 A CN 200910055953A CN 101989234 B CN101989234 B CN 101989234B
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data
write
temporal data
storer
target memory
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CN101989234A (en
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郭武吉
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Huiguo (Shanghai) Software Technology Co Ltd
Silicon Motion Inc
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Huiguo (Shanghai) Software Technology Co Ltd
Silicon Motion Inc
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Abstract

The invention provides a data management method of a memory device. In one embodiment, the memory device comprises a plurality of memories for storing data, and each of the memories is respectively set as an alternative memory for another one of the memories. The method comprises the following steps: firstly, receiving write-in data and a write-in logical address from a host; then, converting the write-in logical address into a write-in physical address, and determining a target memory corresponding to the write-in physical address in the memories; subsequently, checking whether the target memory is in a busy state or not; and when the target memory is in the busy state, writing the write-in data in the temporary storage area of an alternative memory for the target memory.

Description

Memory storage and data managing method thereof
Technical field
The relevant storer of the present invention is particularly relevant for non-volatility memorizer (nonvolatile memory).
Background technology
Storer can be divided into volatile storage and non-volatility memorizer.Non-volatility memorizer also can keep wherein stored data under the situation of non-transformer supply, and volatile storage only just can keep wherein stored data under the situation that the power supply supply is arranged.Storer normally is installed in the memory storage, thinks the main frame storage data.For instance, a memory storage has a controller and one or more storer usually.The storer of memory storage is to supply storage data merely, and the controller of memory storage is to be data in the main frame access memory according to the instruction of main frame.
When the main frame desire write to memory storage with data, controller can write order and write the address data are write in the storer of memory storage according to what main frame sent.Under normal conditions, write order whenever main frame sends one, controller can be finished the action that data is write a storer in a fixed time period.Yet, in the part special circumstances, when main frame send one write order after, storer but can't be finished the write activity of data in the fixed time period.This moment, controller just needed to wait for a period of time if memory storage receives the order that writes that writes same storer from main frame once again, and device to be stored write activity last time is finished, and just new data can be write this storer again.Because controller can't cause the delay of the execution of subsequent access order between main frame and memory storage, and cause the decline of the usefulness of memory storage immediately with the new data write store.
Fig. 1 is the process flow diagram with the existing method 100 of writing data into memory.At first, the controller of memory storage writes logical address (step 102) from host receiving data and.Then, controller writes logical address with this and is converted to one and writes physical address, and determines this to write a target flash memory (step 104) of physical address correspondence.In data being write the writing before the physical address of target flash memory, controller must check whether the target flash memory is in busy condition (step 106).For instance, a logical address of main frame access can correspond to a female physical blocks and a fructification block of flash memory, and wherein the fructification block is in order to store the refresh page data of female physical blocks.When the group physical blocks has stored full data, if main frame more more new data write this logical address again, then the fructification block can't store more new data again.At this moment, flash memory must be integrated into single block with the refresh page data of fructification block and the former notebook data of female physical blocks, could carry out the write activity of new data again.These data integrative actions need expend the extra processing time of flash memory, so flash memory is to be in busy condition at this moment.
When the target flash memory is in busy condition (step 106), controller must be waited for a schedule time (step 108).After schedule time warp, controller examines whether the target flash memory is in busy condition (step 106) again.If the target flash memory still is in busy condition, then controller still must continue to wait for (step 108).If the target flash memory has not been in busy condition, then controller just can write physical address according to this these data are write this target flash memory (step 110).When the data write activity is finished, newly write order and newly write data (step 112) if main frame continues to send, then controller just can receive new data (step 110) from main frame once again, and continues writing of data.
Because when flash memory continues to be in busy condition (step 106), controller can't continue follow-up write activity, also can't receive from main frame and newly write data, and cause the delay of system.If the frequency that system delay takes place is too high, then can cause the decline of the usefulness of memory storage.Therefore, need a kind of data managing method of memory storage, with the delay of minimizing system, thus the usefulness of lifting memory storage.
Summary of the invention
In view of this, the object of the present invention is to provide a kind of data managing method of memory storage, to solve the problem that prior art exists.In an embodiment, this memory storage comprises a plurality of storeies for storage datas, and each these storer is set respectively as these storeies another alternative storer wherein.At first, write data and from main frame reception one and write logical address.Then, changing this, to write logical address be one to write physical address and determine this to write the target memory of physical address correspondence in these storeies.Then, check whether this target memory is in busy condition.When this target memory system is in busy condition, this is write data write the staging area that one of this target memory substitutes storer.
The present invention also provides a kind of memory storage.In an embodiment, this memory storage comprises a plurality of storeies and a controller.These storeies are for storage datas, and wherein each these storer has the alternative storer of a correspondence respectively, and these alternative storeies also be these storeies wherein one.This controller writes data and from main frame reception one and writes logical address, changing this, to write logical address be one to write physical address, in these storeies, determine this to write a target memory of physical address correspondence, check whether this target memory is in busy condition, and when this target memory be when being in busy condition, this is write data writes the staging area that one of this target memory substitutes storer.
For above and other objects of the present invention, feature and advantage can be become apparent, several preferred embodiments cited below particularly, and cooperate appended icon, be described in detail below:
Description of drawings
Fig. 1 is the process flow diagram with the existing method of writing data into memory;
Fig. 2 is the block diagram according to data storage system of the present invention;
Fig. 3 is according to the process flow diagram that data is write the method for flash memory devices of the present invention;
Fig. 4 is the synoptic diagram according to the embodiment of temporal data record sheet of the present invention;
Fig. 5 is the foundation process flow diagram of depositing to the method for target flash memory that temporal data is returned of the present invention.
Embodiment
Fig. 2 is the block diagram according to data storage system 200 of the present invention.Data storage system 200 comprises main frame 202 and flash memory devices 204.Flash memory devices is main frame 202 storage datas.In an embodiment, flash memory devices 204 comprises controller 210 and a plurality of flash memory 212,214,216,218.When main frame 202 sent the data access order to flash memory devices 204, controller 210 was main frame 202 access flash storeies 212,214,216,218 according to the data access order of main frame 202.For instance, when main frame 202 write order to flash memory devices 204 transmissions, controller 210 write flash memory 212,214,216,218 according to writing order with data.When main frame 202 sent reading order to flash memory devices 204, controller 210 read data according to reading order from flash memory 212,214,216,218, returns data again to main frame 202.
Controller 210 comprises a plurality of busy flags (busy flag) 232,234,236,238, these busy flags 232,234,236,238 indicate respectively flash memory 212,214,216,218 wherein one whether be in busy condition.Flash memory 212,214,216,218 has a staging area 222,224,226,228 respectively, and these staging areas 222,224,226,228 can store the data of at least one block.In addition, a plurality of flash memories 212,214,216,218 are respectively the alternative flash memory of other flash memory.In an embodiment, flash memory 212 is the alternative flash memory of flash memory 214, flash memory 214 is the alternative flash memory of flash memory 216, flash memory 216 is the alternative flash memory of flash memory 218, and flash memory 218 is the alternative flash memory of flash memory 212.Before controller 210 desires write to a flash memory with data, controller 210 can check the corresponding busy flag of flash memory earlier, to determine whether flash memory is in busy condition.When a flash memory was in busy condition, controller 210 can be gone into data rewriting to the staging area of this busy corresponding alternative flash memory of flash memory.So, controller just can reduce and continue the time that this busy flash memory of wait is wasted, thus the delay that the data of minimizing system write, to promote the usefulness of system.When treating that flash memory is non-and being in busy condition, controller 210 will be stored in and substitute the quickflashing note and dodge the temporal data of body and write to this flash memory, to finish complete write activity.
Fig. 3 is according to the process flow diagram that data is write the method 300 of flash memory devices 204 of the present invention.At first, controller 210 writes data and from main frame 202 receptions one and writes logical address (step 302).Then, controller 210 determines this to write the physical address that writes of logical address correspondence, and and then determines this to write the target flash memory (step 304) of physical address correspondence.Then, controller 210 and then check whether this target flash memory is in busy condition.In an embodiment, controller 210 checks the corresponding busy flag of this target flash memory, whether is in busy condition to determine the target flash memory.If the target flash memory is not to be in busy condition (step 306), then controller 210 writes physical address according to this and this is write data writes this target flash memory (step 314).Anti-, if target flash memory system is in busy condition (step 306), then controller 210 can't write this data immediately and write the target flash memory.In order to reduce the time that controller 210 waits for that target flash memory release busy is wasted, controller 210 at first determines this target flash memory corresponding one to substitute flash memory (step 307), and then will write the temporary address (step 308) that data write a staging area of this alternative flash memory.
Be temporarily stored in the staging area that substitutes flash memory though write data, controller 210 still need record the part important information of this temporal data of staging area, deposits this temporal data for return in the future.What therefore, controller 210 recorded in a temporal data record sheet of this alternative flash memory correspondence that this temporary address that writes data and this write data writes physical address (step 310).This temporal data record sheet is preserved the information of all temporal datas that the staging area of this alternative flash memory stores.In an embodiment, each flash memory 212,214,216,218 all has the temporal data record sheet of a correspondence, and these temporal data record sheets be stored in controller 210 in.Fig. 4 is the synoptic diagram according to the embodiment of temporal data record sheet of the present invention, wherein the staging area of this temporal data record sheet correspondence has stored N temporal data, and the temporary address of the temporal data of this temporal data record sheet record, writes physical address and size of data.Then, the temporal data stroke count that controller 210 will substitute the flash memory correspondence adds one (step 312), wherein the number of the stored temporal data in this temporal data stroke count staging area of recording this alternative flash memory.In an embodiment, each flash memory 212,214,216,218 all has the temporal data stroke count of a correspondence, and these temporal data stroke counts also be stored in controller 210 in.At last, newly write order and newly write data (step 316) if main frame 202 continues to send, then controller 202 continuation receive and newly write data (step 302), newly to write the write activity of data.
For instance, suppose that the target flash memory that main frame 202 desires write data is flash memory 216, and controller 210 checks that busy flag 236 back discovery flash memories 216 are in the busy condition.Because flash memory 216 is just busy and can't accept writing of new data, so controller 210 is gone into data rewriting to the staging area 224 of the alternative storer 214 of flash memory 216 correspondences.Then, the information of controller 210 this temporal data of record in substituting storer 214 corresponding temporal data record sheets, and will substitute storer 214 corresponding temporal datas and add one than number, to finish the temporary action of data.Because data are temporary in the alternative storer 214 that is not in busy condition, controller 210 can continue to be received newly to write data and carry out by main frame 202 newly to write order, and can not cause the delay of system as waiting for flash memory 216 release busies in the existing method.Therefore, the efficient of data storage system 200 can significantly promote.
After the busy condition of target flash memory was removed, controller 210 must take out previous temporal data in the staging area that substitutes flash memory, be stored to the target flash memory then, to finish complete write activity.Fig. 5 is the foundation process flow diagram of depositing to the method 500 of target flash memory that temporal data is returned of the present invention.At first, controller 210 checks that one substitutes a temporal data stroke count (step 502) of flash memory correspondence.If this temporal data stroke count equals zero (step 504), expression should substitute flash memory and not store any temporal data, so the controller 210 temporal data stroke count (step 502) that continues to choose other alternative flash memory (step 506) and check other alternative flash memory correspondence.If this temporal data stroke count is greater than zero (step 504), expression should substitute flash memory and store temporal data and wait back to deposit.Therefore, controller 210 checks the busy flag of a target flash memory of this alternative flash memory correspondence, whether still is in busy condition (step 508) to determine this target flash memory.Certainly, if this target flash memory still is in busy condition, then the alternative stored temporal data of flash memory still can't return and deposit.If busy flag indicates this target flash memory release busy (step 508), then controller 210 can carry out returning of temporal data and deposits action.
At first, controller 210 writes physical address (step 510) from the temporary address and that the temporal data record sheet corresponding to this alternative flash memory reads a temporal data.Then, controller 210 is according to reading this temporal data (step 512) from the staging area that should substitute flash memory in temporary address.After treating that temporal data is read out, then write physical address according to this writes target flash memory (step 514) with this temporal data to controller 210.Correct the returning of temporal data this moment deposited to the target flash memory, and the information about this temporal data is out of use in the temporal data table, so controller 210 is then deleted the record (step 516) of this temporal data from the temporal data record sheet that substitutes the flash memory correspondence.At last, controller 210 will substitute the corresponding temporal data stroke count of flash memory again and subtract one (step 518).This moment, the returning and to deposit action and finish of this temporal data still may have many other temporal datas to wait back to deposit but substitute flash memory.Therefore, whether controller 210 continues the temporal data stroke count of test replacement flash memories still greater than zero, if the temporal data stroke count still greater than zero the time then controller 210 continue back to deposit other temporal data to the target flash memory.
For instance, if the temporal data record sheet that controller 210 is found to substitute flash memory 214 greater than zero, controller 210 busy flag 236 of the target flash memory 216 of test replacement flash memory 214 correspondences at first then.If busy flag 236 display-object flash memories 216 are not to be in busy condition, then controller 210 just can read the information of temporal data from the temporal data record sheet that substitutes flash memory 214 correspondences, reads this temporal data according to this information by alternative flash memory 214 again and it is stored in the target flash memory 216.Therefore, controller can be under the idle situation or treats that the command execution of 204 of main frame 202 and flash memory devices comes to an end in system 200, and that carries out temporal data again time deposits action, with the usefulness of Hoisting System.
Though the present invention discloses as above with preferred embodiment; yet it is not in order to limit the present invention; anyly be familiar with this operator; without departing from the spirit and scope of the present invention; when can making all changes that is equal to or replacement, so protection scope of the present invention is when looking accompanying being as the criterion that the application's claim defines.

Claims (14)

1. the data managing method of a memory storage, wherein this memory storage comprises a plurality of storeies for storage datas, and each these storer is set respectively as these storeies another alternative storer wherein, and this method comprises the following steps:
Write data and from main frame reception one and write logical address;
Changing this, to write logical address be one to write physical address and determine this to write the target memory of physical address correspondence in these storeies;
Check whether this target memory is in busy condition;
When this target memory system is in busy condition, this is write data writes the staging area that one of this target memory substitutes storer, in a temporal data record sheet of this alternative storer correspondence record this write a temporary address that data are stored in this staging area and this writes physical address; And a temporal data stroke count that will substitute the storer correspondence adds one;
When this target memory is not when being in busy condition, read this temporary address with this writes physical address from this temporal data record sheet corresponding to this alternative storer, according to should temporary address reading a temporal data from this staging area that should alternative storer; And write physical address according to this this temporal data is write this target memory.
2. the data managing method of memory storage according to claim 1 is characterized in that, this method also comprises:
When this target memory is not when being in busy condition, writes physical address according to this and this is write data write this target memory.
3. the data managing method of memory storage according to claim 1, it is characterized in that, these storeies have corresponding a plurality of busy flags respectively in a controller, comprise a busy flag that checks this target memory correspondence and whether this target memory is in the inspection step of busy condition.
4. the data managing method of memory storage according to claim 1 is characterized in that, this temporal data record sheet also records the size of data that this writes data.
5. the data managing method of memory storage according to claim 1 is characterized in that, this method also comprises the following steps:
After this temporal data was written into this target memory, this temporal data record sheet was deleted the record of this temporal data certainly; And
This temporal data stroke count of this alternative storer correspondence is subtracted one.
6. the data managing method of memory storage according to claim 1 is characterized in that, this method also comprises:
In check this target memory whether be not be in busy condition before, check earlier whether this temporal data stroke count of this alternative storer correspondence is zero;
Non-vanishing and this target memory is not when being in busy condition when this temporal data stroke count, just reads this temporary address and this writes physical address from this temporal data record sheet corresponding to this alternative storer.
7. the data managing method of memory storage according to claim 1 is characterized in that, this method also comprises:
In a controller, store the corresponding a plurality of temporal data record sheets of these storeies, to record these storeies information of the stored temporal data of storer as an alternative; And
These storeies of record number of the stored temporal data of storer as an alternative in this controller.
8. memory storage comprises:
A plurality of storeies, for storage data, wherein each these storer has the alternative storer of a correspondence respectively, and these alternative storeies also be these storeies one of them; And
One controller, write data and from main frame reception one and write logical address, changing this, to write logical address be one to write physical address, in these storeies, determine this to write a target memory of physical address correspondence, check whether this target memory is in busy condition, wherein, when this target memory system is in busy condition, this is write data write the staging area that one of this target memory substitutes storer, this controller records this and writes that data are stored in a temporary address of this staging area and this writes physical address in a temporal data record sheet of this alternative storer correspondence, and a temporal data stroke count that will substitute the storer correspondence adds one; When checking that this target memory is not when being in busy condition, this controller is from reading this temporary address corresponding to this temporal data record sheet of this alternative storer and this writes physical address, according to should reading a temporal data from this staging area that should substitute storer in temporary address, and write physical address according to this this temporal data is write this target memory.
9. memory storage according to claim 8 is characterized in that, when this target memory is not when being in busy condition, this controller writes physical address according to this and this is write data writes this target memory.
10. memory storage according to claim 8, it is characterized in that, this controller has a plurality of busy flags that correspond to these storeies respectively, and this controller checks a busy flag of this target memory correspondence, whether is in busy condition to determine this target memory.
11. memory storage according to claim 8 is characterized in that, this temporal data record sheet also records the size of data that this writes data.
12. memory storage according to claim 8, it is characterized in that, after this temporal data was written into this target memory, this controller was deleted the record of this temporal data from this temporal data record sheet, and this temporal data stroke count that will substitute the storer correspondence subtracts one.
13. memory storage according to claim 8, it is characterized in that, in check this target memory whether be not be in busy condition before, this controller checks earlier whether this temporal data stroke count of this alternative storer correspondence is zero, non-vanishing and this target memory is not when being in busy condition when this temporal data stroke count, and this controller just reads this temporary address and this writes physical address from this temporal data record sheet corresponding to this alternative storer.
14. memory storage according to claim 8, it is characterized in that, this controller stores the corresponding a plurality of temporal data record sheets of these storeies with the information of the stored temporal data in the staging area of recording these storeies, and records these storeies number of the stored temporal data of storer as an alternative.
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CN1947100A (en) * 2004-04-20 2007-04-11 松下电器产业株式会社 Nonvolatile memory system, nonvolatile memory device, memory controller, access device, and method for controlling nonvolatile memory device

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1947100A (en) * 2004-04-20 2007-04-11 松下电器产业株式会社 Nonvolatile memory system, nonvolatile memory device, memory controller, access device, and method for controlling nonvolatile memory device

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