CN101945072A - Estimation method for sampling clock frequency deviation in multiplexing system - Google Patents
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Abstract
The invention relates to a calculation method for sampling clock frequency deviation in a multiplexing system. The method comprises the following steps of: carrying out the FFT (Fast Fourier Transform) on second synchronous signals SYNC2 of synchronous signals in a current time slot and the next time slot to a frequency domain by a receiver to obtain a frequency domain synchronous signal sequence; then, respectively carrying out the IFFT (Inverse Fast Fourier Transform) on the frequency domain synchronous signal sequence to a time domain after removing the modulation information, solving a module value of the time domain sequence and carrying out relative calculation on the module value by the receiver; and finally, solving a normalized sampling clock frequency deviation value. Compared with the prior art, the invention has the advantages of accurately estimating the sampling clock frequency deviation under a rapid fading channel with greater Doppler frequency shift and overcoming the influence of great rapid change of the rapid fading channel, has favorable performance, and is suitable for a high-speed mobile rapid fading channel environment existing in a CMMB (China Mobile Multimedia Broadcasting) system.
Description
Technical field the present invention relates to multiplex communication system, particularly relates to image delivering system wherein, relates in particular to the evaluation method of sample clock frequency deviation in the orthogenic frequency-division multiplexing system.
In background technology prior art orthogonal frequency division modulated OFDM (the Orthogonal Frequency Division Multiplexing) communication system, because transmitting terminal and receiving terminal use clock separately, can there be deviation in the two ends clock inevitably, causes sampling clock deviation and carrier frequency frequency difference between transmission terminal number-Mo conversion D/A and the receiving terminal analog-to-digital conversion A/D.Sampling clock deviation comprises two parts: sample-timing error and sampling frequency offset.In fact sample-timing error can regard symbol synchronization error as, though it has influenced the phase place of received signal, and can be controlled by channel guess value; Sampling frequency offset makes on the one hand and receives data generation phase deviation, has also destroyed the orthogonality between subcarrier on the other hand, makes a big impact to being correctly decoded, and this requires sampling frequency deviation made estimates accurately and correct.The channel circumstance of China Mobile multimedia broadcasting CMMB (China Mobile Multimedia Broadcasting) system is abominable, and supports high-speed mobile, and the sample clock frequency deviation of described communication system is estimated to have higher requirement.
Inclined to one side ζ represented when sample clock frequency deviation generally used normalization,
T and T ' are respectively the sampling clock cycle of transmitting terminal and receiving terminal.Carrier frequency offset generally uses normalization frequency deviation Δ f to represent.
Consider to use the ofdm system of N point quick Fourier inverse transformation IFFT, each OFDM symbol is by N sub-carriers alpha
L, kConstitute, wherein l represents OFDM symbol number, and k represents the subcarrier number in the middle of the symbol.The significant character time is T
u, T=T
u/ N, time domain guard length is T
g, T
s=T
u+ T
g, N
s=N+N
gIf sign synchronization is accurate, the ISI (Intersymbol Interference) that promptly crosstalks between nonexistent code after deriving can be through the signal after the receiving terminal fast Fourier transform FFT:
φ wherein
I, k=(1+ ζ) (Δ fT
u+ i)-k; φ
k=φ
K, k≈ Δ fT
u+ k ζ.
Z in the following formula
L, kRepresent k subcarrier on l OFDM symbol of receiving terminal, second is crosstalk ICI (Interchannel Interference) of subcarrier, when tracking phase carrier wave frequency deviation and sampling clock deviation are smaller, influence very for a short time, it can be included into the 3rd noise section and be write as
n
Ω;l,k。Si in the formula (π φ
k) approach 1 at tracking phase and write as attenuation alpha (φ
k).Then following formula can be write as:
The visible samples frequency deviation of clock has caused the crosstalk interference of ICI of the decay of the rotation that receives sub-carrier phase and range value and subcarrier, and the phase place rotation is with subcarrier number k relevant, along with the increase of l sharply increases.If untimely correction will cause the increase of the error rate short time, will make that receiving terminal can't demodulation after long-time.
In present most ofdm system, the estimating sampling clock frequency departure is usually by calculating the pilot tone autocorrelation value of adjacent two frequency-domain OFDM symbols, and finds the solution and obtain the sample clock frequency deviation value, this method that the patent of mentioning later also is to use.The method realizes simple, when the two adjacent OFDM symbol changes when little, can estimate the sample clock frequency deviation value accurately.
Being described in detail as follows of this algorithm:
L OFDM and l+d the OFDM symbol of receiver after with FFT carries out conjugate multiplication and gets and (suppose the channel quasistatic, H
kChange little):
The phase bit position of considering following formula has:
Observe top relational expression as can be seen, A
D, kPhase place be the linear function of subcarrier number k, its slope is relevant with ζ, its intercept on phase shaft is relevant with Δ f.
With k is transverse axis, A
D, kBe the longitudinal axis phase curve that draws, there are relation of plane down in its intercept intercept and frequency deviation Δ f:
A
D, kPhase curve slope slope and ζ exist below relation:
According to top expression formula, as long as obtained A
D, kThe intercept of phase curve and slope just can be obtained the sample clock frequency deviation value of system.
Up to now also not with the comparatively approaching implementation of the present patent application, Chinese patent application 01143900.9 below the most ofdm system sample clock frequency deviation of prior art is estimated all to adopt, name is called " orthogonal frequency division multiplex receiving system of active estimating symbol timing displacement and method thereof " disclosed technology, use the autocorrelative method of pilot tone, this patent No. is 01143900.9, and this method comprises the following steps: to extract the scattered pilots that is inserted at interval with rule sampling in the code element from received ofdm signal; The scattered pilots of current extraction and known scattered pilots model are multiplied each other, to obtain the plural number of current scattered pilots; With the plural number of current scattered pilots and the complex multiplication of previous scattered pilots, and during predetermined code-element period, the complex multiplication that adds up respectively result's real part and imaginary part; Estimate phase place with employing real part accumulated value and imaginary part accumulated value, and estimate to be used to control the timing slip of fast Fourier transform starting point and sampled clock signal.
Because the operational environment of CMMB system comprises that Doppler frequency shift reaches the fast fading channel of 300Hz, under this channel condition, become too fast reason during owing to channel, bigger variation has taken place in the channel frequency response value of adjacent two frequency-domain OFDM symbols, this variation makes traditional sampling frequency deviation of clock algorithm for estimating produce maximum error, because channel is no longer set up in the quasi-static hypothesis of former and later two OFDM symbols, the H of former and later two symbols on same subcarrier
kNo longer equal.And when Doppler frequency shift reaches 300HZ, an OFDM symbol inside, variation has also taken place in channel, and this can cause the bigger subcarrier ICI that crosstalks, also can seriously influence traditional sample clock frequency deviation algorithm for estimating, provide the simulation result of these two kinds of influences below.
It is under the dynamic multi-path TU-6 channel condition of 300Hz that Fig. 2 has provided at Doppler frequency shift, the channel frequency response figure in the moment in the middle of adjacent two frequency-domain OFDM symbols.This figure has illustrated that very big variation has taken place former and later two OFDM symbol of next-door neighbour.
Fig. 3 has provided under this channel condition, and the transmitting terminal subcarrier was sent out complete at 1 o'clock, through behind the channel, at the subcarrier that receiving terminal causes crosstalk (ICI).
Fig. 4 be normalized, sample clock frequency deviation be 100ppm, when Doppler frequency shift is 30Hz, the A that makes according to traditional algorithm
D, kPhase curve, can also find out the slope of straight line this moment
Fig. 5 be normalized, sample clock frequency deviation be 100ppm, when Doppler frequency shift is 300Hz, the A that makes according to traditional algorithm
D, kPhase curve can't have been told the slope of straight line this moment.
The computational methods of prior art sample clock frequency deviation have the following disadvantages: be difficult to accurate calculating sampling frequency deviation of clock under the fast fading channel bigger as Doppler frequency shift.
The summary of the invention the technical problem to be solved in the present invention is to avoid above-mentioned the deficiencies in the prior art part and the evaluation method that proposes sample clock frequency deviation in a kind of multiplex system, be used to calculate the sample clock frequency deviation under the bigger fast fading channel of Doppler frequency shift, comprise step:
Receiver in A, the communication system carries out FFT with second OFDM symbol of current time slots synchronizing signal and transforms to frequency domain, and obtaining length is the frequency domain synchronous signal sequence of N, and order is carried out next step B then;
Receiver removes the modulation intelligence in the frequency domain synchronous signal sequence that obtains in the steps A in B, the communication system, adjusts the order remove resultant sequence behind the modulation intelligence then, and zero padding is to the 2N point, and IFFT transforms to time domain then, and time domain sequences is asked the mould value, obtains | x
1(n) |;
Receiver in C, the communication system is handled according to the description among steps A and the step B the synchronizing signal of next time slot, obtains | x
2(n) |;
D, described receiver are right | x
1(n) | and | x
2(n) | the related operation that is shifted obtains
F, try to achieve normalized sample clock frequency deviation value
Wherein slot_len is the length of a time slot.
Among steps A and the C, during second synchronizing signal SYNC2 of receiver intercepting current time slots, the leading CP_len of window point during intercepting.
X among the step B
1(n) computational methods comprise the FFT/IFFT method, subcarrier order method of adjustment and zero padding method.
Ask mould to ask the method for correlation more earlier when using the displacement related operation among the step D.
Ask the method for sample clock frequency deviation value in the step F by the sampling instant deviate.
Among the step B, adopt following method when receiver removes modulation intelligence in the frequency domain synchronous signal sequence in the system: with the frequency domain synchronous signal sequence divided by the sequence of synchronic PN sequence after modulation.
Described system comprises the multiplex system that uses the OFDM modulation.
Described system is the image delivering system that is used for CMMB.
Described CMMB system comprises that Doppler frequency shift reaches the fast fading channel of 300Hz.
Compare with prior art, the beneficial effect of technical solution of the present invention is:
1, sample clock frequency deviation algorithm for estimating of the present invention can be under the bigger fast fading channel of Doppler frequency shift accurate calculating sampling frequency deviation of clock, this algorithm has overcome fast fading channel and has changed too fast influence, have good performance, adapt to the fast fading channel environment that there is high-speed mobile in the CMMB system;
2, the algorithm that proposes of this patent adopts the relevant method of time domain to try to achieve the sampling instant deviation, and the method is not subjected to the influence of channel Doppler frequency shift substantially, can reach operate as normal in the time varying channel more than 10% of subcarrier spacing in how general frequency displacement;
3, the method that proposes of this patent is because the relevant method of sampling time domain displacement, and estimated accuracy is subjected to The noise less, can be under the very low situation of signal to noise ratio operate as normal.
Description of drawings Fig. 1 is the computational methods theory diagram of sample clock frequency deviation in the communication system of the present invention;
Fig. 2 is under the fast fading channel channel condition, the channel frequency response figure in the moment in the middle of adjacent two frequency-domain OFDM symbols;
Fig. 3 disturbs the ICI diagram between the OFDM subcarrier that causes under the fast fading channel condition.
Fig. 4 is that normalized sample clock frequency deviation is 100ppm, when Doppler frequency shift is 30Hz, according to the A of traditional algorithm calculating
D, kPhase curve figure;
Fig. 5 is that normalized sample clock frequency deviation is 100ppm, when Doppler frequency shift is 300Hz, according to the A of traditional algorithm calculating
D, kPhase curve figure;
Fig. 6 is the frame structure schematic diagram in the CMMB standard;
Fig. 7 is the structural representation of beacon in the frame structure in the CMMB standard;
Fig. 8 synchronizing symbol sub-carrier structure schematic diagram
Synchronizing symbol sub-carrier structure schematic diagram after Fig. 9 adjustment order and the zero padding.
Embodiment is described in further detail below in conjunction with the preferred embodiment shown in each accompanying drawing.
The computational methods of sample clock frequency deviation in a kind of communication system of the present invention are used to calculate the sample clock frequency deviation under the bigger fast fading channel of Doppler frequency shift, as shown in Figure 1, comprise step:
Receiver in A, the communication system carries out FFT with second OFDM symbol of current time slots synchronizing signal and transforms to frequency domain, and obtaining length is the frequency domain synchronous signal sequence of N, and order is carried out next step B then;
Receiver removes the modulation intelligence in the frequency domain synchronous signal sequence that obtains in the steps A in B, the communication system, adjusts the order remove resultant sequence behind the modulation intelligence then, and zero padding is to the 2N point, and IFFT transforms to time domain then, and time domain sequences is asked the mould value, obtains | x
1(n) |;
Receiver in C, the communication system is handled according to the description among steps A and the step B the synchronizing signal of next time slot, obtains | x
2(n) |;
D, described receiver are right | x
1(n) | and | x
2(n) | the related operation that is shifted obtains
F, try to achieve normalized sample clock frequency deviation value
Wherein slot_len is the length of a time slot.
Among steps A and the C, during second synchronizing signal SYNC2 of receiver intercepting current time slots, the leading CP-len of window point during intercepting.
X among the step B
1(n) computational methods comprise the FFT/IFFT method, subcarrier order method of adjustment and zero padding method.
Ask mould to ask the method for correlation more earlier when using the displacement related operation among the step D.
Ask the method for sample clock frequency deviation value in the step F by the sampling instant deviate.
Among the step B, adopt following method when receiver removes modulation intelligence in the frequency domain synchronous signal sequence in the communication system: with the frequency domain synchronous signal sequence divided by the sequence of pseudorandom noise PN (Pseudorandom Noise) sequence after modulation synchronously.
Described system comprises the multiplex system that uses the OFDM modulation.
Described system is the image delivering system that is used for CMMB.
Described CMMB system comprises that Doppler frequency shift reaches the fast fading channel of 300Hz.
The CMMB standard code in the broadcasting service frequency range, the frame structure of mobile multimedia broadcast system transmission signals, chnnel coding and modulation system.
According to standard, the frame structure of CMMB as shown in Figure 6, as can see from Figure 6, a superframe of CMMB system is made up of 40 time slots, the duration is 1s, each time slot is made up of a beacon and 53 OFDM symbols.
Fig. 7 is the beacon infrastructure schematic diagram, as shown in Figure 7, each beacon comprises a sender unit identification TxID and two identical synchronizing signals, this synchronizing signal is obtained by the PN sequence variation, the sub-carrier number of each synchronizing signal is 512 under the 2MHz pattern, and the sub-carrier number of each synchronizing signal is 2048 under the 8M pattern.
The CMMB standard comprises 2M and two kinds of bandwidth mode of operations of 8M, and parameter value is different under these two kinds of patterns.
As shown in Figure 8, under 2M bandwidth mode of operation, get:
N=512,left=157,right=355,CP_len=64,Slot_len=62500;
Under 8M bandwidth mode of operation, get:
N=2048,left=768,right=1280,CP_len=256,Slot_len=250000;
Wherein:
N is meant counting of OFDM symbol in the synchronizing signal;
Left is meant the left margin of effective subcarrier among Fig. 8;
Right is meant the right margin of effective subcarrier among Fig. 8;
CP_len is meant the circulating prefix-length of first OFDM symbol in the synchronizing signal, i.e. leading the counting of window during second synchronizing signal SYNC2 of communication system receiver intercepting current time slots;
Slot_len is meant that the symbol of each time slot counts, just the length of a time slot.
As shown in Figure 1, the flow process of sample clock frequency deviation estimation scheme is as follows:
A, at first receiver is to second OFDM symbol receiving terminal intercepting SYNC2 synchronization character of the synchronizing signal of time slot i, the leading CP_len of window point during intercepting is (because SYNC1 is identical with SYNC2, do like this and be equivalent to add Cyclic Prefix in the SYNC2 time domain, can avoid ISI, also can make the influence that the sampled point deviation of fixed time only can be brought phase place on the subcarrier, and can not cause the change of range value), then, the N point data of intercepting is carried out the FFT operation, obtain subcarrier in frequency domain data 1, length is N;
B, receiver remove the modulation intelligence of the subcarrier in frequency domain data 1 that obtain in the step 1, promptly obtain subcarrier data 2 divided by known PN sequence information, the structure of this subcarrier data 2 such as Fig. 8 with the subcarrier data 1 that obtains; As shown in Figure 8, mid portion is frequency domain protection interval, and the both sides part is effective subcarrier 1 and effective subcarrier 2; in order to remove DC component; 0 work song carrier wave also is 0, removes the frequency domain protection at interval, and adjusting subcarrier data 2 orders and zero padding, to obtain subcarrier data 3 behind the 2N point be X
i(k), (i=1,2), as shown in Figure 9, the zero work song carrier value among Fig. 9 is averaged by N-1 work song carrier wave among Fig. 9 and 1 work song carrier wave and is tried to achieve; X to obtaining afterwards
i(k) carry out the IFFT conversion and obtain time domain sequences x
1(n), to x
1(n) delivery obtains | x
1(n) |.
C, receiver carry out identical processing according to step 1 with the description in the step 2 to the synchronizing signal of time slot i+1, obtain | x
2(n) |;
D, as shown in Figure 1, receiver is right | x
1(n) | and | x
2(n) | the related operation that is shifted obtains
The sampling instant deviate that time slot post-sampling frequency deviation of clock causes;
F, use l
1-l
2(multiply by 2 reason here is because in order to increase the sample clock frequency deviation estimated resolution, to X to get normalized sample clock frequency deviation divided by the length Slot_len*2 of a time slot
i(k) carried out zero padding, mended the 2N point, be equivalent to reduce one times time-domain sampling interval from the N point), thus normalized sample clock frequency deviation value tried to achieve
Above-mentioned is preferred implementation procedure of the present invention, and common variation and replacement that those skilled in the art carries out on basis of the present invention are included within protection scope of the present invention.
Claims (9)
1. the evaluation method of sample clock frequency deviation in the multiplex system is used to estimate the sample clock frequency deviation under the bigger fast fading channel of Doppler frequency shift, comprises step:
Second synchronizing signal SYNC2 of the receiver intercepting current time slots in A, the system carries out FFT and transforms to frequency domain, and obtaining length is the frequency domain synchronous signal sequence of N, and order is carried out next step B then;
Receiver removes the modulation intelligence in the frequency domain synchronous signal sequence that obtains in the steps A in B, the system, adjusts the order remove resultant sequence behind the modulation intelligence then, and zero padding is to the 2N point, and IFFT transforms to time domain then, and time domain sequences is asked the mould value, obtains | x
1(n) |;
Second synchronizing signal SYNC2 that receiver in C, the system intercepts next time slot handles according to the description among steps A and the step B, obtains | x
2(n) |;
D, described receiver are right | x
1(n) | and | x
2(n) | the related operation that is shifted obtains
2. the evaluation method of sample clock frequency deviation in the multiplex system as claimed in claim 1 is characterized in that:
Among steps A and the C, during second synchronizing signal SYNC2 of receiver intercepting current time slots, the leading CP_len of window point during intercepting.
3. the computational methods of sample clock frequency deviation in the communication system as claimed in claim 1 is characterized in that:
X among the step B
1(n) computational methods comprise the FFT/IFFT method, subcarrier order method of adjustment and zero padding method.
4. the evaluation method of sample clock frequency deviation in the multiplex system as claimed in claim 1 is characterized in that:
Ask mould to ask the method for correlation more earlier when using the displacement related operation among the step D.
5. the evaluation method of sample clock frequency deviation in the multiplex system as claimed in claim 1 is characterized in that:
Ask the method for sample clock frequency deviation value in the step F by the sampling instant deviate.
6. the evaluation method of sample clock frequency deviation in the multiplex system as claimed in claim 1 is characterized in that:
Among the step B, adopt following method when receiver removes modulation intelligence in the frequency domain synchronous signal sequence in the system: with the frequency domain synchronous signal sequence divided by the sequence of synchronic PN sequence after modulation.
7. the evaluation method of sample clock frequency deviation in the multiplex system as claimed in claim 1 is characterized in that:
Described system comprises the multiplex system that uses the OFDM modulation.
8. the evaluation method of sample clock frequency deviation in the multiplex system as claimed in claim 7 is characterized in that: described system is the image delivering system that is used for CMMB.
9. the evaluation method of sample clock frequency deviation in the multiplex system as claimed in claim 8 is characterized in that: described CMMB system comprises that Doppler frequency shift reaches the fast fading channel of 300Hz.
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CN108011854A (en) * | 2017-12-14 | 2018-05-08 | 威胜信息技术股份有限公司 | The sampling frequency deviation evaluation method of ofdm system |
CN111756470A (en) * | 2020-06-23 | 2020-10-09 | 中国人民解放军63892部队 | Noise modulation method based on pseudo-random sequence |
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CN108011854A (en) * | 2017-12-14 | 2018-05-08 | 威胜信息技术股份有限公司 | The sampling frequency deviation evaluation method of ofdm system |
CN108011854B (en) * | 2017-12-14 | 2020-12-18 | 威胜信息技术股份有限公司 | Sampling frequency deviation estimation method of OFDM system |
CN111756470A (en) * | 2020-06-23 | 2020-10-09 | 中国人民解放军63892部队 | Noise modulation method based on pseudo-random sequence |
CN111756470B (en) * | 2020-06-23 | 2024-05-14 | 中国人民解放军63892部队 | Noise modulation method based on pseudo-random sequence |
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