CN101944436A - Multilayer ceramic super capacitor and manufacturing method thereof - Google Patents
Multilayer ceramic super capacitor and manufacturing method thereof Download PDFInfo
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Abstract
The invention discloses a multilayer ceramic super capacitor and a manufacturing method thereof, belonging to the capacitor field. The manufacturing method comprises the following steps: adopting a reaction magnetism control spattering technique to spatter a ceramic dielectric layer on a substrate; adding a mask model; spattering a metal inner electrode; removing the mask model; spattering a ceramic dielectric layer again; adding the mask model; spattering the metal inner electrode, and then removing the mask model and spattering the ceramic dielectric layer; repeating the steps to prepare into a multilayer ceramic structural chip; respectively spattering a metal outer electrode on the two opposite sides of the metal inner electrode leading out from the chip to obtain the multilayer ceramic super capacitor. The multilayer ceramic super capacitor of the invention has large energy storage density, short charging and discharging time and less leakage electricity; and uniform charging and discharging do not damage or shorten the service life of the capacitor, thus ensuring the reliability.
Description
Technical field
The present invention relates to capacitor area, particularly a kind of manufacture method of multi-layer ceramics ultracapacitor and multi-layer ceramics ultracapacitor.
Background technology
Car combustion engine comprises power-supply system, electricity generation system and battery system.When internal combustion engine was started working, battery need be given motor and the ignition system power supply that drives internal combustion engine.The most general existing battery has lead-acid battery, nickel-cadmium cell, Ni-MH battery and nickel-zinc cell.
Every kind of battery all has characteristic separately, and the characteristic according to different can be used in different occasions.Table 1 as follows is various battery performance contrast tables.
Table 1
Ni-MH battery | Lead-acid battery | Nickel-zinc cell | |
Weight (pound) | 1716 | 3646 | 1920 |
Volume (inch 3) | 17881 | 43045 | 34780 |
|
5%/month | 1%/month | 1%/month |
The full charging interval | 1.5 hour | 8 hours | 1.5 hour |
Discharge and recharge the life-span | In | High | In |
Toxic whether | Poisonous | Poisonous | Poisonous |
Wherein, lead-acid battery needs 6 to 8 hours charging interval, this is because when charging, battery can produce chemical reaction, can not apply very high voltage and current, the stereotype heating in the battery is very fast, but cooling is very slow, overheated meeting causes producing hydrogen and oxygen bubble, and it needs to be emerged by the aperture of battery.As time goes on, the usefulness of battery can reduce, and need safeguard battery, as filling distilled water or deionized water.Ni-mh and nickel-cadmium cell are not subjected to warming-up effect, and the charging interval is less, apply big curtage, in 20 minutes, can make charge volume be increased to 80% by 20%.Being full of electricity then needs more than 1 hour.Ni-MH battery has nearly self-discharge phenomenon of 5 to 10% every day, can cause several weeks after, it is available that battery does not just have electricity.Nickel-cadmium cell also has self-discharge phenomenon, and his discharge capacity every day is 1%.Existing battery all has a lifetime, and continuous discharges and recharges fully, can shorten the life-span of battery greatly.
Summary of the invention
In order to reduce the influence that discharges and recharges battery life, the embodiment of the invention provides a kind of manufacture method and multi-layer ceramics ultracapacitor of multi-layer ceramics ultracapacitor.Described technical scheme is as follows:
A kind of manufacture method of multi-layer ceramics ultracapacitor comprises:
Step 1: adopt reaction magnetocontrol sputtering technology, use pure base metal or pure lowpriced metal alloy target, pure base metal of sputter or pure lowpriced metal alloy obtain ceramic dielectric layer on substrate, and the execution in step that circulates then 2 is to step 7 at least one time;
Step 2: the ceramic dielectric layer that previous step is obtained is as first ceramic dielectric layer, add first mask, make in many limits of the interior electrode treat sputter, the wherein first edge snap of a limit and described first ceramic dielectric layer is all reserved the default limit of staying and is measured between all the other each edges of all the other each bar limits and described first ceramic dielectric layer;
Step 3: use pure noble metal or pure precious metal alloys target, sputter first metal inner electrode on described first ceramic dielectric layer;
Step 4: remove described first mask, use pure base metal or pure lowpriced metal alloy target, sputter second ceramic dielectric layer on described first metal inner electrode;
Step 5: add second mask, make in many limits of the interior electrode treat sputter once more, the wherein second edge snap of a limit and described second ceramic dielectric layer is all reserved the default limit of staying and is measured between all the other each edges of all the other each bar limits and described second ceramic dielectric layer; Wherein, described first edge and second edge are the two opposite edges edge;
Step 6: use pure noble metal or pure precious metal alloys target, sputter second metal inner electrode on described second ceramic dielectric layer;
Step 7: remove described second mask, use pure base metal or pure lowpriced metal alloy target, sputter the 3rd ceramic dielectric layer on described second metal inner electrode;
Step 8: make the multilayer ceramic structure chip after the described loop ends, wherein, the ceramic dielectric layer that obtains for the first time is the bottom ceramic dielectric layer, the ceramic dielectric that obtains for the last time is the top layer ceramic dielectric layer, use pure noble metal or pure precious metal alloys target, draw splash-proofing sputtering metal external electrode on two opposite flanks of metal inner electrode at described multilayer ceramic structure chip respectively, make the multi-layer ceramics ultracapacitor.
Wherein, the condition that makes every layer of ceramic dielectric layer is: the substrate working temperature is 300~600 ℃, and sputtering current density is more than or equal to 50mA/cm
2, operating air pressure is smaller or equal to 5Pa, and partial pressure of oxygen is than being O
2: Ar=1: 1.
Every layer of ceramic dielectric layer all is rectangle or square.
The thickness of described bottom ceramic dielectric layer and top layer ceramic dielectric layer is all more than or equal to 0.01mm.
Every layer of ceramic dielectric layer withstand voltage greater than 10
6V/cm.
The relative dielectric constant of every layer of ceramic dielectric layer is between 3~20000.
The thickness of the arbitrary ceramic dielectric layer except that described bottom ceramic dielectric layer and top layer ceramic dielectric layer is all between 0.01~5 μ m.
The described limit amount of staying is more than or equal to 0.2mm.
The thickness of the thickness of described metal inner electrode and metal external electrode is all between 0.01~2 μ m.
Described metal inner electrode and metal dispatch from foreign news agency be a kind of in silver, platinum, gold and the alloy very.
The number of plies of described capacitor is 2~5000.
A kind of multi-layer ceramics ultracapacitor that utilizes described method to make, the metal inner electrode that comprises at least two interaction cascadings, engage by ceramic dielectric layer between two adjacent metal inner electrodes, bottom and top layer are ceramic dielectric layer, draw on two opposite flanks of metal inner electrode and are connected with the metal external electrode.
Every layer of ceramic dielectric layer all is rectangle or square.
The thickness of bottom ceramic dielectric layer and top layer ceramic dielectric layer is all more than or equal to 0.01mm.
The thickness of the arbitrary ceramic dielectric layer except that bottom ceramic dielectric layer and top layer ceramic dielectric layer is all between 0.01~5 μ m.
The thickness of the thickness of described metal inner electrode and metal external electrode is all between 0.01~2 μ m.
Described metal inner electrode and metal dispatch from foreign news agency be a kind of in silver, platinum, gold and the alloy very.
The number of plies of described capacitor is 2~5000.
Multi-layer ceramics ultracapacitor among the present invention is a kind of energy-storage travelling wave tube of uniqueness, and very large capacitance is arranged, and can store super amount electric energy.The present invention compared with prior art has following advantage:
Multi-layer ceramics ultracapacitor of the present invention is after discharging and recharging fully, and performance can not worsen, and, charging fast can not destroy and reduce life of capacitors, when the lead of capacitor and connector are cooled off fully, be full of the electric weight of 51 kilowatt hours, only need 4 to 6 minutes.51 degree electricity can make car travel 450 kilometers with 90 kilometers/hour, simultaneously can use automobile audio, turn on light and open air-conditioning.
Material non-explosive, nothing corrosion and nontoxic that the present invention simultaneously is used, material is made up of nontoxic ceramic dielectric.The multi-layer ceramics ultracapacitor can not produce blast when being charged and collide, therefore, the multi-layer ceramics ultracapacitor is very safe when being used in automobile, bus, electric bicycle, tractor and any vehicles.It can be used for solar cell and wind energy energy storage simultaneously, can use for family, commerce and factory.The multi-layer ceramics ultracapacitor can be used for using electricity in off-peak hours, and when solar energy and wind energy supply exceed use amount, can store in the multi-layer ceramics ultracapacitor, in calm and sunlight deficiency, can use multi-layer ceramics ultracapacitor electric energy stored.
Description of drawings
In order to be illustrated more clearly in the embodiment of the invention or technical scheme of the prior art, to do to introduce simply to the accompanying drawing of required use in embodiment or the description of the Prior Art below, apparently, accompanying drawing in describing below only is some embodiments of the present invention, for those of ordinary skills, under the prerequisite of not paying creative work, can also obtain other accompanying drawing according to these accompanying drawings.
Fig. 1 is the manufacture method flow chart of multi-layer ceramics ultracapacitor provided by the invention;
Fig. 2 is the thickness direction sectional schematic diagram of multi-layer ceramics ultracapacitor provided by the invention.
Embodiment
For making the purpose, technical solutions and advantages of the present invention clearer, embodiment of the present invention is described further in detail below in conjunction with accompanying drawing.
Embodiment 1
Referring to Fig. 1, present embodiment provides a kind of manufacture method of multi-layer ceramics ultracapacitor, adopts reactive sputtering process, along thickness direction ceramic dielectric and interior electrode is sputtered at respectively together, interior electrode becomes the intersection stacked multi-layer structure, is ceramic dielectric between the interior electrode.External electrode in the difference sputter of the two ends of sandwich construction is just made the multi-layer ceramics ultracapacitor.Specifically comprise the steps:
Step 101: adopt reaction magnetocontrol sputtering technology, use pure base metal or pure lowpriced metal alloy target, pure base metal of sputter or pure lowpriced metal alloy obtain ceramic dielectric layer on substrate, and circulation step 102-107 is at least one time then.
Wherein, the condition that makes this layer ceramic dielectric layer is: high substrate temperature, working range can be between 300 ℃~600 ℃, as 320 ℃, 350 ℃, 400 ℃, 420 ℃, 450 ℃ etc.; High sputtering current density, scope can be specially more than or equal to 50mA/cm
2, as 50mA/cm
2, 60mA/cm
2, 70mA/cm
2Deng; Low operating air pressure, scope can be specially and be less than or equal to 5Pa, as 1Pa, 0.5Pa, 0.3Pa etc.; The high keto sectional pressure ratio is specifically as follows O
2: Ar=1: 1, to guarantee crystallization and the densification and the crystal transfer of ceramic dielectric, obtain the ceramic dielectric layer of required dielectric constant.
The pure base metal that relates in the embodiment of the invention is meant the metal except that pure noble metal, comprises multiplely, is Titanium more than 99.99% or the like as purity.Wherein, pure noble metal is meant the metal that can not produce oxidation in the air of high temperature, as silver, platinum, gold etc.
Be that example describes to adopt pure base metal titanium to make ceramic dielectric layer below, under the condition of above-mentioned high sputtering current density, high substrate temperature, low operating air pressure and high keto sectional pressure, the titanium atom that is sputtered out can be oxidized into the titanium dioxide deposited atom on substrate.Preferably, the substrate working temperature is set at 400 ℃, then is deposited on the titanium dioxide meeting crystallization on the substrate, crystal is under 400 ℃ condition, and major part changes the rutile phase into, thereby prepares required ceramic dielectric layer on substrate.
Adopting high sputtering current density, is in order to improve sputtering rate, and sputtering rate should be to improve the production efficiency of element more than 0.1nm/s.The shape of arbitrary ceramic dielectric layer can be a quadrangle in the embodiment of the invention, as is rectangle or square, the bottom ceramic dielectric layer of ceramic dielectric layer in this step as the multi-layer ceramics ultracapacitor.In the embodiment of the invention, preferably, the shape of every layer of ceramic dielectric layer is a rectangle, as being length * wide=19mm * 18mm.The thickness of the bottom ceramic dielectric layer of making in this step is greater than 0.01mm, as being 0.05mm, 0.1mm, 0.15mm, 0.2mm or the like.
Step 102: the ceramic dielectric layer that previous step is obtained is as first ceramic dielectric layer, add first mask, make in many limits of the interior electrode treat sputter, the default limit amount of staying is all reserved in the wherein first edge snap of the limit and first ceramic dielectric layer between all the other each edges of all the other each the bar limits and first ceramic dielectric layer.Wherein, this stays the limit amount to be the above gap of 0.2mm.As 0.2mm, 0.3mm, 0.5mm, 1mm etc.
Wherein, if circulation is a first pass, what then previous step referred to is exactly step 101, if circulation is not a first pass, then previous step refers to step 107.
Step 103: use pure noble metal or pure precious metal alloys target, sputter first metal inner electrode on first ceramic dielectric layer.
Wherein, the condition of electrode is in the splash-proofing sputtering metal: high sputtering current density, high substrate temperature and low operating air pressure specifically with the description in the step 101, as are 50mA/cm
2, between 300 ℃~600 ℃, 5Pa, repeat no more herein.
Metal inner electrode in the present embodiment can be in pure noble metals such as silver, platinum, gold and the pure precious metal alloys a kind of.The thickness range of metal inner electrode can be between 0.01~2 μ m, as 0.01 μ m, 0.04 μ m, 0.05 μ m, 0.5 μ m, 0.8 μ m, 1 μ m etc.Preferably, be example with the argent, the thickness of the metal inner electrode that makes is 0.2 μ m.
Step 104: remove described first mask, use pure base metal or pure lowpriced metal alloy target, pure base metal of sputter or pure lowpriced metal alloy obtain second ceramic dielectric layer on first metal inner electrode.
Step 105: add second mask, make in many limits of the interior electrode treat sputter once more that wherein the second edge snap of limit and second ceramic dielectric layer is all reserved the default limit of staying and measured between all the other each edges of all the other each the bar limits and second ceramic dielectric layer.Wherein, this stays the limit amount to be the above gap of 0.2mm.As 0.2mm, 0.3mm, 0.5mm, 1mm etc.Stay limit amount consistent in this step with the scope of staying the limit amount in the step 102, concrete size can, also can be different, the embodiment of the invention is not done concrete qualification to this.
Wherein, first edge and second edge are the two opposite edges edge.When ceramic dielectric layer was quadrangle, this two opposite edges edge was meant non-conterminous two edges, and for example, ceramic dielectric layer is rectangle or square, and at this moment, if first edge is a right side edge, then second edge is a left side edge; If first edge is a left side edge, then second edge is a right side edge.According to the method described above can be so that two adjacent metal inner electrode interaction cascadings.
Step 106: use pure noble metal or pure precious metal alloys target, sputter second metal inner electrode on second ceramic dielectric layer.
In the present embodiment, the sputtering condition of every layer of metal inner electrode, the thickness of material selection scope and metal inner electrode, all identical with the description in the step 103, therefore, repeat no more herein.
Preferably, be example with the argent, the thickness of every layer of making metal inner electrode is 0.2 μ m, and the overlapping area of adjacent two layers metal inner electrode is 314mm
2, be 314mm as first metal inner electrode and this two-layer overlapping area of second metal inner electrode
2
Step 107: remove second mask, use pure base metal or pure lowpriced metal alloy target, pure base metal of sputter or pure lowpriced metal alloy obtain the 3rd ceramic dielectric layer on second metal inner electrode.
Step 108: make the multilayer ceramic structure chip after the loop ends, wherein, the ceramic dielectric that obtains for the first time is the bottom ceramic dielectric, the ceramic dielectric that obtains for the last time is the top layer ceramic dielectric layer, use pure noble metal or pure precious metal alloys target, draw splash-proofing sputtering metal external electrode on two opposite flanks of metal inner electrode at the multilayer ceramic structure chip respectively, make the multi-layer ceramics ultracapacitor.
In the present embodiment, the sputtering condition of metal external electrode, the thickness of material selection scope and metal external electrode, all identical with the description in the step 103, therefore, repeat no more herein.
In the embodiment of the invention, circulation makes the multi-layer ceramics ultracapacitor, if above-mentioned steps only circulates one time, then make two layer capacitors, according to practical application, can make 5000 layers of ceramic ultracapacitor at most, so the number of plies of multi-layer ceramics ultracapacitor can be between 2~5000, as 1142 layers etc.Wherein, the number of plies of capacitor is identical with the number of plies of metal inner electrode, but lacks one deck than the number of plies of ceramic dielectric layer, because top layer and bottom are ceramic dielectric layer, therefore, the number of plies of ceramic dielectric layer manys one deck than the number of plies of metal inner electrode.
The thickness of the bottom ceramic dielectric layer of making in the said method is more than 0.01mm; identical with the thickness of top layer ceramic dielectric layer; as can being 0.02mm, 0.06mm, 0.15mm, 0.2mm, 1mm, 2mm or the like, but also need not too thick, as long as guard electrode is not impaired.
In the present embodiment, the thickness range of the arbitrary ceramic dielectric layer except that bottom ceramic dielectric layer and top layer ceramic dielectric layer is all between 0.01 μ m~5 μ m, as 0.01 μ m, 0.02 μ m, 0.03 μ m, 1 μ m, 2 μ m, 2.5 μ m, 5 μ m etc.
In the present embodiment, the relative dielectric constant of every layer of ceramic dielectric layer between 3~20000, every layer of ceramic dielectric layer withstand voltage greater than 10
6V/cm.For example, be that rutile ceramic is an example with the ceramic dielectric layer, the performance parameter of rutile ceramic is: insulation resistivity is greater than 10
12Ω cm, DIELECTRIC CONSTANT
33/ ε
0=80, dielectric loss tg δ=0.05%, temperature coefficient of permittivity (750 ± 100) * 10
-6/ ℃.
The multi-layer ceramics ultracapacitor that adopts reaction magnetic sputtering technology to make in the embodiment of the invention, energy storage density is big, and the time that discharges and recharges is short, and electric leakage is few, and charging and discharge all can not destroy or reduce life of capacitors, and reliability has obtained guarantee.Simultaneously, material therefor is all nontoxic, can reach good environmental requirement.
Referring to Fig. 2, present embodiment provides a kind of multi-layer capacitor that utilizes the manufacture method manufacturing of above-mentioned multi-layer ceramics ultracapacitor, specifically comprise: the metal inner electrode 1 of at least two interaction cascadings, engage by ceramic dielectric layer 2 between two adjacent metal inner electrodes 1, bottom 3 and top layer 4 are ceramic dielectric layer, draw on two opposite flanks of metal inner electrode 1 and are connected with metal external electrode 5.
Wherein, every layer of ceramic dielectric layer is quadrangle, as rectangle or square.
The thickness of bottom ceramic dielectric layer 3 and top layer ceramic dielectric layer 4 is all more than or equal to 0.01mm.
The thickness of the arbitrary ceramic dielectric layer 2 except that bottom ceramic dielectric layer 3 and top layer ceramic dielectric layer 4 is all between 0.01~5 μ m.
Wherein, the thickness of the thickness of metal inner electrode 1 and metal external electrode 5 is all between 0.01~2 μ m.
Metal inner electrode 1 and metal external electrode 5 are a kind of in silver, platinum, gold and the alloy.
Wherein, the number of plies of multi-layer ceramics ultracapacitor is 2~5000.
The storage power of the multi-layer ceramics ultracapacitor in the embodiment of the invention is very big, illustrates below.The size of multi-layer ceramics ultracapacitor is: length * wide * thick=19mm * 18mm * 1mm, the thickness of bottom ceramic dielectric layer and top layer ceramic dielectric layer all is 0.1mm, the thickness of every layer of ceramic dielectric layer in addition is 0.5 μ m, the thickness of metal Ag inner electrode is 0.2 μ m, and the overlapping area of adjacent two metal inner electrodes is 314mm
2, adopt rutile ceramic (DIELECTRIC CONSTANT
33/ ε
0=80) be medium, the capacitance that can calculate the multi-layer ceramics ultracapacitor thus is 0.000507F.
Illustrate the advantage of multi-layer ceramics ultracapacitor below with two kinds of scenes.
First kind of scene applies the direct voltage of 110V, and ceramic ultracapacitor energy stored is:
E=0.5 * 0.000507 * 110
2=3.067 (joule)=0.00085 (kilowatt hour);
Second kind of scene applies the direct voltage of 500V, and ceramic ultracapacitor energy stored is:
E=0.5 * 0.000507 * 500
2=63.375 (joule)=0.01756 (kilowatt hour);
This shows that the storage power of a multi-layer ceramics ultracapacitor is very big, if with 60000 identical multi-layer ceramics ultracapacitor parallel connections, then the store energy amount of combined capacitor is:
Under first kind of scene, ∑ E=0.00085 * 60000=51 (kilowatt hour);
Under second kind of scene, ∑ E=0.01756 * 60000=1054 (kilowatt hour);
By calculating, the weight of each multi-layer capacitor is: 2.0g;
Therefore every kilogram energy storage is:
Under first kind of scene, 0.00085 * 500=0.425 (kilowatt hour);
Under second kind of scene, 0.01756 * 500=8.78 (kilowatt hour);
The required weight of 51 degree electricity is:
Under first kind of scene, 51 ÷ 0.425=120 (kilogram);
Under second kind of scene, 51 ÷ 8.78=5.8 (kilogram).
Because the temperature coefficient of permittivity of rutile ceramic is (750 ± 100) * 10
-6/ ℃, therefore can calculate in-55 ℃~+ 125 ℃ broad temperature range, the rate of change of capacitance is in ± 10% scope, and the multi-layer ceramics ultracapacitor can use in the temperature range of broadness.
Every performance index of the multi-layer ceramics ultracapacitor that the embodiment of the invention provides all are better than electrochemical cell, and for example under first kind of scene: weight is 120Kg, and volume is 0.0205m
3The multi-layer ceramics ultracapacitor, electric leakage speed is 0.1%/month, the time of completely filling only needs 3~6 minutes, discharges and recharges life of capacitors without any influence, does not also have noxious substance in the material.
The multi-layer ceramics ultracapacitor that the embodiment of the invention provides is a kind of energy-storage travelling wave tube of uniqueness, and it can store super amount electric energy, can be used for the each side and the used field of electrochemical cell of energy storage industrial circle requirement.Auto industry for example.
Multi-layer ceramics ultracapacitor energy storage density in the embodiment of the invention is big, and the time that discharges and recharges is short, and electric leakage is few, discharges and recharges all and can not destroy or reduce life of capacitors, and reliability has obtained guarantee.
The above only is preferred embodiment of the present invention, and is in order to restriction the present invention, within the spirit and principles in the present invention not all, any modification of being done, is equal to replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (18)
1. the manufacture method of a multi-layer ceramics ultracapacitor is characterized in that, described method comprises:
Step 1: adopt reaction magnetocontrol sputtering technology, use pure base metal or pure lowpriced metal alloy target, pure base metal of sputter or pure lowpriced metal alloy obtain ceramic dielectric layer on substrate, and the execution in step that circulates then 2 is to step 7 at least one time;
Step 2: the ceramic dielectric layer that previous step is obtained is as first ceramic dielectric layer, add first mask, make in many limits of the interior electrode treat sputter, the wherein first edge snap of a limit and described first ceramic dielectric layer is all reserved the default limit of staying and is measured between all the other each edges of all the other each bar limits and described first ceramic dielectric layer;
Step 3: use pure noble metal or pure precious metal alloys target, sputter first metal inner electrode on described first ceramic dielectric layer;
Step 4: remove described first mask, use pure base metal or pure lowpriced metal alloy target, sputter second ceramic dielectric layer on described first metal inner electrode;
Step 5: add second mask, make in many limits of the interior electrode treat sputter once more, the wherein second edge snap of a limit and described second ceramic dielectric layer is all reserved the default limit of staying and is measured between all the other each edges of all the other each bar limits and described second ceramic dielectric layer; Wherein, described first edge and second edge are the two opposite edges edge;
Step 6: use pure noble metal or pure precious metal alloys target, sputter second metal inner electrode on described second ceramic dielectric layer;
Step 7: remove described second mask, use pure base metal or pure lowpriced metal alloy target, sputter the 3rd ceramic dielectric layer on described second metal inner electrode;
Step 8: make the multilayer ceramic structure chip after the described loop ends, wherein, the ceramic dielectric layer that obtains for the first time is the bottom ceramic dielectric layer, the ceramic dielectric that obtains for the last time is the top layer ceramic dielectric layer, use pure noble metal or pure precious metal alloys target, draw splash-proofing sputtering metal external electrode on two opposite flanks of metal inner electrode at described multilayer ceramic structure chip respectively, make the multi-layer ceramics ultracapacitor.
2. method according to claim 1 is characterized in that, the condition that makes every layer of ceramic dielectric layer is: the substrate working temperature is 300~600 ℃, and sputtering current density is more than or equal to 50mA/cm
2, operating air pressure is smaller or equal to 5Pa, and partial pressure of oxygen is than being O
2: Ar=1: 1.
3. method according to claim 1 is characterized in that, every layer of ceramic dielectric layer all is rectangle or square.
4. method according to claim 1 is characterized in that, the thickness of described bottom ceramic dielectric layer and top layer ceramic dielectric layer is all more than or equal to 0.01mm.
5. method according to claim 1 is characterized in that, every layer of ceramic dielectric layer withstand voltage greater than 10
6V/cm.
6. method according to claim 1 is characterized in that the relative dielectric constant of every layer of ceramic dielectric layer is between 3~20000.
7. method according to claim 1 is characterized in that, the thickness of the arbitrary ceramic dielectric layer except that described bottom ceramic dielectric layer and top layer ceramic dielectric layer is all between 0.01~5 μ m.
8. method according to claim 1 is characterized in that, the described limit amount of staying is more than or equal to 0.2mm.
9. method according to claim 1 is characterized in that, the thickness of the thickness of described metal inner electrode and metal external electrode is all between 0.01~2 μ m.
10. method according to claim 1 is characterized in that, described metal inner electrode and metal dispatch from foreign news agency be a kind of in silver, platinum, gold and the alloy very.
11. method according to claim 1 is characterized in that, the number of plies of described capacitor is 2~5000.
12. multi-layer ceramics ultracapacitor that utilizes the described method of claim 1 to make, it is characterized in that, the metal inner electrode that comprises at least two interaction cascadings, engage by ceramic dielectric layer between two adjacent metal inner electrodes, bottom and top layer are ceramic dielectric layer, draw on two opposite flanks of metal inner electrode and are connected with the metal external electrode.
13. capacitor according to claim 12 is characterized in that, every layer of ceramic dielectric layer all is rectangle or square.
14. capacitor according to claim 12 is characterized in that, the thickness of bottom ceramic dielectric layer and top layer ceramic dielectric layer is all more than or equal to 0.01mm.
15. capacitor according to claim 12 is characterized in that, the thickness of the arbitrary ceramic dielectric layer except that bottom ceramic dielectric layer and top layer ceramic dielectric layer is all between 0.01~5 μ m.
16. capacitor according to claim 12 is characterized in that, the thickness of the thickness of described metal inner electrode and metal external electrode is all between 0.01~2 μ m.
17. capacitor according to claim 12 is characterized in that, described metal inner electrode and metal dispatch from foreign news agency be a kind of in silver, platinum, gold and the alloy very.
18. capacitor according to claim 12 is characterized in that, the number of plies of described capacitor is 2~5000.
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Cited By (4)
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CN102676995A (en) * | 2011-03-08 | 2012-09-19 | 三星电机株式会社 | Metal sputtering film, and metal powder using the same |
CN103319210A (en) * | 2013-06-20 | 2013-09-25 | 上海合既得动氢机器有限公司 | Process for plating precious metal film on porous ceramic based on magnetron sputtering through vacuum plating |
CN112331479A (en) * | 2017-12-01 | 2021-02-05 | 三星电机株式会社 | Multilayer capacitor |
CN112530695A (en) * | 2020-11-09 | 2021-03-19 | 潮州三环(集团)股份有限公司 | Ceramic chip in multilayer ceramic capacitor and preparation method thereof |
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Cited By (7)
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CN102676995A (en) * | 2011-03-08 | 2012-09-19 | 三星电机株式会社 | Metal sputtering film, and metal powder using the same |
CN102676995B (en) * | 2011-03-08 | 2015-10-07 | 三星电机株式会社 | Metal sputtering film and the metal-powder utilizing it |
CN103319210A (en) * | 2013-06-20 | 2013-09-25 | 上海合既得动氢机器有限公司 | Process for plating precious metal film on porous ceramic based on magnetron sputtering through vacuum plating |
CN103319210B (en) * | 2013-06-20 | 2014-11-05 | 上海合既得动氢机器有限公司 | Process for plating precious metal film on porous ceramic based on magnetron sputtering through vacuum plating |
CN112331479A (en) * | 2017-12-01 | 2021-02-05 | 三星电机株式会社 | Multilayer capacitor |
CN112331479B (en) * | 2017-12-01 | 2022-04-15 | 三星电机株式会社 | Multilayer capacitor |
CN112530695A (en) * | 2020-11-09 | 2021-03-19 | 潮州三环(集团)股份有限公司 | Ceramic chip in multilayer ceramic capacitor and preparation method thereof |
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