CN101938877B - LED driving circuit - Google Patents
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- CN101938877B CN101938877B CN 201010286433 CN201010286433A CN101938877B CN 101938877 B CN101938877 B CN 101938877B CN 201010286433 CN201010286433 CN 201010286433 CN 201010286433 A CN201010286433 A CN 201010286433A CN 101938877 B CN101938877 B CN 101938877B
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Abstract
The invention discloses an LED driving circuit which comprises an output module, a storage module and a driving control module. The output module stores the channel data of the output module, the channel data includes multi-frame data and control data, each frame of data includes starting point PWM (Pulse Width Modulation) data, terminal point PWM data, brightness jumping amplitude and brightness lasting time, and the control data includes a start frame, a cycle length and a cycle number, the driving control module generates a PWM signal according to the frame data and the control data, and the output module is driven by the PWM signal to generate an output current. Accordingly, the invention can realize rich LED light or color effect by utilizing less channel data.
Description
[technical field]
The present invention relates to the LED application, especially relate to led drive circuit.
[background technology]
LED(Light Emitting Diode, light-emitting diode) because the life-span is long, response speed is fast, volume is little, power consumption is little, the reliability high has been widely used in the fields such as backlight, illumination, electronic equipment, display screen and automobile.Drive circuit is the important component part of LED product, and the performance of drive circuit will directly have influence on the performances such as life-span, power consumption and reliability of LED product.Usually, because LED is the semiconductor device of characteristic sensitivity, have again negative temperature characteristic, therefore generally need to adopt constant current to drive to LED.
Yet existing led drive circuit all is controlled by other control devices usually could realize control to its output current to realize various LED effects, and this has limited the application of led drive circuit greatly.Therefore, be necessary to propose a kind of improved technical scheme and overcome the problems referred to above.
[summary of the invention]
The technical problem to be solved in the present invention is to provide a kind of led drive circuit, and it can independently carry out PWM(Pulse Width Modulation to its output current) LED light or the color effects of modulation to realize enriching.
In order to address the above problem, according to an aspect of the present invention, the invention provides a kind of led drive circuit, it comprises: output module; Memory module, it stores the channel data of described output module, and described channel data includes the multiframe data, and every frame data include starting point PWM data, terminal point PWM data, brightness hopping amplitude and brightness duration; Drive control module produces pwm signal according to described frame data, and described output module produces output current under the driving of pwm signal.
Further, described channel data also comprises the control data, and described control data comprise start frame, length of the cycle and cycle-index, and drive control module is according to the generation of the described pwm signal of described control Data Control.
Further, described output module is N, and described memory module stores corresponding a channel data for each output module, and every part of channel data all includes M frame data and control data, and wherein N and M are the natural number greater than 1.
Further, described drive control module includes command register, each output module is configured with two kinds of drive patterns, the first drive pattern is outside PWM drive pattern, the second drive pattern is autonomous PWM drive pattern, described command register is deposited as each output module 1 control bit is set,, described control bit just can control the drive pattern of each output module by being set, when an output module is autonomous PWM drive pattern, described drive control module obtains channel data corresponding to this output module in described memory module, and produces pwm signal to this output module according to described channel data; When an output module was outside PWM drive pattern, described drive control module received the channel data of this output module from external interface, and produced pwm signal to this output module according to described channel data.
Further, described drive control module comprises the N corresponding with each output module output driver element, when autonomous PWM drive pattern, described output driver element obtains corresponding channel data in described memory module, and produce accordingly pwm signal to drive corresponding output module, externally during the PWM drive pattern, described output driver element receives the channel data of external interface input, and produces accordingly pwm signal to drive corresponding output module.
Further, described output module comprises operational amplifier, switching device, efferent duct and resistance,
The output of described operational amplifier links to each other with the grid of described efferent duct via described switching device, the source electrode of described efferent duct links to each other with an end of described resistance, the other end ground connection of described resistance, the drain electrode of described efferent duct is as the output of described output module, the normal phase input end of described operational amplifier connects reference voltage, the source electrode of the described efferent duct of anti-phase input termination, the turn-on and turn-off of described switching device are controlled by pwm signal.
Further, described resistance is adjustable resistance, adjusts by the resistance selection signal, and described reference voltage selects signal selected from a plurality of different reference voltages by described Multi-path reference voltage unit according to reference voltage.
Further, described drive control module can generate a pwm signal according to the starting point PWM data of frame data, and this pwm signal will be as the first rank pwm signal that carries out the PWM modulation according to these frame data; Described drive control module can generate a pwm signal according to the described terminal point PWM data of frame data, and this pwm signal will be as the tail rank pwm signal that carries out the PWM modulation according to these frame data; The described brightness duration represents the time that every rank pwm signal continues; The duty ratio of described brightness skip frame degree long expression current rank pwm signal and lower single order pwm signal poor.
Further, in starting point PWM data during less than terminal point PWM data, the duty ratio of described pwm signal will increase progressively take the brightness hopping amplitude as step-length, and during greater than terminal point PWM data, the duty ratio of described pwm signal is successively decreased take the brightness hopping amplitude as step-length in starting point PWM data.
Further, the start frame of described control data represents the start frame data of this PWM modulation, and described length of the cycle represents the number of the frame data of this PWM modulation, and described cycle-index represents the cycle-index of this PWM modulation.
Compared with prior art, the present invention is allowed for the user channel data is carried out predefined by memory module is set in led drive circuit, thereby can realize that autonomous PWM drives.In addition, it also can utilize less channel data to realize abundant LED light or color effects.
About other purposes of the present invention, feature and advantage are described in detail in embodiment below in conjunction with accompanying drawing.
[description of drawings]
In conjunction with reaching with reference to the accompanying drawings ensuing detailed description, the present invention will be more readily understood, structure member corresponding to same Reference numeral wherein, wherein:
Fig. 1 is the led drive circuit structural representation block diagram in one embodiment among the present invention;
Fig. 2 is the interior modulating data structural representation in one embodiment of memory module among the present invention;
Fig. 3 is the drive control module structural representation block diagram in one embodiment of the led drive circuit among the present invention;
Fig. 4 is the output driver element structural representation block diagram in one embodiment of the drive control module among the present invention;
Fig. 5 is the workflow schematic diagram in one embodiment of the output driver element shown in Fig. 4;
Fig. 6 is the output module circuit diagram in one embodiment of the led drive circuit among the present invention; With
Fig. 7 is the output module circuit diagram in another embodiment of the led drive circuit among the present invention.
[embodiment]
For above-mentioned purpose of the present invention, feature and advantage can be become apparent more, the present invention is further detailed explanation below in conjunction with the drawings and specific embodiments.
Detailed description of the present invention mainly presents by program, step, logical block, process or other symbolistic descriptions, the running of the technical scheme among its direct or indirect simulation the present invention.Affiliated those of skill in the art use herein these descriptions and statement essential to the work that the others skilled in the art in the affiliated field effectively introduce them.
Alleged " embodiment " or " embodiment " refer to that special characteristic, structure or the characteristic relevant with described embodiment can be contained at least one implementation of the present invention at least herein.Different local in this manual " in one embodiment " that occur also nonessentially all refer to same embodiment, must not be yet with other embodiment mutually exclusive separately or select embodiment.In addition, represent the sequence of modules in method, flow chart or the functional block diagram of one or more embodiment and revocablely refer to any particular order, also be not construed as limiting the invention.
See also shown in Figure 1ly, it is the led drive circuit 100 structural representation block diagram in one embodiment among the present invention, and described led drive circuit 100 comprises drive control module 110, several output modules 120 and memory module 130.
Described output module 120 is N, be respectively the first output module 121, the second output module 122 ... with N output module 123.Therefore each output module also can be referred to as an output channel, and also described led drive circuit 100 includes N output channel, and wherein N is the natural number more than or equal to 1, such as 1,2,4,8,16 or 32 etc.Each output module provides output current by the output OUT of correspondence, and when described led drive circuit 100 was used for driving LED, each output OUT can connect one or more LED.
Described drive control module 110 can receive by external interface the data of outside input, and provides PWM(Pulse Width Modulation, pulse-width modulation to each output module) signal.Described pwm signal drives corresponding output module and produces accurate output current, just can realize any adjusting of the output current of corresponding output module by the duty ratio of adjusting described pwm signal.In one embodiment, can carry out 2 to the output current of output module by the adjustment to the duty ratio of pwm signal
LContrast is whole, and wherein L can be 2,4,8,16 or other natural numbers.For instance, suppose L=8,2
L=256, this moment can described pwm signal duty ratio be set to 0/255,1/255,2/255,3/255 ... with 255/255 in any one, accordingly, the output current of output module also can be reference current (duty ratio is 255/255 o'clock output current) 0/255,1/255,2/255,3/255 ... with 255/255 in any one.
In one embodiment, at least one output module is configured with autonomous PWM drive pattern.Preferably, each output module can be configured with described two kinds of drive patterns, and the first drive pattern is outside PWM drive pattern, and the second drive pattern is autonomous PWM drive pattern.Described drive control module 110 includes command register 111, described command register 111 can be stored the drive pattern information by each output module of external interface input, determine that with this each output module is to be operated in the first drive pattern, still is operated in the second drive pattern.When specific implementation, described command register 111 can arrange 1 control bit for each output module, just can control the drive pattern of each output module by the state that described control bit is set, such as control bit be 0 the expression corresponding output module be the first drive pattern, control bit be 1 the expression corresponding output module be the second drive pattern.Each output module can be relatively independent, that is to say, is operated in for first drive pattern lower time at some output modules, and the other output module can be operated under the second drive pattern.
Described memory module 130 stores the PWM modulating data of each output module when autonomous PWM drive pattern, and described PWM modulating data can be stored in the described memory module 130 in advance via external interface.When an output module A is autonomous PWM drive pattern, described drive control module 110 obtains the PWM modulating data (or being called channel data) of this output module A in the described memory module 130, and producing pwm signal to this output module A according to described PWM modulating data, this output module A regulates its output current according to described pwm signal.When an output module B is outside PWM drive pattern, described drive control module 110 receives the PWM modulating data (or being called channel data) of this output module B from external interface, and producing pwm signal to this output module B according to described PWM modulating data, this output module B regulates its output current according to described pwm signal.
In one embodiment, described external interface can be I
2The C bus port, it comprises I
2C bus data I/O port SDI and I
2C bus clock input port SCL.
See also shown in Figure 2, it is the modulating data structural representation in one embodiment of described memory module 130 interior storages, store in the described memory module 130 first passage data corresponding to the first output module 121, corresponding to the second channel data of the second output module 122 ... with the N channel data corresponding to N output module 123.Each channel data can include M frame data and control data, wherein every frame data include starting point PWM data (also can be called starting point PWM value), terminal point PWM data (also can be called terminal point PWM value), brightness hopping amplitude and brightness duration, described control data comprise start frame, length of the cycle and cycle-index, and M is 2,4,8,16 or other natural numbers.
Can generate the pwm signal of certain duty ratio according to described starting point PWM data, and this pwm signal will be as the first rank pwm signal that carries out autonomous PWM modulation according to these frame data.Also can generate the pwm signal of certain duty ratio according to described terminal point PWM data, and this pwm signal will be as the tail rank pwm signal that carries out autonomous PWM modulation according to these frame data.The described brightness duration represents the time that every rank pwm signal continues.Described brightness skip frame degree length has determined duty ratio poor of current rank pwm signal and lower single order pwm signal.
The duty ratio of described pwm signal has 2
LRank, the below is with 2
L=256 are introduced for example.Starting point PWM data and terminal point PWM data can be 8 bit binary data, scope from 00000000 to 11111111, and for the decimal system, scope from 0 to 255.Preferably, in order to save the space, can make low 3 of starting point PWM data and terminal point PWM data to be defaulted as 0, the such scope from 00000000 to 11111000 of starting point PWM data and terminal point PWM data, for the decimal system, scope from 0 to 248.The brightness duration is 3 bit binary data, can support for 8 rank duration, can represent respectively 1ms, 4ms, 16ms, 64ms, 128ms, 256ms, 512ms, 1s.The brightness hopping amplitude is 3 bit binary data, can support 8 rank brightness hopping amplitudes, can represent respectively 1/255,2/255,4/255,8/255,16/255,32/255,48/255,64/255.
During less than terminal point PWM data, the duty ratio of described pwm signal will increase progressively take the brightness hopping amplitude as step-length in starting point PWM data, and during greater than terminal point PWM data, the duty ratio of described pwm signal is successively decreased take the brightness hopping amplitude as step-length in starting point PWM data.The duty ratio of described pwm signal surpasses take the brightness hopping amplitude as the step-length increasing or decreasing when setting terminal point PWM data, and the duty ratio of PWM can be clamped at terminal point PWM data place.
For instance, in frame data of channel data, starting point PWM data are the 00001(decimal system 8), terminal point PWM data are the 01010(decimal system 80), the brightness duration is 011, brightness saltus step step-length is 100, so, the duty ratio of first rank pwm signal is 8/255, and the duty ratio of tail rank pwm signal is 80/255, brightness saltus step step-length is 8/255, and the brightness duration is 16ms.Like this, the process of PWM modulation is: 8/255 pwm signal continues 16ms, and 16/255 pwm signal continues 16ms, 24/255 pwm signal continues 16ms, and 30/255 pwm signal continues 16ms ... 78/255 pwm signal continues 16ms, and 80/255 pwm signal continues 16ms.
The start frame of described control data represents the start frame data of this PWM modulation, and described length of the cycle represents the number of the frame data of this PWM modulation, and described cycle-index represents the cycle-index of this PWM modulation.For instance, if M=16, start frame is 8, length of the cycle 7, cycle-index are 20, and then described drive control module 110 at first reads the 8th frame data of this output channel, and utilize this frame data generation pwm signal to drive this output channel, read afterwards the 9th frame data ..., read subsequently the 15th frame data; Then, cycle-index is counted 1, again read successively more afterwards above-mentioned several frame data, just finish this PWM adjustment until cycle-index equals 20.In one embodiment, described cycle-index is 8 bit binary data, and described start frame is 4 bit binary data, and described length of the cycle is 4 bit binary data.
Fig. 3 is the drive control module 200 structural representation block diagram in one embodiment among the present invention, and it can be as the drive control module 110 of the led drive circuit among Fig. 1.See also shown in Figure 3ly, described drive control module 200 comprises respectively and N N the output driver element that output module is corresponding, be respectively the first output driver element 210, the second output driver element 220 ... with N output driver element 230.When the corresponding control bit in command register represented autonomous PWM drive pattern, described output driver element obtained corresponding channel data in described memory module 130, and produces accordingly pwm signal to drive corresponding output module.When the corresponding control bit in command register represented outside PWM drive pattern, described output driver element received the channel data of external interface input, and produces accordingly pwm signal to drive corresponding output module.
Fig. 4 is an output driver element 400 structural representation block diagram in one embodiment of the control module among the present invention, and it can be as the arbitrary output driver element among Fig. 3.See also shown in Figure 4ly, described output driver element 400 comprises micro-control unit 410, data storage cell 420, date read-write cell 430 and pwm signal generating unit 440.
Described micro-control unit 410 is determined the PWM drive pattern according to the corresponding control bit in the command register.When autonomous PWM drive pattern, described micro-control unit 410 notifies described date read-write cell 430 from reading corresponding channel data in the described memory module to described data storage cell 420, described micro-control unit 410 produces the PWM data according to the channel data in the described data storage cell 420 subsequently, and described pwm signal generating unit 440 produces pwm signal to drive corresponding output module according to described PWM data.Externally during the PWM drive pattern, described micro-control unit 410 notifies described date read-write cell 430 to read modulating data to described data storage cell 420 from external interface, described micro-control unit 410 produces the PWM data according to the modulating data in the described data storage cell 420 subsequently, and described pwm signal generating unit 440 produces pwm signal to drive corresponding output module according to described PWM data.
Fig. 5 is the schematic diagram of the workflow 500 in one embodiment of the output driver element 400 shown in Fig. 4, and it has mainly reflected the workflow of described output driver element 400 when autonomous PWM drive pattern.
Described micro-control unit 410 is determined after prepass is in autonomous PWM drive pattern according to the corresponding control bit in the command register, described flow process enters step 510, described date read-write cell 430 reads the control data of respective channel in the described memory module, and described control data comprise start frame, length of the cycle and cycle-index.
Step 520, described date read-write cell 430 reads the start frame data of respective channel, and described start frame data comprise starting point PWM data, terminal point PWM data, brightness hopping amplitude and brightness duration T.
Step 530, described micro-control unit 410 produces PWM data according to described starting point PWM data.In one embodiment, described starting point PWM data itself are exactly PWM data.In another embodiment, if starting point PWM data are 5 bit binary data, can mend 0 with rear 3 and form complete PWM data.
Step 540, described pwm signal generating unit 440 produces pwm signal based on described PWM data.In one embodiment, suppose that the PWM data are 8, such as being 00000100, then described pwm signal generating unit 440 can be 8/255 pwm signal according to duty ratio of described 8 PWM data generation, and this pwm signal is a square-wave signal.The lasting duration of each pwm signal is relevant with the PWM exponent number with clock frequency, if fundamental clock is 500Khz, realizes the pwm signal on 256 rank, and the duration of each pwm signal approximately is 500us so.Described pwm signal is used for driving corresponding output module.
Step 550, described micro-control unit 410 judge that time that current pwm signal continues whether more than or equal to described brightness duration T, if so, then enters step 560, otherwise, then return step 540, continue to produce pwm signal based on described PWM data.
Step 560, described micro-control unit 410 is judged whether overstep of end point PWM data of current PWM data, if, then enter step 570, otherwise, then return step 530, in starting point PWM data during less than terminal point PWM data, described micro-control unit 410 continuation produce PWM data after current PWM data are increased progressively the brightness hopping amplitude, and continuation repeats abovementioned steps, in starting point PWM data during greater than terminal point PWM data, described micro-control unit 410 continues current PWM data are successively decreased and produces PWM data behind the brightness hopping amplitude, and continue to repeat abovementioned steps, and described PWM data surpass take the brightness hopping amplitude as the step-length increasing or decreasing when setting terminal point PWM data, and the PWM data can be clamped at terminal point PWM data place.In starting point PWM data during less than terminal point PWM data, current PWM data are more than or equal to terminal point PWM data representation overstep of end point PWM data, during greater than terminal point PWM data, current PWM data are less than or equal to terminal point PWM data representation overstep of end point PWM data in starting point PWM data.
Step 570, described micro-control unit 410 will be processed frame number and add 1, and whether judge the described frame number of having processed more than or equal to described length of the cycle, the described frame number initial value of having processed is 0, if, then will process frame number and reset to 0, and enter step 580, otherwise, step 520 then returned, described date read-write cell 430 reads the next frame data of respective channel, proceeds the repetition abovementioned steps.
Step 580, described micro-control unit 410 cycle-index adds 1, and judge that whether described cycle-index is more than or equal to described cycle-index, the described frame number initial value that circulated is 0, if so, and process ends, otherwise, then return step 520, described date read-write cell 430 reads the start frame data of respective channel, proceeds the repetition abovementioned steps.
Described output driver element 400 is the workflow during the PWM drive pattern externally, also can be with reference to flow process shown in Figure 5, the various PWM type of drive that technical staff in equally also can general field can know, such as the PWM data of inputting one 8 from the outside at every turn, described pwm signal generating unit 440 produces pwm signal based on described PWM data, input for another example a frame of each frame data the channel data that is similar in the memory module from the outside at every turn, every frame data comprise starting point PWM data equally, terminal point PWM data, brightness hopping amplitude and brightness duration, described output driver element 400 produces a series of pwm signals according to these frame data.
Fig. 6 is an output module 600 circuit diagram in one embodiment of the led drive circuit among the present invention, and described output module 600 can be as any one output module among Fig. 1.Described output module 600 comprises operational amplifier OA, switching device SW1, efferent duct M1 and resistance R 1.The output of described operational amplifier OA links to each other with the grid of described efferent duct M1 via described switching device SW1, the source electrode of described efferent duct M1 links to each other with an end of described resistance R 1, the other end ground connection of described resistance R 1, the drain electrode of described efferent duct M1 outwards provides output current as the output of described output module 600, the normal phase input end of described operational amplifier OA meets reference voltage V ref, the source electrode of the described efferent duct M1 of anti-phase input termination, the turn-on and turn-off of described switching device SW1 are controlled by pwm signal, such as conducting when pwm signal is high level, when low level, end.According to circuit theory as can be known, when always conducting of switching device SW1, then the electric current I out on the efferent duct M1 is: Iout=Vref/R1.Adjust by the duty ratio to pwm signal, can make the electric current on the efferent duct M1 between 0 to Iout=Vref/R1, carry out 2
LContrast is whole.
When autonomous PWM drive pattern, can produce the pwm signal of a series of change in duty cycle according to the respective channel data of storing in the memory module, can so that the LED that efferent duct M1 drives produces the continuous variation of brightness or color, produce splendid brilliant lighting effects.Every frame data can make LED produce a kind of lighting effects, and M frame data circulations is combined into and can develops more fluorescent tube effect.In one embodiment, if every frame data of each channel data are 2byte, the control data of each channel data are 2byte, M=16, so every channel data only occupies the memory space of 34byte, and the data by this 34 byte can develop and very many fluorescent tube combination of effects.
Fig. 7 is an output module 700 circuit diagram in one embodiment of the led drive circuit among the present invention, and described output module 700 equally can be as any one output module among Fig. 1.Described output module 700 among Fig. 7 is basic identical with the output module 600 among Fig. 6, difference is: the resistance R 1 among Fig. 7 is adjustable resistance, can adjust by the resistance selection signal, reference voltage among Fig. 7 is provided by the Multi-path reference voltage unit, and signal selected normal phase input end of exporting to operational amplifier from a plurality of different reference voltages can be selected according to reference voltage in described Multi-path reference voltage unit.Select the output current that signal and resistance selection signal can fine adjustment efferent duct M1 by the Joint regulation reference voltage.
Separately regulating resistance R1 and reference voltage can change the drive current of efferent duct M1, but shortcoming is arranged, and regulate separately reference voltage, and be very thin if voltage is got, and when the input offset voltage of amplifier was larger, meticulous reference voltage did not have much meanings.Regulating resistance R1, because generally, resistance R 1 is less, precision is higher, if added switching device, then affects the precision of resistance R 1, but in the situation of little electric current, can select larger resistance R 1 this moment, the impact of switching device just can be little a lot.Resistance R 1 regulated and reference voltage is regulated both and combined, can effectively improve the precision of electric current.In one embodiment, can realize such as 4 kinds of reference currents, being respectively the multiple reference current of efferent duct M1: 10mA, 20mA, 30mA, 40mA by the selection of regulating resistance R1 and a plurality of reference voltages.
Reference voltage selects signal and resistance selection signal to be provided by the output driver element of correspondence.Described efferent duct M1 can be nmos pass transistor.
Above the present invention has been carried out enough detailed description with certain particularity.Under those of ordinary skill in the field should be appreciated that the description among the embodiment only is exemplary, under the prerequisite that does not depart from true spirit of the present invention and scope, make change and all should belong to protection scope of the present invention.The present invention's scope required for protection is limited by described claims, rather than limited by the foregoing description among the embodiment.
Claims (9)
1. led drive circuit, it is characterized in that: it comprises:
Output module;
Memory module, it stores the channel data of described output module, described channel data includes multiframe data and control data, every frame data include starting point PWM data, terminal point PWM data, brightness hopping amplitude and brightness duration, and described control data comprise start frame, length of the cycle and cycle-index;
Drive control module produces pwm signal according to described frame data and control data, and described output module produces output current under the driving of pwm signal.
2. led drive circuit as claimed in claim 1, it is characterized in that described output module is N, described memory module stores corresponding a channel data for each output module, every part of channel data all includes M frame data and control data, and wherein N and M are the natural number greater than 1.
3. led drive circuit as claimed in claim 2 is characterized in that,
Described drive control module includes command register, each output module is configured with two kinds of drive patterns, the first drive pattern is outside PWM drive pattern, the second drive pattern is autonomous PWM drive pattern, described command register is deposited as each output module 1 control bit is set,, described control bit just can control the drive pattern of each output module by being set
When an output module was autonomous PWM drive pattern, described drive control module obtained channel data corresponding to this output module in described memory module, and produced pwm signal to this output module according to described channel data; When an output module was outside PWM drive pattern, described drive control module received the channel data of this output module from external interface, and produced pwm signal to this output module according to described channel data.
4. led drive circuit as claimed in claim 3 is characterized in that,
Described drive control module comprises the N corresponding with each output module output driver element, when autonomous PWM drive pattern, described output driver element obtains corresponding channel data in described memory module, and produce accordingly pwm signal to drive corresponding output module, externally during the PWM drive pattern, described output driver element receives the channel data of external interface input, and produces accordingly pwm signal to drive corresponding output module.
5. such as the arbitrary described led drive circuit of claim 1-4, it is characterized in that,
Described output module comprises operational amplifier, switching device, efferent duct and resistance,
The output of described operational amplifier links to each other with the grid of described efferent duct via described switching device, the source electrode of described efferent duct links to each other with an end of described resistance, the other end ground connection of described resistance, the drain electrode of described efferent duct is as the output of described output module, the normal phase input end of described operational amplifier connects reference voltage, the source electrode of the described efferent duct of anti-phase input termination, the turn-on and turn-off of described switching device are controlled by pwm signal.
6. led drive circuit as claimed in claim 5 is characterized in that,
Described resistance is adjustable resistance, adjusts by the resistance selection signal, and described reference voltage selects signal selected from a plurality of different reference voltages by the Multi-path reference voltage unit according to reference voltage.
7. such as the arbitrary described led drive circuit of claim 1-4, it is characterized in that,
Described drive control module can generate a pwm signal according to the starting point PWM data of frame data, and this pwm signal will be as the first rank pwm signal that carries out the PWM modulation according to these frame data;
Described drive control module can generate a pwm signal according to the described terminal point PWM data of frame data, and this pwm signal will be as the tail rank pwm signal that carries out the PWM modulation according to these frame data;
The described brightness duration represents the time that every rank pwm signal continues;
The duty ratio of described brightness skip frame degree long expression current rank pwm signal and lower single order pwm signal poor.
8. led drive circuit as claimed in claim 7, it is characterized in that, in starting point PWM data during less than terminal point PWM data, the duty ratio of described pwm signal will increase progressively take the brightness hopping amplitude as step-length, during greater than terminal point PWM data, the duty ratio of described pwm signal is successively decreased take the brightness hopping amplitude as step-length in starting point PWM data.
9. led drive circuit as claimed in claim 8 is characterized in that,
The start frame of described control data represents the start frame data of this PWM modulation, and described length of the cycle represents the number of the frame data of this PWM modulation, and described cycle-index represents the cycle-index of this PWM modulation.
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| CN106374727A (en) * | 2016-10-08 | 2017-02-01 | 北京精密机电控制设备研究所 | High-reliability IGBT (Insulated Gate Bipolar Transistor) parallel control device |
| CN111433165A (en) | 2017-11-28 | 2020-07-17 | 康宁股份有限公司 | High liquidus viscosity bioactive glass |
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