CN101937014B - Adaptive current detection circuit applied to wide-conversion ratio boost converter - Google Patents

Abstract

The invention belongs to the technical field of integrated circuits, in particular to an adaptive current detection circuit applied to a wide-conversion ratio boost converter. The circuit comprises a single-period double-sampling circuit, a reference level generating circuit and an adaptive gain circuit, wherein the single-period double-sampling circuit is used for generating two sampling signals, namely an inductive current signal and an output voltage signal, and providing the signals for the self-adaptive gain circuit; the reference level generating circuit is used for generating a reference level and providing the reference level for the self-adaptive gain circuit; and the adaptive gain circuit generates a needed inductive current sampling signal which is adaptive to the output voltage by using the signals provided by the single-period double-sampling circuit and the reference level generating circuit. The adaptive current detection circuit avoids a method for implementing different conversion ratios by selecting an off-chip compensating network. Therefore, the adaptive current detection circuit has the advantages of making the compensating network become simple and integrated inside a chip, reducing the number of off-chip elements, meeting the requirement on portability, reducing the cost and having good application prospect.

Description

A kind of adaptive electro current detection circuit that is applicable to wide conversion than booster converter

Technical field

The invention belongs to technical field of integrated circuits, be specifically related to a kind of wide conversion than voltage boosting dc-DC converter.

Background technology

DC-DC converter (DC-DC Converter) is widely used in the various electronic systems, particularly based on the DC-DC converter of inductive type, owing to the advantage that its efficient is high, the output current ability is big, uses the widest.Relation according to transducer input voltage and output voltage can be divided into voltage-dropping type (BUCK), booster type (BOOST) and buck-boost type (BUCK-BOOST).Wherein boost converter is used to promote supply voltage the various circuit modules of higher pressure power supply that need is supplied power.For example in the display screen of some handheld devices, the LED-backlit lamp of 4 series connection probably needs 12 volts voltage, and the output voltage of general battery has only 2.7V ~ 5.5V.This acts in collusion to make each other's confessions to LED after just needing boost converter that cell voltage is promoted.And in same application system, have the different voltages with different needs, the transducer of a wide conversion ratio will reduce the complicacy of system.

The BOOST code converter mainly is made up of power level and controlled stage.Power level mainly is made up of input filter capacitor, power inductance, power switch pipe, fly-wheel diode and output filter capacitor.Controlled stage mainly constitutes feedback system by corrective network, PWM modulator etc., makes output voltage keep constant.

The BOOST code converter comprises the zero point of two limits and a RHP in the transition function of its power level; Make under traditional voltage control model and current control mode; Corrective network is more complicated than BUCK type, and is difficult under a wide conversion ratio, keep system stability and good transient response.Common product all is to be employed in different conversions than realizing through the outer method of different corrective networks of selecting of sheet down, makes corrective network to become at chip integration, has increased the quantity of the outer original paper of sheet, has improved cost.In the BOOST circuit,, make sluggish control directly to be used in addition because its output current is discontinuous.Thereby improve existing control method, and adopt new control technology to design the BOOST code converter, have stronger learning value and good application potential.

Summary of the invention

The objective of the invention is to be to propose a kind of new adaptive electro current detection circuit of wide conversion that be applicable to than voltage boosting dc-DC converter; When guaranteeing system stability and good transient response; Do not need the off-chip compensation network; The cost of reduction system, the quantity of the outer original paper of minimizing sheet is to meet the requirement of portability.

The present invention proposes is applicable to the adaptive electro current detection circuit of wide conversion than voltage boosting dc-DC converter; Be based on fixedly turn-off time control model; Difference according to output voltage; The sampling gain of adaptively modifying inductive current, thus the system that makes has good stable property and transient response in the working range of a wide conversion ratio, and do not need sheet to select corrective network outward.Realize that this technological circuit comprises: monocycle dual-sampling circuit 1; Reference level produces circuit 2; Gain-adaptive circuit 3.Wherein monocycle dual-sampling circuit 1 is used to produce two sampled signals: inductor current signal and output voltage signal; These two signals offer gain-adaptive circuit 3; Reference level produces circuit 2 and produces a reference level, offers gain-adaptive circuit 3; Gain-adaptive circuit 3 utilizes monocycle dual-sampling circuit 1 and reference level to produce the signal that circuit 2 provides, and produces required and the adaptive inductive current sampled signal of output voltage.

Described monocycle dual-sampling circuit 1 is shown in accompanying drawing 1, and its concrete annexation is: VLX and resistance R ₃The left end of left end and sampling switch 1 link to each other resistance R ₃Right-hand member and the left end and the resistance R of sampling switch 2 ₄The upper end link to each other resistance R ₄The lower end link to each other with the drain terminal of metal-oxide-semiconductor M3, the grid end of metal-oxide-semiconductor M3 links to each other with ground with the drain terminal of M3 respectively with the source end.The right-hand member of sampling switch 2 and capacitor C ₂The upper end link to each other capacitor C ₂The lower end link to each other with ground.The right-hand member of sampling switch 1 links to each other resistance R with the left end of resistance R 1 ₁Right-hand member and resistance R ₂Upper end and capacitor C ₁The upper end link to each other resistance R ₂Lower end and capacitor C ₁The lower end all link to each other with ground.Monocycle dual-sampling circuit 1 is output as inductive current sampled signal and output voltage sampled signal.It is that inductive current multiply by its conducting resistance at the drain terminal voltage of power tube when power tube is opened, and this voltage of sampling is first sampled signal as the inductive current sampled signal; When power tube was closed, power tube drain terminal voltage was the pressure drop that output voltage adds diode, and this signal is sampled after treatment to be kept as i.e. second sampled signal of output voltage signal.

Reference level produces circuit 2 shown in accompanying drawing 2, and its concrete annexation is: DC level in the positive input terminal contact pin of amplifier A1, its output terminal links to each other with the grid end of metal-oxide-semiconductor M5, source end and the resistance R of its negative input end and metal-oxide-semiconductor M5 ₅The upper end link to each other R ₅Lower end ground connection.The drain terminal of metal-oxide-semiconductor M5 links to each other with the grid end of metal-oxide-semiconductor M6, M7 and the drain terminal of M6, and the source end of metal-oxide-semiconductor M6, M7 all links to each other with VDD.The drain terminal of metal-oxide-semiconductor M7 and resistance R ₆The upper end link to each other resistance R ₆The lower end link to each other with the drain terminal of metal-oxide-semiconductor M4, the grid end of metal-oxide-semiconductor M4 links to each other with ground with the drain terminal of M4 respectively with the source end.Monocycle dual-sampling circuit 1 is output as inductive current sampled signal and output voltage sampled signal.It is a reference level at its output signal.It will select a suitable output voltage as reference voltage in output voltage range, and generation is normalized reference level with monocycle dual-sampling circuit (1) to output voltage process.

Gain-adaptive circuit 3 is shown in accompanying drawing 3; Its concrete annexation is: positive input termination first sampled signal of amplifier A2; Its output terminal links to each other with the grid end of metal-oxide-semiconductor M10; Its negative input end links to each other with the source end of metal-oxide-semiconductor M10 and the drain terminal of metal-oxide-semiconductor M1, and the grid end of metal-oxide-semiconductor M1 and source end connect reference level and ground respectively.The drain terminal of metal-oxide-semiconductor M10 links to each other with the grid end of metal-oxide-semiconductor M8, M9 and the drain terminal of M8, and the source end of metal-oxide-semiconductor M8, M9 all links to each other with VDD.The drain terminal of metal-oxide-semiconductor M9 links to each other with the drain terminal of metal-oxide-semiconductor M2, and the grid end of metal-oxide-semiconductor M2 and source end connect second sampled signal and ground respectively.The output signal of gain-adaptive circuit 3 is and the adaptive inductive current sampled signal of output voltage.It produces the signal that circuit 2 provides according to monocycle dual-sampling circuit 1 and reference level, is used to produce the voltage signal that an inductive current sampling gains and output voltage is inversely proportional to.

The present invention proposes is applicable to the adaptive electro current detection circuit of wide conversion than voltage boosting dc-DC converter; Utilize MATLAB to carry out system modelling; Verify the stability of system, and adopted CSMC 0.5um BCD technology to accomplish circuit design, switching frequency 1MHz; The power inductance value is 3.3uH, and output voltage filter capacitor value is 22uF.Utilize the circuit simulating software analog result to show: when input voltage was 5V, output voltage range can reach 5.5V ~ 40V.When input voltage is 5V, output voltage is 15V, and during the step saltus step of output load current from 100mA to 500mA, the response time of this DC-to-dc converter, overshoot voltage was less than 0.05V less than 50us.

The present invention has avoided general booster converter to realize the method for different conversion ratios through selecting different off-chip compensation networks; Simply also can be integrated thereby corrective network is become at chip internal; Reduced sheet exogenesis number of packages amount; Meet the requirement of portability, reduced cost simultaneously, have a good application prospect.

Description of drawings

Fig. 1. self-adaptive current detection technique system assumption diagram and power level synoptic diagram.

Fig. 2. the circuit of monocycle dual-sampling circuit and sequential chart.

Fig. 3. reference level produces the circuit diagram of circuit.

Fig. 4. the circuit diagram of gain-adaptive circuit.

Fig. 5. load 500mA, input voltage are 5V, when output voltage is 5.5V, 15V and 30V, do not adopt system of the present invention Bode diagram.

Fig. 6. load 500mA, input voltage are 5V, when output voltage is 5.5V, 15V and 30V, adopt system of the present invention Bode diagram.

Fig. 7. when input voltage is 5V, part output voltage waveform among output voltage range 5.5V ~ 30V.

Fig. 8. input voltage is 5V, and output voltage is 15V, output current output voltage change curve during the step saltus step of output load current from 100mA to 500mA.

Embodiment

Below in conjunction with accompanying drawing the present invention is further explained.

As shown in Figure 1, the self-adaptive current detection technique structured flowchart of voltage boosting dc-DC converter of mentioning among the present invention realizes that this technological circuit comprises: monocycle dual-sampling circuit 1; Reference level produces circuit 2; Gain-adaptive circuit 3.

As shown in Figure 2; Figure (2.a) is monocycle dual-sampling circuit figure; Figure (2.b) is monocycle dual-sampling circuit figure, and monocycle dual-sampling circuit 1 is used to produce two sampled signals: inductor current signal and output voltage signal, these two signals offer gain-adaptive circuit 3.It produces two sampling pulses according to pwm control signal, and the drain terminal voltage signal to power tube carries out sampling processing respectively.The drain terminal voltage of power tube is that inductive current multiply by its conducting resistance when power tube is opened, and this voltage of sampling is first sampled signal as the inductive current sampled signal; When power tube was closed, power tube drain terminal voltage was the pressure drop that output voltage adds diode, and this signal is sampled after treatment to be kept as i.e. second sampled signal of output voltage signal.Wherein first sampled signal, second sampled signal can be expressed as respectively:

$V_{\mathrm{sample}1}=\frac{R_1}{{\mathrm{<figure-callout\; id="2"\; label="R"\; filenames="HSA00000218925500011.png"\; state="\{\{state\}\}">R</figure-callout>}}_2+R_1}{I}_L\&times;R_{\mathrm{on}};$

$V_{\mathrm{<figure-callout\; id="2"\; label="sample"\; filenames="HSA00000218925500011.png"\; state="\{\{state\}\}">sample</figure-callout>}2}=\frac{R_3}{R_4+R_3}(V_{\mathrm{VLX}}-V_{\mathrm{ds}\_M3})+V_{\mathrm{ds}\_\mathrm{<figure-callout\; id="3"\; label="M"\; filenames="HSA00000218925500011.png,HSA00000218925500022.png"\; state="\{\{state\}\}">M</figure-callout>}3}\&ap;\frac{R_3}{R_4+R_3}{V}_{\mathrm{VLX}}+V_{\mathrm{ds}\_\mathrm{<figure-callout\; id="3"\; label="M"\; filenames="HSA00000218925500011.png,HSA00000218925500022.png"\; state="\{\{state\}\}">M</figure-callout>}3}$

R wherein ₁~ R ₄Be divider resistance, I _LBe inductive current, R _OnBe power tube conducting resistance, V _VLXIts drain terminal voltage when turn-offing for power tube, V _{Ds_M3}The source-drain voltage of the metal-oxide-semiconductor M3 that connects for diode is poor.

As shown in Figure 4, output be a reference level that produces according to the second sampled signal expression formula by an output voltage V M through suitable selection.But this circuit is not directly handled voltage VM, but an already present DC level (for example bandgap voltage reference) produces a reference level of equivalence in the selection sheet through computing.It comprises: operational amplifier, resistance and the metal-oxide-semiconductor that diode connects.Reference level can be expressed as:

$V_F=\frac{R_3}{R_4+R_3}{V}_M+V_{\mathrm{ds}\_M4}$

V wherein _{Ds_M4}The source-drain voltage of the metal-oxide-semiconductor M4 that connects for diode is poor.

As shown in Figure 5, in gain-adaptive circuit 3, produce inductive current sampling gain with the adaptive voltage signal of output voltage according to first sampled signal, second sampled signal and base-level signal.Metal-oxide-semiconductor M1 is operated in linear zone with M2 and has identical breadth length ratio, but its conducting resistance approximate representation is:

$R_L=\frac{1}{\mathrm{\&beta;}\frac{W}{L}(V_{\mathrm{gs}}-V_{\mathrm{th}})}=\frac{k}{(V_{\mathrm{gs}}-V_{\mathrm{th}})}$

Wherein k is the coefficient by technology and pipe sizing decision, V _GsFor the grid source voltage terminal poor, V _ThBe threshold voltage.

Produce in the circuit in monocycle dual-sampling circuit 1 and reference level, be in metal-oxide-semiconductor M3 that diode connects and M4 breadth length ratio much larger than metal-oxide-semiconductor M1 and M2 in gain-adaptive circuit 3, but the breadth length ratio of four each unit of metal-oxide-semiconductor is identical.The electric current that while metal-oxide-semiconductor M3 and M4 flow through is extremely low.Can get thus:

V _{ds_M3}≈V _{ds_M4}≈V _{th_M1}≈V _{th_M2}＝V _th；

$R_{M1}=\frac{k}{(V_F-V_{\mathrm{th}})}=\frac{k}{\frac{R_3}{R_4+R_3}{V}_M};$

${\mathrm{<figure-callout\; id="2"\; label="R\; M"\; filenames="HSA00000218925500011.png"\; state="\{\{state\}\}">R</figure-callout>}}_M=\frac{k}{(V_{\mathrm{sample}2}-V_{\mathrm{th}})}=\frac{k}{\frac{R_3}{R_4+R_3}{V}_{\mathrm{VLX}}};$

R wherein _M1.R _M2The conducting resistance of expression metal-oxide-semiconductor M1, M2.

Thereby in gain-adaptive circuit (3), its output signal can be expressed as:

$V_{\mathrm{sen}}=\frac{R_1}{{\mathrm{<figure-callout\; id="2"\; label="R"\; filenames="HSA00000218925500011.png"\; state="\{\{state\}\}">R</figure-callout>}}_2+R_1}{I}_L\&times;R_{\mathrm{on}}\&times;\frac{V_M}{V_{\mathrm{VLX}}}\&Proportional;I_L\&times;\frac{V_M}{V_{\mathrm{VLX}}}$

As shown in Figure 6, load 500mA, input voltage are 5V, when output voltage is 5.5V, 15V and 30V, do not adopt system of the present invention Bode diagram.The phase margin of system is respectively 28.7 °, 59.5 ° and 48.2 °, can find out that at output voltage be 5.5V, and system phase nargin is too small, can't steady operation; And when output voltage was 30V, system phase nargin was excessive, can cause the slower result of transient response again.

As shown in Figure 7, load 500mA, input voltage are 5V, when output voltage is 5.5V, 15V and 30V, do not adopt system of the present invention Bode diagram.The phase margin of system is respectively 60.6 °, 69.3 ° and 63.4 °, can find out that system all has enough stable and more suitable phase margin.Verified validity of the present invention from system.

As shown in Figure 8, when figure (8.a) input voltage is 5V, output voltage range 5.5V under the stable state ~ 30V middle part component voltage value oscillogram.Figure (8.b) input voltage is when being 5V, and transient response figure under the part output voltage among output voltage range 5.5V ~ 30V can find out under all output situation under the stable state, and system has good stable property and transient response preferably.

As shown in Figure 9, input voltage is 5V, and output voltage is 15V, output current output voltage change curve during the step saltus step of output load current from 100mA to 500mA.The response time that can find out it is less than 50us, overshoot or under-voltage less than 50mV.

The wide conversion that is applicable to that the present invention mentions designs than the self-adaptive current detection technique employing CSMC0.5um BCD process conditions of voltage boosting dc-DC converter, switching frequency 1MHz, and the power inductance value is 3.3uH, output voltage filter capacitor value is 22uF.Utilize the circuit simulating software analog result to show: when input voltage was 5V, output voltage range can reach 5.5V ~ 30V.When input voltage is 5V, output voltage is 15V, and during the step saltus step of output load current from 100mA to 500mA, the response time of this DC-to-dc converter, overshoot voltage was less than 0.05V less than 50us.

The present invention proposes is applicable to the adaptive electro current detection circuit of wide conversion than voltage boosting dc-DC converter; When guaranteeing system stability and good transient response; Do not need the off-chip compensation network, reduce the cost of system, reduce the quantity of the outer original paper of sheet; To meet the requirement of portability, have stronger learning value and good prospects for application.

Claims (5)

1. an adaptive electro current detection circuit that is applicable to voltage boosting dc-DC converter is characterized in that comprising: monocycle dual-sampling circuit (1), reference level generation circuit (2) and gain-adaptive circuit (3); Wherein:

Monocycle dual-sampling circuit (1) is used to produce two sampled signals: inductive current sampled signal and output voltage sampled signal; These two signals offer gain-adaptive circuit (3); Reference level produces circuit (2) and produces a reference level, offers gain-adaptive circuit (3); Gain-adaptive circuit (3) utilizes monocycle dual-sampling circuit (1) and reference level to produce the signal that circuit (2) provides, and produces required and the adaptive inductive current sampled signal of output voltage;

In the described monocycle dual-sampling circuit (1), VLX and resistance R ₃The left end of left end and first sampling switch link to each other resistance R ₃Right-hand member and the left end and the resistance R of second sampling switch ₄The upper end link to each other resistance R ₄The lower end link to each other with the drain terminal of the 3rd metal-oxide-semiconductor (M3), the grid end of the 3rd metal-oxide-semiconductor (M3) links to each other with ground with the drain terminal of the 3rd metal-oxide-semiconductor (M3) respectively with the source end; The right-hand member of second sampling switch and capacitor C ₂The upper end link to each other capacitor C ₂The lower end link to each other with ground; The right-hand member of first sampling switch and resistance R ₁Left end link to each other resistance R ₁Right-hand member and resistance R ₂Upper end and capacitor C ₁The upper end link to each other resistance R ₂Lower end and capacitor C ₁The lower end all link to each other with ground; Wherein, VLX is the drain terminal of power tube;

When power tube was opened, the drain terminal voltage of power tube was that inductive current multiply by its conducting resistance, and this voltage of sampling is first sampled signal as the inductive current sampled signal; When power tube was closed, power tube drain terminal voltage was the pressure drop that output voltage adds diode, and this voltage is sampled after treatment to be kept as i.e. second sampled signal of output voltage sampled signal;

Described reference level produces in the circuit (2), DC level in the positive input terminal contact pin of first amplifier (A1), and its output terminal links to each other with the grid end of the 5th metal-oxide-semiconductor (M5), the source end and the resistance R of its negative input end and the 5th metal-oxide-semiconductor (M5) ₅The upper end link to each other resistance R ₅Lower end ground connection; The drain terminal of the 5th metal-oxide-semiconductor (M5) links to each other with the grid end of the 6th metal-oxide-semiconductor (M6), the 7th metal-oxide-semiconductor (M7) and the drain terminal of the 6th metal-oxide-semiconductor (M6), and the source end of the 6th metal-oxide-semiconductor (M6), the 7th metal-oxide-semiconductor (M7) all links to each other with VDD; The drain terminal and the resistance R of the 7th metal-oxide-semiconductor (M7) ₆The upper end link to each other resistance R ₆The lower end link to each other with the drain terminal of the 4th metal-oxide-semiconductor (M4), the grid end of the 4th metal-oxide-semiconductor (M4) links to each other with ground with the drain terminal of the 4th metal-oxide-semiconductor (M4) respectively with the source end;

In the described gain-adaptive circuit (3); Positive input termination first sampled signal of second amplifier (A2); Its output terminal links to each other with the grid end of the tenth metal-oxide-semiconductor (M10); Its negative input end links to each other with the source end of the tenth metal-oxide-semiconductor (M10) and the drain terminal of first metal-oxide-semiconductor (M1), and the grid end of first metal-oxide-semiconductor (M1) and source end connect reference level and ground respectively; The drain terminal of the tenth metal-oxide-semiconductor (M10) links to each other with the grid end of the 8th metal-oxide-semiconductor (M8), the 9th metal-oxide-semiconductor (M9) and the drain terminal of the 8th metal-oxide-semiconductor (M8); The source end of the 8th metal-oxide-semiconductor (M8), the 9th metal-oxide-semiconductor (M9) all links to each other with VDD; The drain terminal of the 9th metal-oxide-semiconductor (M9) links to each other with the drain terminal of second metal-oxide-semiconductor (M2), and the grid end of second metal-oxide-semiconductor (M2) and source end connect second sampled signal and ground respectively.

2. the adaptive electro current detection circuit that is applicable to voltage boosting dc-DC converter according to claim 1; It is characterized in that: in monocycle dual-sampling circuit (1); Produce two sampling pulses according to pwm control signal, the drain terminal voltage signal to power tube carries out sampling processing respectively; Wherein first sampled signal, second sampled signal are expressed as respectively:

$V_{\mathrm{sample}1}=\frac{R_1}{R_2+R_1}{I}_L\&times;R_{\mathrm{on}};$

$V_{\mathrm{sample}2}=\frac{R_3}{R_4+R_3}(V_{\mathrm{VLX}}-V_{\mathrm{ds}\_M3})+V_{\mathrm{ds}\_M3}\&ap;\frac{R_3}{R_4+R_3}{V}_{\mathrm{VLX}}+V_{\mathrm{ds}\_M3}$

Wherein, R ₁～R ₄Be divider resistance, I _LBe inductive current, R _OnBe power tube conducting resistance, V _VLXIts drain terminal voltage when turn-offing for power tube, V _{Ds_M3}The source-drain voltage of the 3rd metal-oxide-semiconductor (M3) that connects for diode is poor.

3. the adaptive electro current detection circuit that is applicable to voltage boosting dc-DC converter according to claim 2 is characterized in that: produce in the circuit (2) in reference level, output be by a output voltage V through suitable selection _MAccording to the reference level that the second sampled signal expression formula produces, this reference level is expressed as:

$V_F=\frac{R_3}{R_4+R_3}{V}_M+V_{\mathrm{ds}\_M4}$

Wherein, V _{Ds_M4}The source-drain voltage of the 4th metal-oxide-semiconductor (M4) that connects for diode is poor.

4. the adaptive electro current detection circuit that is applicable to voltage boosting dc-DC converter according to claim 3; It is characterized in that: in gain-adaptive circuit (3), produce inductive current sampling gain with the adaptive voltage signal of output voltage according to first sampled signal, second sampled signal and reference level.

5. the adaptive electro current detection circuit that is applicable to voltage boosting dc-DC converter according to claim 1 is characterized in that: in gain-adaptive circuit (3), first metal-oxide-semiconductor (M1) that is in linear zone has identical breadth length ratio with second metal-oxide-semiconductor (M2).

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