CN101923281B - Method for improving fidelity of Si/Ge emitter window graph - Google Patents

Method for improving fidelity of Si/Ge emitter window graph Download PDF

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Publication number
CN101923281B
CN101923281B CN2009100574274A CN200910057427A CN101923281B CN 101923281 B CN101923281 B CN 101923281B CN 2009100574274 A CN2009100574274 A CN 2009100574274A CN 200910057427 A CN200910057427 A CN 200910057427A CN 101923281 B CN101923281 B CN 101923281B
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emitter
window
end portions
split
domain
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CN101923281A (en
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王雷
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Shanghai Huahong Grace Semiconductor Manufacturing Corp
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Shanghai Hua Hong NEC Electronics Co Ltd
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Abstract

The invention discloses a method for improving the fidelity of a Si/Ge emitter window graph, which comprises the following steps of: 1, designing a Si/Ge emitter window layout, namely (1) cutting a rectangular graph into three parts along a long axis direction in a central symmetry mode, allowing two end parts to have the same size, and allowing the rest part to be a middle part; (2) setting rational intervals between each of the two cut end parts and the middle part; (3) cutting the two end parts into a plurality of structures with holes at certain intervals; and (4) treating the middle part, namely splitting the middle part into a plurality of sets with graphs at certain intervals, or maintaining a whole rectangular structure without splitting; and 2, performing optical proximity correction by adopting the Si/Ge emitter window layout designed by the step 1, and forming a graph approximate to a square by utilizing a principle that a side lobe is generated when a hole of the layout is overexposed.

Description

Improve the method for Si/Ge emitter-window anti-aliasing degree
Technical field
The invention belongs to the manufacturing process field of Si/Ge device in the semiconductor manufacturing, be specifically related to the optical approach modification method in the Si/Ge device photoetching process, relate in particular to a kind of method of the Si/Ge of raising emitter-window anti-aliasing degree.
Background technology
(Si/Ge refers to Si based on Si/Ge xGe 1-xAlloy) semiconductor devices of compound; Utilize the Si/Ge band gap than Si littler and with the characteristics of Si ic process compatibility; It is high-speed and carry out the semiconductor devices of compatibility easily with the Si semiconductor devices be fit to make high integration, is widely used in the high-speed communication field.
In the Si/Ge device; General with Si/Ge as the base; Polysilicon is an emitter, and doped substrate is as collector, and the shape of emitter-window can influence the post-depositional thickness of emitter polycrystalline grid; Si/Ge CONCENTRATION DISTRIBUTION for doping of subsequent transmission utmost point polycrystalline grid and base exerts an influence; Cutoff frequency and amplification coefficient to device have very big influence, the anti-aliasing degree that therefore how to be improved, and it is most important parts in the whole Si/Ge photoetching process that the emitter-window that manufacturing process is obtained approaches design as far as possible.Existing optical approach modification method is often revised through increasing additional patterns, and its effect can not be satisfactory, and especially when size reduced, fidelity was poorer.
Summary of the invention
The technical matters that the present invention will solve provides the optical approach modification method of the anti-aliasing degree of emitter-window in a kind of Si/Ge of raising device.
For solving the problems of the technologies described above, the present invention provides a kind of method of the Si/Ge of raising emitter-window anti-aliasing degree, comprises the steps:
Step 1, design Si/Ge emitter-window domain; Step 1 specifically comprises:
(1) symmetry is cut to three parts at long axis direction with figure along the center with a rectangular graph, the identical size of two end portions wherein, and all the other are center section;
(2) two end portions that cuts out and center section are provided with a rational spacing;
(3) with the two end portions cutting be the structure of several apertures at regular intervals;
(4) at last the centre is partly handled, can be split as the group of several figures at regular intervals, or keep a whole rectangular configuration not split;
Step 2 adopts the Si/Ge emitter-window domain of step 1 design to carry out the optical approach correction, can produce the principle of secondary lobe when utilizing the aperture overexposure of said domain, makes it final formation and is similar to square figure.
Can increase following steps between step (3) and the step (4): add that at the aperture place at the edge of said two end portions the additional patterns that improves the anti-aliasing degree carries out the fidelity correction.
Described additional patterns is serif structure or hammehead structure.
The described center section of step (4) can keep a whole rectangular configuration not split, and perhaps is split as two rectangular configuration at regular intervals, or is split as the combination of a plurality of apertures at regular intervals.
Compare with prior art, the present invention has following beneficial effect: can improve the anti-aliasing degree of emitter-window in the Si/Ge device, thereby reduce because the cutoff frequency of the Si/Ge device that the emitter-window change in shape causes and the variation of amplification coefficient.
Description of drawings
Fig. 1 is the design cycle synoptic diagram of emitter-window domain of the present invention;
Fig. 2 is an emitter-window lithographic results simulation drawing; Fig. 2 (A) is traditional emitter-window lithographic results simulation drawing; Fig. 2 (B) is one of emitter-window lithographic results simulation drawing of the present invention (center section does not split), and Fig. 2 (C) is one of emitter-window lithographic results simulation drawing of the present invention (center section fractionation).
Embodiment
Below in conjunction with accompanying drawing and embodiment the present invention is done further detailed explanation.
The invention provides a kind of optical approach modification method of the Si/Ge of raising emitter-window anti-aliasing degree; Mainly utilize a series of aperture figures to form Si/Ge emitter-window domain; Utilize more little rectangle to produce the more little optical approach effect principle of radius-of-curvature of corner rounding (corner slynessization), the principle that too small spacing of while can't form images is split as aperture to bigger rectangle; Corner rounding is less in the exposure back; Figure more approaches domain, simultaneously the intermediate section open region can be after exposure because lack of resolution, and the edge can produce side lobe (secondary lobe during the aperture overexposure; Secondary lobe) effect causes the principle of figure adhesion, makes it final formation and is similar to square figure.
The present invention will be split as three parts shown in Fig. 1 (D) like the represented traditional rectangular emitter-window figure of Fig. 1 (A) according to following method:
(1) symmetry is cut to three parts at long axis direction with figure along the center with figure, the identical size of two end portions wherein, and all the other are center section, see Fig. 1 (B);
(2) two end portions that cuts out and center section are provided with a rational spacing, see Fig. 1 (C);
(3) being the structure of a series of several apertures at regular intervals with the two end portions cutting, seeing Fig. 1 (D), is example with 3 apertures;
(4) can add the additional patterns that improves the anti-aliasing degree at the aperture place at edge, like serif (serif) or tup (hammer head);
(5) at last the centre is partly handled, can be split as combination (two rectangles (seeing Fig. 2 (C)) for example, or be split as the combination of a plurality of apertures, or center section do not split, and forms a whole rectangular configuration (seeing Fig. 2 (B)) of a series of figures.
The present invention can also add comprehensive Mask bias according to demand.Mask bias refers on the true light shield difference of one times of figure and design.Lithographic process window is relevant with mask bias simultaneously, and different mask bias can make process window more optimize.Therefore can increase different mask bias according to the performance of photoetching process in actual the enforcement.General increase and decrease is of a size of 0%~50% of design size.Its embodiment is accomplished the back for all design configuration and on domain, is unified all figures are amplified and dwindle.

Claims (3)

1. a method that improves Si/Ge emitter-window anti-aliasing degree is characterized in that, comprises the steps:
Step 1, design Si/Ge emitter-window domain; Step 1 specifically comprises:
(1) symmetry is cut to three parts at long axis direction with figure along the center with a rectangular graph, the identical size of two end portions wherein, and all the other are center section;
(2) two end portions that cuts out and center section are provided with a rational spacing;
(3) with the two end portions cutting be the structure of several apertures at regular intervals;
(4) at last the centre is partly handled, can be split as two rectangular configuration at regular intervals, or be split as the combination of several apertures at regular intervals, or keep a whole rectangular configuration not split;
Step 2 adopts the Si/Ge emitter-window domain of step 1 design to carry out the optical approach correction, can produce the principle of secondary lobe when utilizing the aperture overexposure of said domain, makes it final formation and is similar to square figure.
2. the method for raising Si/Ge emitter-window anti-aliasing degree according to claim 1; It is characterized in that, increase following steps between step (3) and the step (4): add that at the aperture place at the edge of said two end portions the additional patterns that improves the anti-aliasing degree carries out the fidelity correction.
3. the method for raising Si/Ge emitter-window anti-aliasing degree according to claim 2 is characterized in that described additional patterns is serif structure or hammehead structure.
CN2009100574274A 2009-06-17 2009-06-17 Method for improving fidelity of Si/Ge emitter window graph Active CN101923281B (en)

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CN2009100574274A CN101923281B (en) 2009-06-17 2009-06-17 Method for improving fidelity of Si/Ge emitter window graph

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Application Number Priority Date Filing Date Title
CN2009100574274A CN101923281B (en) 2009-06-17 2009-06-17 Method for improving fidelity of Si/Ge emitter window graph

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CN101923281B true CN101923281B (en) 2012-02-15

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5553273A (en) * 1995-04-17 1996-09-03 International Business Machines Corporation Vertex minimization in a smart optical proximity correction system
CN1447189A (en) * 2002-03-27 2003-10-08 株式会社东芝 Light mark, focusing monitoring method, light exposure monitoring method, and mfg. method of semiconductor device
CN1723416A (en) * 2003-05-26 2006-01-18 富士通株式会社 Picture dimension correcting unit and method, photomask and test photomask
JP2008090073A (en) * 2006-10-03 2008-04-17 Toshiba Corp Method for creating pattern data, method for forming pattern, and program
CN101430502A (en) * 2007-11-07 2009-05-13 夏普株式会社 Method of correcting mask pattern, photo mask, method of manufacturing semiconductor device, and semiconductor device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5553273A (en) * 1995-04-17 1996-09-03 International Business Machines Corporation Vertex minimization in a smart optical proximity correction system
CN1447189A (en) * 2002-03-27 2003-10-08 株式会社东芝 Light mark, focusing monitoring method, light exposure monitoring method, and mfg. method of semiconductor device
CN1723416A (en) * 2003-05-26 2006-01-18 富士通株式会社 Picture dimension correcting unit and method, photomask and test photomask
JP2008090073A (en) * 2006-10-03 2008-04-17 Toshiba Corp Method for creating pattern data, method for forming pattern, and program
CN101430502A (en) * 2007-11-07 2009-05-13 夏普株式会社 Method of correcting mask pattern, photo mask, method of manufacturing semiconductor device, and semiconductor device

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Patentee before: Shanghai Huahong NEC Electronics Co., Ltd.