CN101911696B - 分组比较器 - Google Patents

分组比较器 Download PDF

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CN101911696B
CN101911696B CN2008801237765A CN200880123776A CN101911696B CN 101911696 B CN101911696 B CN 101911696B CN 2008801237765 A CN2008801237765 A CN 2008801237765A CN 200880123776 A CN200880123776 A CN 200880123776A CN 101911696 B CN101911696 B CN 101911696B
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大卫·维布鲁格
布莱恩·克鲁克斯
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Cisco Technology Inc
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Abstract

分组比较器包括匹配分组缓冲器和存储基准分组流的先进先出(FIFO)缓冲器。一旦基准流和候选流中的分组被与匹配分组相匹配，基准流和候选流就被视为同步。之后，两个流被传递通过比较功能，并且结果流被从分组比较器输出。可能的结果流包括在各个流中的分组的全部或所选部分之间的异或(XOR)运算的结果。

Description

分组比较器
本申请要求2008年1月2日提交的美国临时申请No.61/018,596、2008年2月4日提交的美国临时申请No.61/025,888和2008年12月19日提交的美国申请No.12/339,647的权益，这些申请的所有内容通过引用而全部结合于此。
技术领域
本公开涉及用于对两个独立的分组流进行比较的系统和方法。
背景技术
出于这个或那个目的而操纵原始数字数据流(例如，MPEG编码视频等)并不罕见。通常，在稍后的某个时间，对经操纵的数据流应用逆操纵以获得原始数据流。例如，可以独特方式对原始数据流进行封包以供经由选出的电子网络传送。在MPEG视频的情况下，很重要的是下行流MPEG解码器获得原始MPEG兼容数据流以使得可适当地显示想要的视频影像。数据流的中断和差错可能导致丢失分组、引起丢失帧、和/或信号全部丢失。
因此，很重要的是确保对经操纵的数据流进行成功的“去操纵”以使得能够获得原始数据流。
附图说明
图1是根据本发明一实施例的系统的框图；
图2示出了根据本发明一实施例的分组比较器；以及
图3是根据本发明一实施例的用于比较分组的示例处理。
具体实施方式
概述
简而言之，本发明的实施例包括执行以下步骤的系统和方法：将“匹配分组”添加到基准流，接收包括匹配分组的基准流，检测基准流中的匹配分组，检测候选流中的匹配分组，其中，候选流是基准流的经处理版本并且被相对于基准流经过了时间延迟，在基准流和候选流二者中都检测到匹配分组时，将寄存器状态改变为同步状态，当在同步状态中时，对基准流和候选流中的相应个体分组进行相互比较，以及输出指示出比较的结果流。
在一个实施例中，基准流和候选流是运动图像专家组(MPEG)兼容流。结果流可以是若干可能的可能性之一，所述若干可能的可能性包括对各个流中的相应分组的所有部分或不同部分进行异或(XOR)运算的结果，或者包括有关比较结果的信息的合成流。
图1是根据本发明实施例的系统100的框图。本领域技术人员将了解，图1仅仅示出了本发明的一个可能实施例的示例，并且其它实施方式和配置被认为在本发明的范围之内。如图所示，若干数据流10、11、12被提供给功能块150。数据流10、11、12可以是例如MPEG兼容数据流，或者本领域技术人员已知的任何其它格式。功能块150能够执行任意数目的功能，包括但不限于复用和/或组合该若干数据流10、11、12以例如获得组合流15。该组合流15在通常情况下应当承载由各个个体数据流10、11、12代表的相同内容。当然，组合流15对于例如传统MPEG解码器来说可能不具有很大用处，因为这种设备期待接收单个数据流10、11或12而不是其“组合”版本。
为了使组合流15再次有用(至少从例如解码器的角度看有用)，在逆功能块170中向组合流15应用功能块150的逆。逆功能块170优选地能够“逆转”(undo)复用和/或组合(或者对数据流10、11、12执行的其它数据操纵)，并输出原始形式的数据流10、11、12。根据本发明，提供了比较功能来确认数据流10、11或12中的一个给定流与应用功能块150和逆功能块170之前的同一流确实相同。
对于一个可能的功能块150和逆功能块170的描述，参考2008年11月24日提交的题为“Secure Combined Interoperable Multiplexer”的共同待决美国申请No.12/276,839，该申请通过引用而结合于此。该申请描述了分别对应于功能块150和逆功能块170的数字传送格式化器(DTF)和多传送接收器(MTR)。其它类型的功能块和逆功能块可联系本发明的实施例使用。
图2示出了根据本发明一实施例的比较功能块或“分组比较器”200。在优选实施例中，分组比较器200是使用现场可编程门阵列(FPGA)205来实现的，并且该FPGA被配置为对两个单独的分组流(亦即基准流20和候选流22)进行比较并生成与比较相关的统计数据和度量。比较功能优选地通过用户软件应用232来启用和禁用，并且还优选地在该应用的指导之下操作。
在优选实施例中，基准分组流20能够被用作其它处理和输出选路(routing)的源，而不管特定比较功能260的状态和操作如何。当被路由到FPGA 205的其它处理功能或输出时，原始基准分组流20被使得可在未经变更或延迟的情况下用作这些其它处理功能和输出的输入。
基准流20在进入分组比较功能260之前经过分组缓冲器FIFO(和关联控制器)220。分组缓冲器FIFO 220提供分组缓冲器空间来包含至少整一秒钟的基准流。分组缓冲器220优选地由FPGA 205来控制，并且仅接口连接到FPGA。缓冲器220可在FPGA 205内部或外部。
注意，基准流20正常地将比候选流22提前一较短时间运行，这是因为候选流22经受了功能块150和逆功能块170二者。分组缓冲器FIFO220允许将基准流20延迟可变量以使其能够与候选流22同步以供比较。分组缓冲器FIFO 220还提供一时间延迟以供应用在基准流20中找到合适的“匹配分组”250并开始比较处理。
FPGA 205优选地提供寄存器块235，包括匹配分组缓冲器225，以供微处理器230/应用232例如写入匹配分组250的内容。如应用232所指导的，FPGA使用匹配分组250来同步基准流20和候选流22。用于将匹配分组250写入FPGA 205的接口优选地将微处理器230的“字节序(endianness)”性质和分组流通常被认为是并且被视为关于字节的串行数据的事实考虑在内。
FPGA 205提供匹配分组基准掩膜缓冲器226以供在微处理器230上操作的应用软件将“匹配分组基准掩膜”251的内容写入FPGA 205。匹配分组基准掩膜251使得可由FPGA 205执行受应用232控制的通配符匹配。FPGA 205在针对基准流20对匹配分组250进行比较时，可将基准掩膜中的置位比特视为“总是匹配”。匹配分组基准掩膜的默认值是全零比特。基准掩膜优选地具有与匹配分组250相同的长度和字节与比特顺序。基准掩膜中的任意比特或全部比特可由应用置位。为了改变基准掩膜，应用必须将掩膜的全部188字节(即，MPEG兼容分组中的字节数目)写入FPGA 205。
匹配分组250和基准掩膜251可在禁用分组比较器200时以及在启用分组比较器200之后但在应用232指导FPGA 205尝试在基准流20中找到匹配分组250之前，随时由应用写入FPGA 205。如果在FPGA 205正针对匹配分组250搜索基准流20或候选流22的同时匹配分组250或基准掩膜的任意或全部被改变，则分组比较器结果270不被定义。
FPGA 205包括寄存器235以允许应用指导分组比较器200的操作并监视其状态。如上所述，应用被配置为启用和禁用分组比较器200的比较功能。当被禁用时，比较功能优选地既不将状态改变或中断用信号通知应用，也不影响任何输入或输出。FPGA寄存器块235可提供控制标志以供应用232在分组比较器200被启用之后开始分组比较处理。
当从禁用状态转变到启用状态时，FPGA 205优选地丢弃分组缓冲器FIFO 220的所有在前内容并重置分组比较器200。启用和重置分组比较器200的处理优选地既不改变匹配分组缓冲器225的内容也不改变基准掩膜251的内容。
在分组比较器200被启用并被重置之后，FPGA 205使得基准流20能够传递到分组缓冲器220中。该状态被用信号通知给分组比较器状态寄存器235中的应用。FPGA 205优选地在应用指导其尝试在基准流20中找到匹配分组250之前不做那样的尝试。当处在这种状态中时，分组缓冲器220按需通过打包来丢弃旧的分组以为来自基准流20的新分组腾出空间。FPGA 205优选地不退出该状态，直到发生以下事件的至少一个为止：
●分组比较器200被禁用
●应用232指导FPGA 205找出基准流20中的匹配分组250。
当受到应用232的适当指导时，在考虑到允许应用232对匹配分组250与基准流分组20的指定部分进行通配符匹配的匹配分组基准掩膜的情况下，FPGA 205开始尝试找出基准流20中的匹配分组250。该状态被用信号通知给分组比较器状态寄存器235中的应用。当处在这种状态中时，分组缓冲器220继续存储传入的基准流分组并按需打包以容纳传入分组。分组缓冲器220可受基准流控制块240控制。
应用随后向FPGA 205指定要针对匹配分组250进行比较的基准流分组的最大数目。该值例如被存储在32比特的寄存器中。根据本发明一实施例的实现方式，寄存器中的零值向FPGA 205指示出可搜索无限数目的分组。如果超出搜索分组的最大数目，则FPGA 205更新其比较功能状态寄存器235以将匹配失败用信号通知给应用。FPGA 205优选地能够在匹配成功或匹配失败时生成针对应用的中断。
当在基准流中定位到匹配分组250时，FPGA 205随后将其自身配置为在候选流22中搜索匹配的基准分组。分组缓冲器220优选地贯穿整个处理持续存储传入基准流分组。状态寄存器235可向应用指示出该新处理状态、同步状态。FPGA 205将匹配的基准分组写入位于寄存器块235中的FIFO读寄存器，以允许应用读回该匹配的基准流分组。
应用232可向FPGA 205指定在找到匹配之前要比较的候选流分组的最大数目。该最大数目受限于分组缓冲器FIFO 220中能够包含的分组的数目，但是应用232可选择指定更小的数目。如果比较算法超出该数目，则分组缓冲器220将不再包含来自基准流20的匹配基准分组。如果比较了候选分组的最大数目而没有找到匹配，则状态寄存器235优选地向应用指示出匹配失败，并且比较功能停止处理直到被禁用并被重新启用为止。当FPGA 205在候选流20中定位到匹配的基准分组时，FPGA开始以候选流比特速率排放(drain)基准流分组缓冲器FIFO 220，并从位于各个流中的匹配分组起，开始比较两个流之间的分组(在块260)。比较功能状态寄存器235可将匹配成功用信号通知应用。FPGA 205优选地被配置为在匹配失败或匹配成功的情况下生成针对应用的中断。FPGA 205还优选地提供一对寄存器以供应用读取基准流20和候选流22之间的在分组方面的等待延迟(latency delay)。第一寄存器提供在进入到同步状况时观察到的等待，第二寄存器提供在同步状况(即，比较)期间的实时等待。
比较功能260优选地对基准流20和候选流22执行逐比特的比较。在基准流20和候选流22比较已经开始以后，即，基准流分组缓冲器220已被使能排放之后，FPGA比较功能260对经比较分组的总数和失配分组的总数进行计数。应用随时可读取包含这些值的寄存器。寄存器在受到应用指导而要重置的同时被调整归零。
FPGA 205在连续的失配分组的数目达到应用指定的水平时中断应用232。应用232优选地被配置为随时重置连续失配分组计数器。在出现良好的分组匹配时，计数器被重置为零。应用还优选地能够随时读取连续失配分组的计数。应用还优选地能够启用和禁用中断信号。事件发生优选地通过状态比特来标志，而不论中断启用/禁用设定如何。
一旦比较器200已经使两个流同步，其就生成代表比较结果的比特流270。存在若干可能的结果比特流，应用随时可选择其中的任意一个。优选地以候选流比特速率来发送比较结果。
应用232优选地能够指定对适配字段(adaptation field)比较进行抑制。如果适配字段比较被抑制，则在所比较的分组二者都包含适配字段并且进一步地适配字段具有相同大小的情况下，适配字段的内容可被视为匹配。适配字段抑制影响在同步状态期间的候选和基准匹配，并且影响在比较状态中进行的比较。换而言之，在FPGA 205在同步状态期间尝试在候选流中找出匹配分组时，如果匹配分组包含适配字段，则在匹配分组中的适配字段与候选流分组中找到的适配字段具有相同大小的情况下，候选流中的适配字段的内容被视为是满意的匹配。
分组比较器结果比特流
可能的结果比特流包括：
A.基准流20与候选流22的分组有效载荷的XOR。优选地从基准流20中取出完整的分组头部。
B.基准流20与候选流22的有效载荷和除分组头部同步字节之外的头部的XOR。优选地从基准流20取出MPEG分组同步字节(0x47)。该输出流变量优选地包括在任意片段的失配输出数据前后的至少两(2)个分组的基准流上下文，以帮助识别失配是在何地和何时发生的。所包括的基准流上下文数据优选地不延伸输出流270的长度。如果在失配片段之间存在少于四个匹配分组，则输出流270可以包含匹配结果而不是基准分组。
C.基准流20和候选流22的有效载荷和头部的XOR。从该输出格式不符合MPEG-2分组结构的意义上讲，这是“不兼容”输出。该输出流变量包括在任意片段的失配输出数据前后的至少两(2)个分组的基准流上下文，以帮助识别失配是在何地和何时发生的。所包括的基准流上下文数据优选地不延伸输出流270的长度。如果在失配片段之间存在少于四个匹配分组，则输出流270可以包含匹配结果而不是基准分组。
D.经同步的输出流包括记录了取代原始有效载荷的匹配结果的分组。分组头部是从包括可能存在的任何适配字段的基准流复制而来的。各分组有效载荷例如可包括：
match_information_descriptor{
  tag＝0xff             8     uimsbf
  descriptor_length     8     uimsbf
  Packet number         32    uimsbf   到比较此分组之时为止所
                                       比较的分组的总数
  Sync byte mismatch    1     bslbf    如果同步字节未能匹配则
                                       为1
  TEI mismatch          1     bslbf
  PUSI mismatch         1     bslbf
  Priority mismatch     1     bslbf
  Scramble mismatch     1     bslbf
  Adaptation mismatch   1     bslbf
  CC mismatch         1    bslbf
  Payload mismatch    1    bslbf    如果有效载荷的任意部分
                                    失配则为1
  PID mismatch        1    bslbf    如果PID号失配则为1
  spare               7    bslbf    总为零
  space_loop{
       space_length   8    uimsbf   使大小适合占据余留的分
                                    组有效载荷空间
       for(i＝0；i＜N；i++){
             spare 8uimsbf    总为零
  }
}
分组比较器示例1
在此示例中，应用从传入的基准流20选择匹配分组。
1.比较器尚未启用。状态为“禁用”。
2.应用启用分组比较器。状态转变为“已准备好”。
3.将基准流连接到输入。
4.分组缓冲器FIFO快速充满。
5.微处理器在输入匹配分组之前等待“较长”时间
a.FIFO指针移动以反映出基准数据(这是打包的)的当前起始点和结束点
6.应用找到传入流中的匹配分组，该传入流可能出于选择匹配分组的目的还被路由到微处理器(参见标号20a)。匹配分组加上合适的基准掩膜被应用写入FPGA。
7.应用通过设定“触发器”控制比特来使能基准流的分组匹配。状态转变为“匹配”。
8.在分组缓冲器FIFO中包含的基准流数据中定位到匹配分组。状态转变为“同步”。
a.如果在最大允许基准分组计数内没有找到，则FPGA转变到“匹配失败”状态，并且优选地禁用并启用分组比较器以重启分组比较器。
9.来自候选和基准流二者的分组都到达
a.匹配的基准分组位置移动到接近FIFO的逻辑末端
10.如果在候选流中找到匹配的基准分组，则发生同步，在此情况下，状态转变为“比较”。
a.如果没有找到，则设定“同步失败”状态。随后，优选地必须在重启之前禁用分组比较器。
分组比较器示例2
在此示例中，应用已经选择匹配分组，并因而无需从基准流20读取它。
1.比较器尚未启用。状态为“禁用”。
2.将基准流连接到输入。
3.匹配分组加上合适的基准掩膜被应用写入FPGA。
4.应用启用分组比较器。状态转变为“已准备好”。
5.应用将最大基准流分组比较计数设定为零，以使得能够在找到匹配分组之前对无限数目的基准流分组进行比较。
6.应用通过设定触发器控制比特来使能基准流的分组匹配。状态转变为“匹配”。
7.分组缓冲器FIFO快速充满。
8.使得匹配分组在基准流中显现将花费“较长”时间
a.FIFO指针移动以反映出基准数据(这是打包的)的当前起始点和结束点
9.在分组缓冲器FIFO中包含的基准流数据中定位到匹配分组。状态转变为“同步”。
a.如果在最大允许基准分组计数内没有找到，则FPGA转变到“匹配失败”状态，并且将需要禁用并启用分组比较器以重启分组比较器。在此示例中，计数为零，于是没有限制。
10.来自候选流和基准流二者的分组都到达
a.匹配的基准分组位置移动到接近FIFO的逻辑末端
11.如果在候选流中找到匹配的基准分组，则发生同步并且状态转变为“比较”。
a.如果没有找到，状态转变为“同步失败”状态。分组比较器随后必须被禁用并启用以重启。
分组比较器寄存器
如上所述，分组比较器200尤其是FPGA 205包括寄存器块235，在该寄存器块235中可由应用监视并控制比较器的状态。下表列出了针对本发明特定实施方式采用的若干寄存器。本领域技术人员将明了，鉴于特定实施方式，可能希望不同的和/或附加的寄存器。
表1.寄存器
＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝
○控制
■比较使能
●当应用想要启用比较功能时，设为1。
○从0到1的转变重置比较功能以及所有其状态寄存器
○匹配分组和基准掩膜不受比较使能的改变的影响。
■适配字段比较使能
●设为1以使能适配字段比较。
●设为“0”以抑制适配字段比较。
■比较输出选择
●选择可用的结果流之一以供输出。如下各项之一：
○没有。没有生成任何流输出。
○有效载荷XOR：基准流和候选流分组有效载荷的异或。应当从基准流中取出完整的分组头部。
○有效载荷加上头部的XOR：基准流和候选流的有效载荷和除分组头部同步字节之外的头部的异或。应当从基准流取出同步字节(0x47)。
○完整XOR：基准流和候选流的有效载荷和包括同步字节的头部的异或。来自基准流的分组被放置在任何非零比较结果的前后。
○合成的：反映出匹配结果而没有提供细节内容的合成输出流。参见比较功能描述正文。
■基准流FIFO大小
●无符号17比特。这是允许存储到基准流分组缓冲器FIFO中的分组的最大数目。
●也是基准流和候选流之间的最大可能位置差。
●在同步状态期间，如果基准流和候选流之间的最大位置差到达或超过所配置的基准流FIFO大小，则FPGA应当输入同步失败状态。
●值大小0应当被解释为最大可能大小。
■基准流搜索深度
●无符号32比特。设定在FPGA正尝试在基准流中找到匹配分组时能够扫描的基准分组的最大数目。
■匹配开始(触发器)
●当应用想要开始比较功能时，设为1。
○一旦开始匹配处理，则仅可通过以下各项中的任意一个或多个来停止：
●禁用分组比较器
●基准匹配失败
●同步失败
○仅通过“比较使能”中的状态改变来清除
○统计数据：
■所比较分组
●在基准流和候选流之间比较的分组数目的实时32比特无符号数。
○当应用将其写为零时清除
○当应用将失配分组数写为零时清除
○当匹配开始从“0”转变为“1”时清除。
■基准分组匹配延迟
●在基准流分组缓冲器中找到匹配分组之前扫描的分组数目的实时32比特无符号数。
○当匹配开始从“0”转变为“1”时清除。
○在基准流分组缓冲器中找到匹配分组之后停止计数
■初始同步偏移量
●指示出同步状态期间基准流和候选流之间的相对分组位置的17比特无符号值。
○仅在同步状态期间更新。
○在从同步状态退出时冻结并保持值。
■失配分组
●在基准流和候选流之间比较的非匹配分组的数目的实时32比特无符号数
○仅在候选流中找到匹配分组之后开始计数。
○当应用将其写为零时清除。
○当应用将所比较分组数写为零时清除。
○当匹配开始从“0”转变为“1”时清除。
■连续失配分组
●在基准流和候选流之间比较的连续非匹配分组的数目的实时32比特无符号数。
○仅在候选流中找到匹配的基准分组之后被使能计数。
○当应用将失配分组数写为零时清除。
○当在基准流和候选流之间出现匹配时清除。
○当匹配开始从“0”转变为“1”时清除。
○状态
■当前同步偏移量
●指示出基准流和候选流之间的相对分组位置的实时17比特无符号值。
●仅在“比较”状态期间有效
■比较状态
●对比较功能的状态的实时指示。应用可随时读取。下列各项之一：
○禁用
●比较功能未启用
○已准备好
●基准流正被传递通过分组缓冲器FIFO。匹配分组和合适掩膜必须在应用通过设定“触发器”控制比特来推进(advance)FPGA状态之前由应用写入。
○匹配
●比较功能正在基准流中搜索匹配分组。
○匹配失败
●比较功能在最大允许时间(分组数)内没有在基准流中找到匹配分组。
●比较功能必须被禁用以清除此状态。
○同步
●比较功能在候选流中寻找匹配的基准分组。
○同步失败
●比较功能在最大允许分组数内没有在候选流中找到匹配的基准分组。
●比较功能必须被禁用以清除此状态。
○比较
●比较功能正对基准流和候选流进行比较。
■比较状态
●匹配状态
○候选流和基准流的分组匹配状态的实时状态。
●当流匹配时为“1”
●当流不匹配或者未处在比较状态时为“0”。
○比较事件控制
■连续失配阈值
●在流失配事件被触发之前允许计数的连续失配分组的无符号32比特数。
○比较事件状态
■包含针对必须唯一地用信号通知给应用的各比较事件的标志
○当事件发生时，标志锁存“1”
○如针对各事件所指示的，标志重置为0
○在标志重置之后，仅在事件重现时才能够再次置位，即，状态标志是边沿触发的。
●比较失败
○当输入任意失败状态时置位
○当比较功能被禁用时清除
●比较被使能
○通过输入已准备好状态来置位。
●用作针对应用的对比较功能已成功使能的确认。
○当应用写回“1”比特时清除。
●基准得以匹配
○通过输入同步状态来置位。
○当应用写回“1”比特时清除。
●开始比较
○通过输入比较状态来置位
○当应用写回“1”比特时清除。
●发生失配
○通过基准流和候选流之间的任何失配来置位
○当应用写回“1”比特时清除。
●达到连续失配阈值
○当达到基准流和候选流之间的连续分组失配的数目时置位
○当应用写回“1”比特时清除。
○比较事件中断掩膜
■比较事件状态寄存器中的每一项都有一个标志
●当中断被允许时应用写入“1”
●当中断要被掩蔽时应用写入“0”
○基准流控制
■丢弃断片(fragment)
●“1”指示出基准流中的分组断片要被丢弃。当被丢弃时，这些断片不被存储到分组缓冲器FIFO中，并因而将不被尝试与匹配分组或候选流进行比较。
●“0”指示出要对分组断片进行比较，就好像它们是全部的分组一样。断片将被扩展到完整分组大小。所添加的额外(填充)字节无需初始化。
○基准流事件标志
■检测到断片
●将通过在基准流中检测到的任意分组断片来锁存到“1”。
○通过应用写入“1”来清除。
○在被应用清除之后，该比特不应被再次置位直到在基准流中检测到至少一个完整分组为止。断片的连续流应当向应用呈现为单个“检测到断片”事件。
○基准流中断掩膜
■基准流事件标志寄存器中的每一项都有一个标志
●当中断被允许时，应用写入“1”
●当中断要被掩蔽时，应用写入“0”
概括而言，本发明一实施例提供了如图3所示的包括若干步骤的处理。在步骤302，在基准数据流中指定匹配分组。在步骤304，接收到基准数据流，并且将其分组相继存储在先进先出(FIFO)缓冲器中。然后，在步骤306，接收到包括多个分组的候选数据流。随后，在步骤308，通过在两个流中找出先前指定的匹配分组来同步这两个流。
之后，在步骤310，逐分组、逐字节、或者逐比特地对两个流进行相互比较。最后，在步骤312，输出指示出基准数据流和候选数据流的比较的结果流，以供另一处理或者供用户检查。以这种方式，可以以受控的方式来比较两个数据流的内容。
虽然如一个或多个具体示例所体现的，在本文中图示并描述了装置、系统和方法，但是并不想限制于所示出的细节，因为在不脱离装置、系统和方法的范围并且在权利要求的等同物的范围和范畴内的情况下可在其中作出各种修改和结构改变。因此，宽泛地并且以与如下权利要求所阐述的装置、系统和方法的范围一致的方式来理解所附权利要求是适当的。

Claims (27)

1.一种对分组流进行比较的方法，包括：
在基准数据流中指定匹配分组；
接收所述基准数据流并相继地将其分组存储在先进先出缓冲器中；
接收包括多个分组的候选数据流；
使所述匹配分组与所述先进先出缓冲器中的分组相匹配，使所述匹配分组与所述候选数据流中的分组相匹配，并在之后认为所述基准数据流和所述候选数据流彼此同步；
之后，对所述基准数据流和所述候选数据流各自的相应分组逐分组、逐字节或者逐比特地进行比较；以及
输出包括所述基准数据流和所述候选数据流的相应分组的匹配结果的结果流。
2.如权利要求1所述的方法，其中，所述基准数据流和所述候选数据流都是MPEG兼容的。
3.如权利要求1所述的方法，还包括通过在一功能块中对所述基准数据流进行处理并且随后在一逆功能块中对所述功能块的输出进行处理来生成所述候选数据流。
4.如权利要求1所述的方法，其中，所述比较步骤包括对来自所述基准数据流和所述候选数据流的相应分组的有效载荷执行异或运算。
5.如权利要求1所述的方法，其中，所述比较步骤包括对来自所述基准数据流和所述候选数据流的相应分组的头部和有效载荷执行异或运算。
6.如权利要求1所述的方法，其中，所述比较步骤包括对来自所述基准数据流和所述候选数据流的相应分组的除了相应分组的同步字节之外的头部和有效载荷执行异或运算。
7.如权利要求1所述的方法，其中，所述结果流包括含有记录了所述匹配结果的分组的合成输出流。
8.如权利要求7所述的方法，其中，所述合成输出中的给定分组包括以下元素：同步字节失配、TEI失配、PUSI失配、优先级失配、扰码失配、适配失配、CC失配、有效载荷失配以及PID失配。
9.如权利要求1所述的方法，其中，所述匹配分组是从所述基准数据流取出的。
10.如权利要求1所述的方法，还包括将控制信息存储在寄存器块中。
11.如权利要求1所述的方法，还包括针对MPEG兼容分组中的适配字段抑制所述比较的步骤。
12.如权利要求1所述的方法，还包括使用软件应用来控制所述方法。
13.如权利要求1所述的方法，还包括检测并存储在所述基准数据流和所述候选数据流之间的等待延迟。
14.一种对分组流进行比较的方法，包括：
在基准流中指定匹配分组；
接收包括所述匹配分组的所述基准流；
在所述基准流中检测所述匹配分组；
在候选流中检测所述匹配分组，其中，所述候选流是所述基准流的经处理版本并且在时间上相对于所述基准流经过了延迟；
在所述基准流和所述候选流二者中都检测到所述匹配分组时，将寄存器状态改变为同步状态；
当处在同步状态时，对所述基准流和所述候选流中的相应的各个分组逐分组、逐字节或者逐比特地进行相互比较；以及
输出包括所述基准流和所述候选流的相应的各个分组的匹配结果的结果流。
15.如权利要求14所述的方法，其中，所述基准数据流和所述候选数据流都是MPEG兼容的。
16.如权利要求14所述的方法，其中，所述比较步骤包括对来自所述基准流和所述候选流的相应分组的有效载荷执行异或运算。
17.如权利要求14所述的方法，其中，所述比较步骤包括对来自所述基准流和所述候选流的相应分组的头部和有效载荷执行异或运算。
18.如权利要求14所述的方法，其中，所述比较步骤包括对来自所述基准流和所述候选流的相应分组的除了相应分组的同步字节之外的头部和有效载荷执行异或运算。
19.如权利要求14所述的方法，其中，所述结果流包括含有记录了所述匹配结果的分组的合成输出流。
20.一种对分组流进行比较的系统，包括：
微处理器；
分组比较器，被配置为由所述微处理器经由一组寄存器来控制；
所述分组比较器具有被配置为接收基准流的第一输入，被配置为接收候选流的第二输入，以及被配置为提供结果流的输出；
所述分组比较器还包括：
匹配分组缓冲器，该匹配分组缓冲器被配置为接收匹配分组并将该匹配分组提供给用于在所述基准流和所述候选流中检测该匹配分组的模块；以及
比较模块，被配置为对所述基准流和所述候选流中相应的各个分组逐分组、逐字节或者逐比特地进行相互比较，并输出包括所述基准流和所述候选流的相应的各个分组的匹配结果的结果流。
21.如权利要求20所述的系统，其中，所述分组比较器是用现场可编程门阵列来实现的。
22.如权利要求20所述的系统，其中，所述基准流和所述候选流是MPEG兼容流。
23.如权利要求20所述的系统，还包括先进先出缓冲器，该先进先出缓冲器被配置为存储所述基准流并推进该基准流，直到所述匹配分组被检测到为止。
24.如权利要求20所述的系统，其中，所述结果流包括对来自所述基准流和所述候选流的相应分组的有效载荷执行的异或运算的结果。
25.如权利要求20所述的系统，其中，所述结果流包括对来自所述基准流和所述候选流的相应分组的头部和有效载荷执行的异或运算的结果。
26.如权利要求20所述的系统，其中，所述结果流包括对来自所述基准流和所述候选流的相应分组的除了相应分组的同步字节之外的头部和有效载荷执行的异或运算的结果。
27.如权利要求20所述的系统，其中，所述结果流包括含有记录了所述匹配结果的分组的合成输出流。
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US20090168813A1 (en) 2009-07-02
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US20120192238A1 (en) 2012-07-26
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