CN101872718B - Preparation method of graphene wafer - Google Patents
Preparation method of graphene wafer Download PDFInfo
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- CN101872718B CN101872718B CN201010186220XA CN201010186220A CN101872718B CN 101872718 B CN101872718 B CN 101872718B CN 201010186220X A CN201010186220X A CN 201010186220XA CN 201010186220 A CN201010186220 A CN 201010186220A CN 101872718 B CN101872718 B CN 101872718B
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Abstract
The invention discloses a preparation method of a graphene wafer, which comprises the following steps: cementing the surfaces of a surface-treated substrate and graphite; applying external stress to generate atomic bonding force between the substrate and the graphite; undrawing the substrate and the graphite by mechanical force to obtain the graphene wafer on the substrate, thus solving the problems that the size of the currently produced graphene wafer is small, and the size, quality and position can not be controlled. Large-area graphene wafers can be prepared by using the method, which has easily controlled size and high repeatability, and automatic batch production can be realized.
Description
Technical field
The present invention relates to a kind of preparation methods, relate in particular to a kind of method that on substrate, prepares graphene wafer.
Background technology
2004, the strong K sea nurse of the peace moral of Univ Manchester UK (Andre K.Geim) etc. was prepared Graphene.It is not only in the known materials the thinnest a kind of, unusual rigid also, and the connection in the Graphene between each carbon atom is very pliable and tough; When applying external mechanical force; The carbon atom face adapts to external force with regard to flexural deformation thereby carbon atom needn't be arranged again, has also just kept the stable of structure; As simple substance, it at room temperature transmits, and the speed of electronics is all faster than known conductor, and electronic motion speed has reached 1/300 of the light velocity, considerably beyond the movement velocity of electronics in general conductor.
Modern integrated circuits is the basis with silicon materials, and along with the progress of semiconductor technology and process technology, the processing dimension of modern silicon transistor device is more and more littler.The processing dimension of silicon materials receives the restriction of quantum physics during less than 10nm, and the stability of silicon device and manufacturing cost all welcome great challenge.Thus, the begin one's study electronics of carbon-based material of people, Graphene has good physicochemical properties, is considered to the candidate material the most likely that following microelectric technique possibly replace silicon.The preparation method of graphene wafer mainly contains following several kinds at present:
(1) with adhesive tape mechanical stripping single or multiple lift Graphene from the high purity graphite, transfers to again on the semiconductor substrates such as silicon chip.The advantage of the method is that the Graphene crystal mass of preparation is high, and technology is simple; Shortcoming is that the Graphene size of preparation is little, is micron dimension, and the size of Graphene, character and position all are difficult to control.
(2) silicon of thermal decomposition carbonization at high temperature method: the advantage of the method is that the Graphene quality is high, can control the number of plies of the Graphene of preparation; Shortcoming is that silicon carbide substrates is very expensive, and experimentation needs the high temperature more than 1400 ℃.
(3) chemical vapour deposition (CVD) graphene wafer on metal or other substrate: the advantage of the method is to grow at low temperatures, and does not have the restriction of substrate dimension; Shortcoming is that this process is a haptoreaction, needs to remove contact layer.
(4) chemical synthesis: the advantage of chemical synthesis is that cost is low, and preparation is simple; Shortcoming is the number of plies control difficulty of Graphene, and is relatively more difficult to other substrate-transfer.
Summary of the invention
The preparation method of the graphene wafer that technical problem to be solved by this invention provides that a kind of graphene wafer size is big, character and position all are easy to control.
For solving the problems of the technologies described above; The technical scheme that the present invention taked is: a kind of preparation method of graphene wafer; Wherein surface treated substrate and graphite are carried out the surface applying; Apply external carbuncle and make between substrate and graphite and to produce atomic bond and make a concerted effort, with mechanical force substrate and graphite are drawn back and promptly on substrate, obtain graphene wafer.
Adopt in the following method one or more when applying external carbuncle: heat treatment method, mechanical application of force method, apply voltage method; Wherein:
Temperature in the heat treatment method is 500～800 ℃, heat treatment time 30 minutes～5 hours;
Machinery application of force method pressure magnitude range is 1-20Kg/cm
2
Applying what apply in the voltage method is direct voltage 500～1000V, and the temperature of substrate and graphite is heated to 300～500 ℃.
Said substrate is a kind of in the substrate of following material preparation: semiconductor wafer substrate, ionic crystals substrate, glass substrate, metal substrate.
Adopt the beneficial effect that technique scheme produced to be: owing to be on substrate, directly to prepare graphene wafer; Rather than the graphene wafer for preparing mounted on the substrate; Can prepare large-area Graphene based on actual needs like this, size is easy to control, and the position is aimed at easily; In addition, do not adopt complicated technological process during preparation, but the method that realizes easily on the adopting process, therefore repeatability is high, can realize automatic batch production; Simultaneously, compatible mutually with the graphene wafer of this method preparation with microelectronics preparation technology, make the graphene wafer of preparation can directly be used to prepare various devices and circuit.
Embodiment
The preparation method of a kind of graphene wafer provided by the invention, comprising following steps:
1) will pass through substrate and graphite after the step process such as mirror finish, surface clean, oven dry and carry out the surface and fit, and use substrate and graphite after the bonding machine will be fitted to compress.The mirror finish of graphite and substrate surface comprises mechanical polishing and chemical polishing; The cleaning on surface is according to the difference of baseplate material and difference; As required material is carried out plasma surface treatment and can make the superficial layer atom be in higher-energy state, improve substrate surface layer absorption C
4-Ability.
2) apply external carbuncle and make between substrate and graphite and to produce atomic bond and make a concerted effort, adopt when applying external carbuncle material heating, the mechanical application of force, a kind of method or two kinds of methods of on material, adding in the high voltage are perhaps used three kinds of methods simultaneously.
3) with mechanical force substrate and graphite are drawn back and promptly on substrate, prepare graphene wafer.Adopt mechanical force that graphite is removed from substrate, promptly graphite and substrate are drawn back, graphene wafer is stayed substrate surface with mechanical force.Because between the graphite atomic layer is weak Van der Waals force, the atomic binding forces between graphite and substrate will have large-area single or multiple lift Graphene to stay substrate surface much larger than Van der Waals force behind the removal graphite, form graphene wafer.
The method goes on various substrates, preparing graphene wafer.Baseplate material comprises: various semiconductor monocrystal substrates, for example: Si, GaAs, InP, SiC, GaN etc.; Various ionic crystalss are like quartz, sapphire, MgO, NaCl, TiO
2Deng; Amorphous materials such as glass; Metal material is like Fe, Cu, Al, Au etc.As required, substrate surface can deposition, extension, heat growth, oxidation generate various dielectric materials such as SiO
2, SiNx, Al
2O
3, HfO
2, metal Ti, metal A u etc.
Graphite in the method and substrate can be disk, square plate or other shapes of various sizes.
Below in conjunction with two specific embodiments the present invention is done further explain.
Embodiment one
At 4 inches (100) Si surface preparation Si/SiO
2/ graphene wafer composite material, silicon chip select for use the surface heat oxidation to generate 300nm SiO
2(100) Si sheet of film, graphite are selected 4 inches high directed cracking graphite (HOPG) disk for use.Preparation process is following:
1) cleaning of graphite and silicon chip surface
To pass through bright finished silicon chip at H
2SO
4And H
2O
2Boil in the mixed solution, in rare HF solution, float again, rinse with deionized water again and at room temperature dry.To pass through mirror finish graphite and in acetone soln, boil earlier, in absolute ethyl alcohol, float again, and rinse with deionized water again and at room temperature dry.
2) bonding between graphite and the silicon chip
With cleaning good graphite and SiO being arranged
2The silicon chip of film is fitted, and the silicon chip of applying drops in the high temperature furnace fast and heat-treats, and heat treatment temperature is 500～800 ℃, and heat treatment time 30 minutes～5 hours slowly cools to room temperature then.Heat treated effect is to make SiO
2The Si atom on film surface and the carbon atom of graphite surface produce strong atomic bond makes a concerted effort, and heat treatment period and temperature effect form the radial dimension and the thickness of graphene wafer.The radial dimension of graphene wafer and thickness are directly proportional with heat treatment time, and at high temperature, electron exchange takes place for Si atom and C, forms shared eletron, and the bonding time is long more, and it is many more to form shared eletron between Si atom and C atom; Temperature is high more, and the electronics free path is big more, and the Si atom can form shared eletron with farther C atom.
3) clamp graphite with tweezers and silicon chip firmly draws back, separate graphite and silicon chip, silicon chip surface promptly has the footpath to be of a size of the graphene wafer of millimeter size.
4) with the existence and the number of plies of microcell raman scattering spectrum analysis and characterization graphene wafer.
Si/SiO with the method preparation
2/ graphene composite material can be used for preparing the graphene field effect transistor of metal-oxide layer-semiconductor-field effect transistor structure.
Used silicon chip can be used semiconductor substrates such as GaAs, InP, SiC, GaN or quartz, sapphire, MgO, NaCl, TiO in the method
2Metal substrates such as plasma crystal substrate or glass substrate or Fe, Cu, Al, Au replace.
Embodiment two
Prepare sapphire/graphene wafer composite material at 2 inches sapphire surfaces, graphite is selected 2 inches HOPG graphite disks for use.The concrete steps of preparation are following:
1) cleaning of graphite surface
To pass through bright finished 2 inches graphite disks and in acetone soln, boil earlier, in absolute ethyl alcohol, float again, and rinse and at room temperature dry with deionized water.Sapphire Substrate is opened the i.e. usefulness of box, need not clean.With 2 inches Sapphire Substrate and the positive applying of graphite disk.
2) bonding between graphite and the sapphire
This process adopts alive method to carry out.Dc power anode connects sapphire-graphite composite material, and negative pole connects sapphire, and voltage 500～1000V is heated to 300～500 ℃ with sapphire-graphite composite material.Under the voltage effect, the Al in the sapphire
3+Will be to the drift of negative pole direction, at the sapphire surface formation depletion layer of next-door neighbour's graphite, depletion width is about several microns.Depletion layer has negative electrical charge, and there is bigger electrostatic attraction in the graphite tape positive charge, thereby makes the two tight contact between graphite and the sapphire.Applied voltage just mainly is added on the depletion layer like this, can reflect the process of electrostatic bonding through current variation in the circuit.When just adding voltage, a bigger current impulse is arranged, electric current reduces gradually afterwards, and is almost nil at last, and the very strong chemical bond of generation between graphite and the sapphire is described this moment.
In the electrostatic bonding, electrostatic attraction plays important effect, and behind the sample cool to room temperature, the electric charge in the depletion layer can complete obiteration, and remaining electric charge induces appearance as positive charge in graphite, and the electrostatic force between them has about 1MPa.It is thus clear that less residual charge still can produce considerable bonding force.In addition, under than higher temperature, closely chemical reaction can take place in the graphite/sapphire interface of contact, forms firm chemical bond, like the C-O-Al key etc.
3) voltage take-off stops to heat, and the cooling back separates graphite and sapphire with mechanical force, and sapphire surface promptly has the graphene wafer of several millimeters sizes.
4) compose the existence and the number of plies that detects graphene wafer with the microcell Raman scattering.
The method can also be applied on quartz, MgO, the glass plasma crystal substrate directly at insulation sapphire substrate surface preparation graphene wafer.
Embodiment three
Prepare silicon/graphene wafer composite material at 4 inches silicon chip surfaces, graphite is selected 2 inches HOPG graphite disks for use.The concrete steps of preparation are following:
1) will pass through bright finished silicon chip at H
2SO
4And H
2O
2Boil in the mixed solution, in rare HF solution, float again, rinse with deionized water again and at room temperature dry.To pass through 2 inches graphite disks of mirror finish and in acetone soln, boil earlier, in absolute ethyl alcohol, float again, and rinse with deionized water again and at room temperature dry.
2) use the bonding machine to accomplish the bonding between silicon chip and the graphite disk.The stressed size of institute is relevant with substrate size, material, surface warp degree etc., and the pressure magnitude range is 1-20Kg/cm
2
3) the intact back of bonding separates graphite and silicon chip with mechanical force, and silicon chip surface promptly has the graphene wafer of several millimeters sizes.
4) compose the existence and the number of plies that detects graphene wafer with the microcell Raman scattering.
The method can also be applied on other various substrates directly at silicon chip substrate surface preparation graphene wafer.Used silicon chip can be used semiconductor substrates such as GaAs, InP, SiC, GaN or quartz, sapphire, MgO, NaCl, TiO in the method
2Metal substrates such as plasma crystal substrate or glass substrate or Fe, Cu, Al, Au replace.
Claims (5)
1. the preparation method of a graphene wafer; It is characterized in that: surface treated substrate and graphite are carried out the surface applying; Apply external carbuncle and make between substrate and graphite and to produce atomic bond and make a concerted effort, with mechanical force substrate and graphite are drawn back and promptly on substrate, obtain graphene wafer; Said substrate is a kind of in the following substrate: semiconductor wafer substrate, ionic crystals substrate, glass substrate, metal substrate.
2. the preparation method of graphene wafer according to claim 1 adopts in the following method one or more: heat treatment method, mechanical application of force method, apply voltage method when it is characterized in that applying external carbuncle; Wherein:
Temperature in the heat treatment method is 500～800 ℃, heat treatment time 30 minutes～5 hours;
Machinery application of force method pressure magnitude range is 1-20 Kg/cm
2
Applying what apply in the voltage method is direct voltage 500～1000V, and the temperature of substrate and graphite is heated to 300～500 ℃.
3. the preparation method of graphene wafer according to claim 1 and 2 is characterized in that said semiconductor wafer substrate is a kind of among Si, GaAs, InP, SiC, the GaN.
4. the preparation method of graphene wafer according to claim 1 and 2 is characterized in that said ionic crystals substrate is sapphire, MgO, NaCl, TiO
2In a kind of.
5. the preparation method of graphene wafer according to claim 1 and 2 is characterized in that said metal substrate is a kind of among Fe, Cu, Al, the Au.
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| US8822306B2 (en) * | 2010-09-30 | 2014-09-02 | Infineon Technologies Ag | Method for manufacturing a composite wafer having a graphite core, and composite wafer having a graphite core |
| CN102181924B (en) * | 2011-03-30 | 2013-02-06 | 苏州纳维科技有限公司 | Growth method of graphene and graphene |
| CN103117298A (en) * | 2011-11-17 | 2013-05-22 | 中国科学院物理研究所 | Ohmic electrode structure of silicon carbide and manufacturing method thereof |
| CN103204493B (en) * | 2012-01-12 | 2015-09-30 | 中国科学院微电子研究所 | The preparation method of graphene wafer |
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| CN101289181B (en) * | 2008-05-29 | 2010-09-01 | 中国科学院化学研究所 | Doped graphene and method for preparing same |
| US9991391B2 (en) * | 2008-07-25 | 2018-06-05 | The Board Of Trustees Of The Leland Stanford Junior University | Pristine and functionalized graphene materials |
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