CN101860222B - Unit serial connection type high-voltage frequency converter unit controller - Google Patents
Unit serial connection type high-voltage frequency converter unit controller Download PDFInfo
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- CN101860222B CN101860222B CN2010101422464A CN201010142246A CN101860222B CN 101860222 B CN101860222 B CN 101860222B CN 2010101422464 A CN2010101422464 A CN 2010101422464A CN 201010142246 A CN201010142246 A CN 201010142246A CN 101860222 B CN101860222 B CN 101860222B
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Abstract
The invention relates to a unit serial connection type high-voltage frequency converter unit controller, which comprises a sealed machine case (1), a phase A optical fiber communication driving plate (4), a phase B optical fiber communication driving plate (3), a phase C optical fiber communication driving plate (2), a main control plate (5), an input/output sampling plate (6) and a power supply plate (8), wherein the phase A optical fiber communication driving plate (4), the phase B optical fiber communication driving plate (3), the phase C optical fiber communication driving plate (2), the main control plate (5), the input/output sampling plate (6) and the power supply plate (8) are all inserted, connected and positioned on a bus board at the back part of the machine case (1), the bus board interconnects the plates, the core of the main control plate (5) adopts a single chip microprocessor DSP and a single chip FPGA circuit, and the microprocessor DSP and the single chip FPGA circuit are connected through three buses. The accuracy and the operation reliability of the control system are improved, the EMC performance is predominant, and the invention has good adaptability and expandability.
Description
Technical field: the present invention relates to a kind of cell controller of high voltage converter, mainly be applicable to power unit cascade type high voltage frequency changer.
Background technology: power unit cascade type high voltage frequency changer has obtained using widely, and its basic structure composition and control algolithm are very ripe.The tandem type high voltage converter can be divided into three layers on function: energy conversion and transport layer are made up of input phase shifting transformer and power cell; Key-course, mainly accomplish generation of power cell drive waveforms and transmission, Electric Machine Control algorithm, the protection of frequency converter complete machine and such as power down heavily throw, the algorithm of functions such as driving startup, power cell failure bypass; User interface layer, the mode of operation of accomplishing operations such as start-stop, open loop and the closed loop of frequency converter switch, to the ruuning situation of system carry out conventional record, report fault and alarm, parameter setting and backup, with backstage interface or the like.
Key-course is the core of frequency convertor system, realize its basic function, needs to use following multiple technologies: multipleization PWM technology, Fibre Optical Communication Technology, analog measurement technology, electric machines control technology.Though these technology are ripe, but in concrete realization, particularly reliable and stable realization in the many dirt when high voltage converter uses, vibrations, the forceful electric power magnetic environment still has very big challenge.
Such as, the generation of power cell PWM.The structure of tandem type high voltage converter has solved the problem of withstand voltage of power device, but has also caused power cell quantity many simultaneously.General common series connection progression is 5 grades/6KV, 6 grades/6KV, 8 grades/10KV, 9 grades/10KV, 10 grades/10KV etc.If adopt 10 grades of units in series; 30 power cells are then arranged at most; This high-voltage high-power frequency transformator control system to multiple-level serially connected structure is quite complicated; Not only the operational capability to microcontroller is a kind of test, and 30 power cell PWM waveform generation also are great challenge.For the problem that 30 power cell PWM produce, existing frequency converter product, special-purpose timing chip of the employing that has or programmable logic device; PWM waveform to each unit carries out the timing generation; Because One's name is legion must adopt the multi-disc timing chip, this will bring very big difficulty to the plate design; Simultaneously also can increase the fault point, influence product reliability.The microprocessor that passes through that has produces basic PWM waveform, decomposes through the programmable logic device time-delay again, and this design is owing to use software to produce PWM waveform, stability and poor anti jamming capability.Generate whole required PWM waveforms by software fully in addition, its real-time of this design, accuracy and stability compare by hard logic generate mutually far short of what is expected, and this mode also needs extra processor to accomplish other control algolithms of frequency converter.
If consider to handle with the communication of 30 power cells again, move the prerequisite functions such as detection of various complicated algorithms, input/output voltage and electric current, visible multiple-level serially connected high voltage converter control system is quite complicated.
Generally speaking, the control system of unit cascade type high voltage frequency changer in concrete realization, particularly all compares reliable and stable realization under the condition of severe at electromagnetic environment, operational environment, still has very big challenge.
Summary of the invention: technical problem to be solved by this invention is: a kind of unit serial connection type high-voltage frequency converter unit controller is provided, improves the technical merit and the operational reliability of Frequency Converter Control system, improve production efficient.To overcome the defective of existing product.
Technical scheme of the present invention is following:
A kind of unit serial connection type high-voltage frequency converter unit controller; The cabinet, A phase optical fiber communication drive plate, B phase optical fiber communication drive plate, C phase optical fiber communication drive plate, master control borad, I/O sampling plate, the power panel that comprise sealing; It is characterized in that: A phase optical fiber communication drive plate, B phase optical fiber communication drive plate, C phase optical fiber communication drive plate, master control borad, I/O sampling plate, power panel all are plugged on the bus board that is positioned at the cabinet back; Bus board interconnects above-mentioned plate; The core of described master control borad adopts chip microprocessor DSP and monolithic FPGA circuit, and microprocessor DSP is connected through three buses with the FPGA circuit.
Described master control borad also comprises power management module, level translator, two paths of signals modulate circuit and ADC, two-way RS232 communication interface and a slice RAM; Two paths of signals modulate circuit and ADC are connected through signal with microprocessor DSP; RAM is connected with the FPGA circuit with microprocessor DSP through three buses; Level translator is connected with the FPGA circuit through holding wire or data receipts/hair line; Two-way RS232 communication interface is connected with microprocessor DSP circuit, and one the tunnel is used for and upper machine communication, and another road is as maintenance serial port.
Also be plugged with power unit by-pass contactor drive plate in the cabinet; Power unit by-pass contactor drive plate comprises light driver for isolating and output relay; The light driver for isolating is driven by the level translator of master control borad, and output relay is used for the corresponding dish road contactor in driving power unit.
Good effect of the present invention is:
(1), the master control borad core adopts chip microprocessor DSP+ monolithic FPGA framework.Through optimizing multipleization PWM generation method, the succinct practical communication protocol of design; Realized that with a slice FPGA whole 30 power cell PWM waveforms generate, 30 power cell communication protocol routines, and utilized this FPGA residual resource to realize supporting the required repertoire of frequency convertor system constant frequency operation.Compare and be implemented in real-time, accuracy, stability with the pure software method and improve a lot, thoroughly avoided because EMC disturbs the problem that causes system's " deadlock "; Compare with discrete device and realize, reduced design risk and difficulty, reduced component number and fault point, improved reliability of products.
(2), adopt the design of cabinet plug-in type; Whole hardware of cell controller are placed in the metal cabinet of sealing; Control circuit and peripheral driver are isolated fully and to all holding wires that gets into cell controllers, are designed corresponding codan to signal characteristic, make cell controller EMC superior performance; Through the test of electric power system EMC IV level, for stability, the reliability of frequency converter complete machine have been established solid foundation.
(3), cell controller realized the repertoire of unit cascade type high voltage frequency changer key-course, can support 10 grades of units in series at most.To the high voltage converter product of different model, the setting that only needs to change among the FPGA gets final product.Make system have good adaptability, extendibility.The ten minutes that the interface of cell controller is divided according to function is clear, disturbs thereby make the Frequency Converter Control wiring rationally reduce, and has improved the efficient of distribution in the production process greatly simultaneously, also is convenient to attendant's operation.
Description of drawings: Fig. 1 is an invention outward appearance front view.
Fig. 2 is system framework figure of the present invention.
Fig. 3-the 1st, dsp board signal processing circuit schematic diagram ().
Fig. 3-the 2nd, dsp board signal processing circuit schematic diagram (two).
Fig. 3-the 3rd, dsp board signal processing circuit schematic diagram (three).
Fig. 3-the 4th, dsp board signal processing circuit schematic diagram (four).
Fig. 4 is a dsp board serial port circuit schematic diagram.
Fig. 5 is that dsp board is downloaded, the reset circuit schematic diagram.
Fig. 6 is dsp board power circuit principle figure.
Fig. 7-the 1st, FPGA circuit theory diagrams ().
Fig. 7-the 2nd, FPGA circuit theory diagrams (two).
Fig. 8-the 1st, dsp board cpu circuit schematic diagram ().
Fig. 8-the 2nd, dsp board cpu circuit schematic diagram (two).
Fig. 8-the 3rd, dsp board cpu circuit schematic diagram (three).
Fig. 9-the 1st, optical fiber communication drive plate circuit theory diagrams ().
Fig. 9-the 2nd, optical fiber communication drive plate circuit theory diagrams (two).
Figure 10-the 1st, defeated/as to go into to export sampling plate circuit theory diagrams ().
Figure 10-the 2nd, defeated/as to go into to export sampling plate circuit theory diagrams (two).
Figure 11-the 1st, power unit by-pass contactor drive plate circuit theory diagrams ().
Figure 11-the 2nd, power unit by-pass contactor drive plate circuit theory diagrams (two).
Figure 12-the 1st, bus board circuit theory diagrams ().
Figure 12-the 2nd, bus board circuit theory diagrams (two).
Concrete implementation: the present invention is further described below in conjunction with accompanying drawing.
Like Fig. 1, shown in 2; System divides according to the plate different functions; Circuit in each frame of broken lines realizes that whole system just is divided into like this on the printed board plug-in unit of a unified size: A phase optical fiber communication drive plate 4, B phase optical fiber communication drive plate 3, C phase optical fiber communication drive plate 2, power unit by-pass contactor drive plate 7, I/O sampling plate 6, power panel 8, master control borad 5.Above-mentioned these plates all are plugged on the bus board that is positioned at cabinet 1 back, and bus board interconnects these plates.Cabinet 14U is high 19 inches wide.
Described master control borad 5 comprises that power management module, level translator, two paths of signals modulate circuit and ADC, two-way pass through the RS232 communication interface of the standard of isolating, a slice microprocessor DSP, a slice FPGA, reach a slice RAM.Wherein the combination of microprocessor DSP and FPGA is the core of master control borad.Link to each other through three buses (address, control, data) between microprocessor DSP and the FPGA.Two paths of signals modulate circuit and ADC are connected through signal with microprocessor DSP; RAM is connected with the FPGA circuit with microprocessor DSP through three buses; Level translator is connected with the FPGA circuit through holding wire or data receipts/hair line; Two-way RS232 communication interface is connected with microprocessor DSP circuit, and one the tunnel is used for and upper machine communication, and another road is as maintenance serial port.
It is the ip intelligent peripherals of microprocessor DSP that the FPGA circuit can be regarded as, can be by microprocessor DSP visit and control.According to the control command that microprocessor DSP provides, the FPGA circuit generates command code and the PWM Wave data of each unit and sends to power cell through the communication unit controller in the sheet; Each power cell that microprocessor DSP stores among the FPGA through visit and the status word of FPGA self are obtained the state information of these equipment.
The FPGA circuit has realized that whole 30 power cell PWM waveforms generate, 30 power cell communication protocol routines, and utilizes this FPGA residual resource to realize supporting the required repertoire of frequency convertor system constant frequency operation.Even microprocessor DSP crashes, this cell controller still can be kept frequency converter constant frequency operation under current frequency through the logic of moving among the FPGA, satisfies industrial products A grade standard.
Also realized the power unit by-pass algorithm in the FPGA circuit.If unit weighs fault request bypass is arranged, the bypass algorithm need can select the unit of bypass, and the PWM waveform of adjustment normal cell, to keep output voltage.Whole process all is to have FPGA internal hardware circuit to produce automatically; Do not need the participation of microprocessor DSP; Guaranteed the real-time of failure response like this, can effectively protect power cell, avoided simultaneously owing to disturb " deadlock " or the generation of phenomenons such as " software run and flies " that causes.
The communication unit controller of instantiation in the FPGA circuit is corresponding with the power cell quantity that needs, and each communication piece uses a pair of data receipts/hair line to communicate by letter with each power cell through the optical fiber transceiving driver.As shown in Figure 2, from FPGA, generate signal be connected to the optical fiber transceiving driver through level translator.In a communication cycle, the command code of communication unit controller transmitted power unit and PWM Wave data are given power cell, and the state information uploaded of received power unit.
DSP mainly be responsible for inspection algorithm, the frequency converter of I/O electric current and voltage various protections and Electric Machine Control algorithm, and host computer is mutual etc.DSP mainly accomplishes following work:
(1), frequency converter protection: imported/under-voltage, output overcurrent, high pressure dead electricity the power cell state protection
(2), controlled function: high pressure power down coincidence, power frequency switching, worker's switching, driving startup etc. frequently;
(3), motor operation control algolithm, like V/F control, vector control;
(4), other: input, output current/voltage sample algorithm and with the host computer interface etc.
Said optical fiber transceiving driver can comprise 10 pairs of optical fiber transmitting-receiving interfaces and drive circuit at most, through optical fiber and this power cell connection mutually.
Said power panel comprises an isolating switch power, will import the 24V isolated from power and be transformed to 24V and 5V, supplies control circuit to use.
Described I/O sampling plate 6 comprises frequency converter input voltage and input current sample circuit and frequency converter output voltage current sampling circuit.As shown in Figure 2, the input of frequency converter input voltage and input current sample circuit (input Ua, input Ub, input Uc, input Ia, input Ic) is the output of the PT in high-pressure side, CT.These input signals are transformed to the manageable weak electric signal of control system through PT, the CT of I/O sampling plate 6, send into ADC through signal conditioning circuit again, convert digital signal into and give microprocessor DSP.Because the frequency of frequency converter output voltage, electric current changes, for accurate measurement, the output voltage current sampling circuit is selected voltage, current Hall instrument transformer for use.Output Ua, output Ub, output Uc, output Ia, output Ic are the output signals of Hall instrument transformer, behind input filter, send into ADC through signal conditioning circuit again, convert digital signal into and give microprocessor DSP.By the conversion of 24V isolated from power come out+12V ,-the 12V power supply exports to voltage and current Hall instrument transformer power supply.
Said power unit by-pass contactor drive plate 7 comprises light driver for isolating and output relay, is used for the corresponding bypass contactor in driving power unit.The said frequency converter of this instance adopts mechanical type unit bypass technology.As shown in Figure 2, the A1-A10 that from the FPGA circuit, generates, B1-B10, C1-C10 unit bypass signal, final controlling object is the corresponding bypass contactor of each power cell.The unit bypass signal will pass through and can drive contactor after two-stage is amplified, and at first drives light driver for isolating (realizing electrical isolation simultaneously) through level translator, and through the separated driver drives output relay of light, output relay drives bypass contactor then.
The present invention has been successfully applied in the DF5000 series high voltage frequency converter.
Claims (3)
1. unit serial connection type high-voltage frequency converter unit controller; The cabinet (1), A phase optical fiber communication drive plate (4), B phase optical fiber communication drive plate (3), C phase optical fiber communication drive plate (2), master control borad (5), I/O sampling plate (6), the power panel (8) that comprise sealing; It is characterized in that: A phase optical fiber communication drive plate (4), B phase optical fiber communication drive plate (3), C phase optical fiber communication drive plate (2), master control borad (5), I/O sampling plate (6), power panel (8) all are plugged on the bus board that is positioned at cabinet (1) back; Bus board interconnects above-mentioned plate; The core of described master control borad (5) adopts chip microprocessor DSP and monolithic FPGA circuit, and microprocessor DSP is connected through three buses with the FPGA circuit.
2. unit serial connection type high-voltage frequency converter unit controller as claimed in claim 1 is characterized in that: described master control borad (5) also comprises power management module, level translator, two paths of signals modulate circuit and ADC, two-way RS232 communication interface and a slice RAM; Two paths of signals modulate circuit and ADC are connected through signal with microprocessor DSP; RAM is connected with the FPGA circuit with microprocessor DSP through three buses; Level translator is connected with the FPGA circuit through holding wire or data receipts/hair line; Two-way RS232 communication interface is connected with microprocessor DSP circuit, and one the tunnel is used for and upper machine communication, and another road is as maintenance serial port.
3. according to claim 1 or claim 2 unit serial connection type high-voltage frequency converter unit controller; It is characterized in that: also be plugged with power unit by-pass contactor drive plate (7) in the cabinet (1); Power unit by-pass contactor drive plate (7) comprises light driver for isolating and output relay; The light driver for isolating is driven by the level translator of master control borad, and output relay is used for the corresponding dish road contactor in driving power unit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010101422464A CN101860222B (en) | 2010-04-03 | 2010-04-03 | Unit serial connection type high-voltage frequency converter unit controller |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010101422464A CN101860222B (en) | 2010-04-03 | 2010-04-03 | Unit serial connection type high-voltage frequency converter unit controller |
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| CN101860222A CN101860222A (en) | 2010-10-13 |
| CN101860222B true CN101860222B (en) | 2012-05-30 |
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| CN2010101422464A Expired - Fee Related CN101860222B (en) | 2010-04-03 | 2010-04-03 | Unit serial connection type high-voltage frequency converter unit controller |
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Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102243482B (en) * | 2011-04-12 | 2013-11-06 | 株洲变流技术国家工程研究中心有限公司 | Control method and master controller for cascaded high-voltage frequency converters |
| CN104021103B (en) * | 2014-06-04 | 2017-08-29 | 广州中海达卫星导航技术股份有限公司 | A kind of serial ports expansion device of embedded microprocessor |
| CN109560870A (en) * | 2017-09-25 | 2019-04-02 | 台达电子企业管理（上海）有限公司 | Communication system for cascade connection type power conversion apparatus |
| CN117092440A (en) * | 2023-10-16 | 2023-11-21 | 东方电子股份有限公司 | Power unit testing device |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| FI109156B (en) * | 2000-03-06 | 2002-05-31 | Vacon Oyj | inverter |
| CN2737060Y (en) * | 2003-12-26 | 2005-10-26 | 哈尔滨九洲电气股份有限公司 | Control signal transmission installation in high voltage frequency converter |
| CN101478242B (en) * | 2009-01-15 | 2010-09-15 | 安徽长风电缆集团有限公司 | Pulse controlling and state monitoring device for H bridge cascade high voltage transformer power unit |
| CN101635519A (en) * | 2009-08-23 | 2010-01-27 | 山西科达自控工程技术有限公司 | Power unit with brake function for unit cascaded high-voltage frequency converter |
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Effective date of registration: 20170418 Address after: 264000 Airport Road, Zhifu, Shandong, No. 2, No. Co-patentee after: Yantai Dongfang Science and technology environmental protection energy saving Co., Ltd. Patentee after: Dongfang Electronics Corp. Address before: 264000 Airport Road, Zhifu, Shandong, No. 2, No. Patentee before: Dongfang Electronics Corp. |
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Granted publication date: 20120530 Termination date: 20180403 |