CN101846980B - Method and system for converting logic diagram into sequence diagram - Google Patents
Method and system for converting logic diagram into sequence diagram Download PDFInfo
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- CN101846980B CN101846980B CN2009101899358A CN200910189935A CN101846980B CN 101846980 B CN101846980 B CN 101846980B CN 2009101899358 A CN2009101899358 A CN 2009101899358A CN 200910189935 A CN200910189935 A CN 200910189935A CN 101846980 B CN101846980 B CN 101846980B
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Abstract
The invention relates to a method for converting a logic diagram into a sequence diagram, which comprises the steps: judging whether input information of the logic diagram is an integral signal, if so, designing a sequence diagram for the input information to generate an electronic configuration design file; if not, returning to the logic diagram to regulate the input information, and then judging whether the logic diagram is the integral signal, until the sequence diagram for the input information is designed to generate the electronic configuration design file when the logic diagram is the integral signal indeed. The invention further relates to a system converting a logic diagram into a sequence diagram, which comprises a judging unit, a designing unit, a combing unit and a regulating unit. According to the invention, during the conversion of the logic diagram into the sequence diagram, the electronic configuration design file meeting the configuration demand of a digitalized control system is finally generated, and the conversion process is simple and the conversion result is reliable and accurate.
Description
Technical field
The present invention relates to nuclear plant digital control technology field, more particularly, relate to a kind of method and system that logical diagram is converted to sequential chart.
Background technology
In the nuclear power plant of routine, adopt hardwire, from design, the projected depth of its steering logic gets final product to logical diagram, and the design process of conventional steering logic is as shown in Figure 1.Along with the development of industrial technology, nuclear power plant starts extensively to adopt Digitizing And Control Unit (Digital Control System, referred to as DCS), and DCS adopts sequential chart to control, and the projected depth of logical diagram can not meet the requirement of DCS system.So the logical diagram that the nuclear power station of routine is used in active demand is converted to and meets the sequential chart that the DCS configuration requires.
Summary of the invention
The technical problem to be solved in the present invention is,, for the above-mentioned defect of prior art, provides a kind of method and system that logical diagram is converted to sequential chart.
One of the technical solution adopted for the present invention to solve the technical problems is: construct a kind of method that logical diagram is converted to sequential chart, the method comprises,
S1: whether the input message of decision logic figure is complete signal, is to enter step S2, otherwise enters step S4;
S2: described input message is carried out sequential chart design generated data APMB package;
S3: generate the electron configuration design document, skip to step S5;
S4: turn back in logical diagram and adjust described input message, then enter step S1;
S5: finish.
The method that logical diagram is converted to sequential chart of the present invention, in described step S1, judge respectively according to the type of described input message.
The method that logical diagram is converted to sequential chart of the present invention, in described step S2, carry out respectively the sequential chart design according to the type of described input message, generates respectively the packet file that comprises its content.
The method that logical diagram is converted to sequential chart of the present invention, in described step S3, merge the described electron configuration design document of described packet file generated.
The method that logical diagram is converted to sequential chart of the present invention, described input message comprises control signal and logical data; Described control signal comprises break-make control signal that sensor provides, break-make control signal that topworks provides, break-make control signal that controller provides and from the control signal of external system; Described logical data comprises the logical data between sensor, sensor and controller, and from the logical data of external system.
Two of the technical solution adopted for the present invention to solve the technical problems is: a kind of system that logical diagram is converted to sequential chart is provided, and this system comprises judging unit, design cell, design cell and adjustment unit.
Wherein, described judging unit is used for whether the input message of decision logic figure is complete signal; Described design cell carries out the sequential chart design to described input message when described input message is complete signal, and the generated data APMB package; Described design cell is used for described packet Piece file mergence is generated the electron configuration design document; Described adjustment unit turns back in described logical diagram when described input message is not complete signal adjusts described input message.
The system that logical diagram is converted to sequential chart of the present invention, described judging unit judges respectively according to the type of described input message.
The system that logical diagram is converted to sequential chart of the present invention, described design cell carries out respectively the sequential chart design according to the type of described input message, and generates respectively the packet file that comprises its content.
The system that logical diagram is converted to sequential chart of the present invention, described adjustment unit turn back in described logical diagram adjusts described input message, until the described input message of described judgment unit judges finishes while being complete signal.
The system that logical diagram is converted to sequential chart of the present invention, described input message comprises control signal and logical data; Described control signal comprises break-make control signal that sensor provides, break-make control signal that topworks provides, break-make control signal that controller provides and from the control signal of external system; Described logical data comprises the logical data between sensor, sensor and controller, and from the logical data of external system.
Implement technical scheme of the present invention, have following beneficial effect: realize logical diagram is converted to sequential chart, the final electron configuration design document that meets the Digitizing And Control Unit configuration requirements that generates, transfer process is simple, and transformation result is reliable, accurate.
Description of drawings
The invention will be further described below in conjunction with drawings and Examples, in accompanying drawing:
Fig. 1 is the design process schematic diagram of the steering logic of routine;
Fig. 2 is the design process schematic diagram of steering logic in DCS;
Fig. 3 is that the present invention is converted to logical diagram the system chart of system one preferred embodiment of sequential chart;
Fig. 4 is that the present invention is converted to logical diagram the process flow diagram of method one preferred embodiment of sequential chart.
Embodiment
As shown in Figure 1, be the design process schematic diagram of the steering logic of routine.The design process of conventional steering logic comprises following four aspects: obtain demand for control, logical diagram design, hardwired logic design and on-the-spot topworks, conventional steering logic adopts the logical diagram design., in conjunction with shown in Figure 2, be the design process schematic diagram of steering logic in DCS again.In DCS, the design of steering logic has replaced hardwired logic with sequential chart in the design of the steering logic of routine, its essence is steering logic is adopted the sequential chart design, has realized the design of steering logic by the conversion of logical diagram to sequential chart.
As shown in Figure 3, be that the present invention is converted to logical diagram the system chart of system one preferred embodiment of sequential chart.In the present embodiment, this system comprises judging unit 1, design cell 2, assembled unit 3 and adjustment unit 4.
Whether the input message that judging unit 1 is used for decision logic figure is complete signal.Design cell 2 carries out the sequential chart design to described input message when described input message is complete signal, and the generated data APMB package.Assembled unit 3 is used for described packet Piece file mergence is generated the electron configuration design document.Adjustment unit 4 is adjusted described input message turn back to logical diagram when described input message is not complete signal in, until judging unit 1 judges that described input message finishes while being complete signal.
In the present embodiment, judging unit 1 judges respectively according to the type of described input message, and design cell 2 carries out respectively the sequential chart design according to the type of described input message, and generates respectively the packet file that comprises its content.Assembled unit 3 merges the above-mentioned packet file that comprises various control signal and logical data, finally generates the electron configuration design document.
As shown in Figure 4, be that the present invention is converted to logical diagram the process flow diagram of method one preferred embodiment of sequential chart.Concrete implementing procedure is as described below:
Step S0: start;
Step S1: whether the input message of decision logic figure is complete signal, is to enter step S2, otherwise enters step S4;
Step S2: described input message is carried out sequential chart design generated data APMB package;
Step S3: generate the electron configuration design document, skip to step S5;
Step S4: turn back in logical diagram and adjust described input message, then enter step S1;
Step S5: finish.
In an embodiment, logical diagram is on-the-spot executable electronic chart.At first check the input message of logical diagram, whether the input message of decision logic figure is complete signal, namely whether has integrality.
When whether the input message of decision logic figure is complete signal, input message is judged respectively according to type.For example, input message is divided into two types of control signal and logical datas, wherein, control signal comprises break-make control signal that sensor provides, break-make control signal that topworks provides, break-make control signal that controller provides and from the control signal of external system; Logical data comprises the logical data between sensor, sensor and controller, and from the logical data of external system.
For example, the control signal of the input message of logical diagram is judged, can at first judge any one in control signal, the break-make control signal that provides take the judgement sensor at this is as example.If the break-make control signal that sensor provides all correctly exists, the break-make control signal that provides of sensor has integrality, is complete signal, so start the integrality of the break-make control signal that judges that topworks provides; , if the break-make control signal that sensor provides is not complete signal, turns back in logical diagram and adjust the break-make control signal that this sensor provides.The break-make control signal that in logical diagram, this sensor is provided is adjusted, after completing, adjustment carries out again the signal integrity judgement,, if the break-make control signal that the sensor after judgement is found to adjust provides is complete signal, can start the break-make control signal that judges that topworks provides; , if the break-make control signal that this sensor provides is not still complete signal, turns back to again in logical diagram and adjust the break-make control signal that this sensor provides, until the break-make control signal that this sensor provides is complete signal.Certainly, while adjusting the break-make control signal that this sensor provides in logical diagram, if adjust and all finds not possess integrality time and again, needing be correlated with the break-make control signal that this sensor provide to collect evidence investigates, until have integrality.
As mentioned above, the input message of logical diagram is judged, until the input message of logical diagram all possesses integrality.
When the input message of logical diagram all is complete signal, need the input message of logical diagram is carried out the sequential chart design, namely according to the type of described input message, carry out respectively the sequential chart design.For example, according to classification, the break-make control signal that sensor provides is carried out the sequential chart design, generate the packet file that comprises the sensor control information; The break-make control signal that topworks provides is carried out the sequential chart design, generate the packet file that comprises actuating mechanism controls information; The break-make control signal that controller provides is carried out the sequential chart design, generate the packet file that comprises the controller control information; To carry out the sequential chart design from the control signal of external system, generate the packet file that comprises external control information; Logical data between sensor, sensor and controller is carried out the sequential chart design, generate the packet file that comprises the logical data between sensor, sensor and controller; The logical data of external system is carried out the sequential chart design, generate the packet file of the logical data that comprises external system.Wherein, external system can be the operator or with this DCS, the peripherals of mutual control relation or operating system etc. is arranged.
In the present embodiment, Graphinput information is carried out the sequential chart design according to minimum classification and generate the data file bag that comprises its content.In other embodiments, can carry out respectively the sequential chart design by control signal and logical data two kinds to Graphinput information, namely generate the packet file that comprises control signal and the packet file that comprises logical data.
Finally, merge the above-mentioned packet file that comprises various control signal and logical data, generate the electron configuration design document, so far, the method that the present embodiment provides all finishes.In fact, the electron configuration design document is exactly the above-mentioned packet file that comprises various control signal and logical data to be integrated and by the packet file of certain file layout output.
The method and system that logical diagram is converted to sequential chart provided by the invention, transfer process is simple, and transformation result is reliable, accurate, and final the generation meets the electron configuration design document that the DCS configuration requires.This electron configuration design document can or download to the DCS system by the data transmission interface direct burning, but the hardware device Direct Recognition electron configuration design document of DCS system carries out logic control.
The foregoing is only embodiments of the invention,, not in order to limit the present invention, all any modifications of doing in the spirit and principles in the present invention, be equal to and replace or improvement etc., all should be included in protection scope of the present invention.
Claims (5)
1. a method that logical diagram is converted to sequential chart, is characterized in that, comprise,
S1: the type according to the input message of logical diagram judges respectively whether described input message is complete signal, is to enter step S2, otherwise enters step S4;
S2: respectively described input message is carried out the sequential chart design according to the type of described input message and generate the packet file that comprises its content;
S3: merge described packet file generated electron configuration design document, skip to step S5;
S4: turn back in logical diagram and adjust described input message, then enter step S1;
S5: finish.
2. the method that logical diagram is converted to sequential chart according to claim 1, is characterized in that, described input message comprises control signal and logical data;
Described control signal comprises break-make control signal that sensor provides, break-make control signal that topworks provides, break-make control signal that controller provides and from the control signal of external system;
Described logical data comprises the logical data between sensor, sensor and controller, and from the logical data of external system.
3. a system that logical diagram is converted to sequential chart, is characterized in that, comprises judging unit, design cell, assembled unit and adjustment unit,
Described judging unit is used for judging respectively according to the type of the input message of logical diagram whether described input message is complete signal;
Described design cell type according to described input message when described input message is complete signal is carried out the sequential chart design to described input message respectively, and generates the packet file that comprises its content;
Described assembled unit is used for described packet Piece file mergence is generated the electron configuration design document;
Described adjustment unit turns back in described logical diagram when described input message is not complete signal adjusts described input message.
4. the system that logical diagram is converted to sequential chart according to claim 3, is characterized in that, described adjustment unit turns back in described logical diagram adjusts described input message, until the described input message of described judgment unit judges finishes while being complete signal.
5. the system that logical diagram is converted to sequential chart according to claim 3, is characterized in that, described input message comprises control signal and logical data;
Described control signal comprises break-make control signal that sensor provides, break-make control signal that topworks provides, break-make control signal that controller provides and from the control signal of external system;
Described logical data comprises the logical data between sensor, sensor and controller, and from the logical data of external system.
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Citations (2)
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| CN101226378A (en) * | 2008-01-21 | 2008-07-23 | 浙江大学 | Method for constructing automatic condition machine based on vehicle electric control field model |
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006190284A (en) * | 2004-12-29 | 2006-07-20 | Doosan Infracore Co Ltd | Controller for machine tool capable of performing software plc contact processing, and its processing method |
| CN101226378A (en) * | 2008-01-21 | 2008-07-23 | 浙江大学 | Method for constructing automatic condition machine based on vehicle electric control field model |
Non-Patent Citations (1)
| Title |
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| 镇竞新.功能块块号分配对DCS 组态逻辑的影响分析.《广东电力》.2007,第20卷(第8期), * |
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Address after: 518023 No. 69 Shennan Middle Road, Shenzhen, Guangdong, Futian District Co-patentee after: CHINA GENERAL NUCLEAR POWER Corp. Patentee after: CHINA NUCLEAR POWER ENGINEERING Co.,Ltd. Address before: 518023 No. 69 Shennan Middle Road, Shenzhen, Guangdong, Futian District Co-patentee before: CHINA GUANGDONG NUCLEAR POWER GROUP Co.,Ltd. Patentee before: CHINA NUCLEAR POWER ENGINEERING Co.,Ltd. |
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